1. 04 12月, 2017 1 次提交
  2. 16 11月, 2017 12 次提交
  3. 08 9月, 2017 3 次提交
    • C
      drm/i915/gvt: Add support for PCIe extended configuration space · 02d578e5
      Changbin Du 提交于
      IGD is PCIe device and has extended configuration space. Checking
      the binary dump, we can see we have Caps located out of PCI compatible
      Configuration Space range.
      
      0x000: 86 80 12 19 17 04 10 00 06 00 00 03 00 00 00 00
      0x010: 04 00 00 10 08 00 00 00 0c 00 00 00 08 00 00 00
      0x020: 00 00 00 00 00 00 00 00 00 00 00 00 28 10 b9 06
      0x030: 00 f8 ff ff 40 00 00 00 00 00 00 00 0b 01 00 00
      0x040: 09 70 0c 01 71 26 01 62 c8 00 04 84 00 00 00 00
      0x050: c1 00 00 00 39 00 00 00 00 00 00 00 01 00 00 a2
      0x060: 00 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00
      0x070: 10 ac 92 00 00 80 00 10 00 00 00 00 00 00 00 00
      0x080: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
      0x090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
      0x0a0: 00 00 00 00 00 00 00 00 00 00 00 00 05 d0 01 00
      0x0b0: 18 00 e0 fe 00 00 00 00 00 00 00 00 00 00 00 00
      0x0c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
      0x0d0: 01 00 22 00 00 80 00 00 00 00 00 00 00 00 00 00
      0x0e0: 00 00 00 00 00 00 00 00 00 80 00 00 00 00 00 00
      0x0f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
      0x100: 1b 00 01 20 02 14 00 00 00 00 00 00 00 00 00 00
      ...
      
      Currently, we only emulate the PCI compatible Configuration Space.
      This is okay if we attach vGPU to PCI bus. But when we attach to
      a PCI Express bus (when Qemu emulates a Intel Q35 chipset which has
      PCIe slot), it will not work. Extended Configuration Space is required
      for a PCIe device.
      
      This patch extended the virtual configuration space from 256 bytes
      to 4KB bytes. So we are to be a *real* PCIe device. And for the
      Extended CapList we keep same to physical GPU.
      
      Cc: Laszlo Ersek <lersek@redhat.com>
      Tested-by: NLaszlo Ersek <lersek@redhat.com>
      Signed-off-by: NChangbin Du <changbin.du@intel.com>
      Signed-off-by: NZhenyu Wang <zhenyuw@linux.intel.com>
      02d578e5
    • F
      drm/i915/gvt: Separate cmd scan from request allocation · 0a53bc07
      fred gao 提交于
      Currently i915 request structure and shadow ring buffer are allocated
      before command scan, so it will have to restore to previous states once
      any error happens afterwards in the long dispatch_workload path.
      
      This patch is to introduce a reserved ring buffer created at the beginning
      of vGPU initialization. Workload will be coped to this reserved buffer and
      be scanned first, the i915 request and shadow ring buffer are only
      allocated after the result of scan is successful.
      
      To balance the memory usage and buffer alloc time, the coming bigger ring
      buffer will be reallocated and kept until more bigger buffer is coming.
      
      v2:
      - use kmalloc for the smaller ring buffer, realloc if required. (Zhenyu)
      
      v3:
      - remove the dynamically allocated ring buffer. (Zhenyu)
      
      v4:
      - code style polish.
      - kfree previous allocated buffer once kmalloc failed. (Zhenyu)
      Signed-off-by: Nfred gao <fred.gao@intel.com>
      Signed-off-by: NZhenyu Wang <zhenyuw@linux.intel.com>
      0a53bc07
    • C
      drm/i915/gvt: Add emulation for BAR2 (aperture) with normal file RW approach · f090a00d
      Changbin Du 提交于
      For vfio-pci, if the region support MMAP then it should support both
      mmap and normal file access. The user-space is free to choose which is
      being used. For qemu, we just need add 'x-no-mmap=on' for vfio-pci
      option.
      
      Currently GVTg only support MMAP for BAR2. So GVTg will not work when
      user turn on x-no-mmap option.
      
      This patch added file style access for BAR2, aka the GPU aperture. We
      map the entire aperture partition of active vGPU to kernel space when
      guest driver try to enable PCI Memory Space. Then we redirect the file
      RW operation from kvmgt to this mapped area.
      
      Link: https://bugzilla.redhat.com/show_bug.cgi?id=1458032Signed-off-by: NChangbin Du <changbin.du@intel.com>
      Signed-off-by: NZhenyu Wang <zhenyuw@linux.intel.com>
      f090a00d
  4. 10 8月, 2017 2 次提交
    • K
      drm/i915/gvt: Add shadow context descriptor updating · 9dfb8e5b
      Kechen Lu 提交于
      The current context logic only updates the descriptor of context when
      it's being pinned to graphics memory space. But this cannot satisfy the
      requirement of shadow context. The addressing mode of the pinned shadow
      context descriptor may be changed according to the guest addressing mode.
      And this won't be updated, as the already pinned shadow context has no
      chance to update its descriptor. And this will lead to GPU hang issue,
      as shadow context is used with wrong descriptor. This patch fixes this
      issue by letting the pinned shadow context descriptor update its
      addressing mode on demand.
      
      This patch fixes GPU HANG issue which happends after changing the
      grub parameter i915.enable_ppgtt form 0x01 to 0x03 or vice versa and
      then rebooting the guest.
      Signed-off-by: NTina Zhang <tina.zhang@intel.com>
      Signed-off-by: NKechen Lu <kechen.lu@intel.com>
      Signed-off-by: NZhenyu Wang <zhenyuw@linux.intel.com>
      9dfb8e5b
    • P
      drm/i915/gvt: Factor out scan and shadow from workload dispatch · 89ea20b9
      Ping Gao 提交于
      To perform the workload scan and shadow in ELSP writing stage for
      performance consideration, the workload scan and shadow stuffs
      should be factored out from dispatch_workload().
      
      v2:Put context pin before i915_add_request;
         Refine the comments;
         Rename some APIs;
      
      v3:workload->status should set only when error happens.
      v4:i915_add_request is must to have after i915_gem_request_alloc.
      Signed-off-by: NPing Gao <ping.a.gao@intel.com>
      Reviewed-by: NZhi Wang <zhi.a.wang@intel.com>
      Signed-off-by: NZhenyu Wang <zhenyuw@linux.intel.com>
      89ea20b9
  5. 04 8月, 2017 1 次提交
  6. 02 8月, 2017 1 次提交
  7. 11 7月, 2017 1 次提交
  8. 26 6月, 2017 1 次提交
    • C
      drm/i915/gvt: Fix possible recursive locking issue · 62d02fd1
      Chuanxiao Dong 提交于
      vfio_unpin_pages will hold a read semaphore however it is already hold
      in the same thread by vfio ioctl. It will cause below warning:
      
      [ 5102.127454] ============================================
      [ 5102.133379] WARNING: possible recursive locking detected
      [ 5102.139304] 4.12.0-rc4+ #3 Not tainted
      [ 5102.143483] --------------------------------------------
      [ 5102.149407] qemu-system-x86/1620 is trying to acquire lock:
      [ 5102.155624]  (&container->group_lock){++++++}, at: [<ffffffff817768c6>] vfio_unpin_pages+0x96/0xf0
      [ 5102.165626]
      but task is already holding lock:
      [ 5102.172134]  (&container->group_lock){++++++}, at: [<ffffffff8177728f>] vfio_fops_unl_ioctl+0x5f/0x280
      [ 5102.182522]
      other info that might help us debug this:
      [ 5102.189806]  Possible unsafe locking scenario:
      
      [ 5102.196411]        CPU0
      [ 5102.199136]        ----
      [ 5102.201861]   lock(&container->group_lock);
      [ 5102.206527]   lock(&container->group_lock);
      [ 5102.211191]
      *** DEADLOCK ***
      
      [ 5102.217796]  May be due to missing lock nesting notation
      
      [ 5102.225370] 3 locks held by qemu-system-x86/1620:
      [ 5102.230618]  #0:  (&container->group_lock){++++++}, at: [<ffffffff8177728f>] vfio_fops_unl_ioctl+0x5f/0x280
      [ 5102.241482]  #1:  (&(&iommu->notifier)->rwsem){++++..}, at: [<ffffffff810de775>] __blocking_notifier_call_chain+0x35/0x70
      [ 5102.253713]  #2:  (&vgpu->vdev.cache_lock){+.+...}, at: [<ffffffff8157b007>] intel_vgpu_iommu_notifier+0x77/0x120
      [ 5102.265163]
      stack backtrace:
      [ 5102.270022] CPU: 5 PID: 1620 Comm: qemu-system-x86 Not tainted 4.12.0-rc4+ #3
      [ 5102.277991] Hardware name: Intel Corporation S1200RP/S1200RP, BIOS S1200RP.86B.03.01.APER.061220151418 06/12/2015
      [ 5102.289445] Call Trace:
      [ 5102.292175]  dump_stack+0x85/0xc7
      [ 5102.295871]  validate_chain.isra.21+0x9da/0xaf0
      [ 5102.300925]  __lock_acquire+0x405/0x820
      [ 5102.305202]  lock_acquire+0xc7/0x220
      [ 5102.309191]  ? vfio_unpin_pages+0x96/0xf0
      [ 5102.313666]  down_read+0x2b/0x50
      [ 5102.317259]  ? vfio_unpin_pages+0x96/0xf0
      [ 5102.321732]  vfio_unpin_pages+0x96/0xf0
      [ 5102.326024]  intel_vgpu_iommu_notifier+0xe5/0x120
      [ 5102.331283]  notifier_call_chain+0x4a/0x70
      [ 5102.335851]  __blocking_notifier_call_chain+0x4d/0x70
      [ 5102.341490]  blocking_notifier_call_chain+0x16/0x20
      [ 5102.346935]  vfio_iommu_type1_ioctl+0x87b/0x920
      [ 5102.351994]  vfio_fops_unl_ioctl+0x81/0x280
      [ 5102.356660]  ? __fget+0xf0/0x210
      [ 5102.360261]  do_vfs_ioctl+0x93/0x6a0
      [ 5102.364247]  ? __fget+0x111/0x210
      [ 5102.367942]  SyS_ioctl+0x41/0x70
      [ 5102.371542]  entry_SYSCALL_64_fastpath+0x1f/0xbe
      
      put the vfio_unpin_pages in a workqueue can fix this.
      
      v2:
      - use for style instead of do{}while(1). (Zhenyu)
      v3:
      - rename gvt_cache_mark to gvt_cache_mark_remove. (Zhenyu)
      
      Fixes: 659643f7 ("drm/i915/gvt/kvmgt: add vfio/mdev support to KVMGT")
      Signed-off-by: NChuanxiao Dong <chuanxiao.dong@intel.com>
      Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
      Cc: stable@vger.kernel.org # v4.10+
      Signed-off-by: NZhenyu Wang <zhenyuw@linux.intel.com>
      62d02fd1
  9. 08 6月, 2017 8 次提交
  10. 30 3月, 2017 5 次提交
  11. 21 3月, 2017 1 次提交
  12. 17 3月, 2017 1 次提交
    • C
      drm/i915: make context status notifier head be per engine · 3fc03069
      Changbin Du 提交于
      GVTg has introduced the context status notifier to schedule the GVTg
      workload. At that time, the notifier is bound to GVTg context only,
      so GVTg is not aware of host workloads.
      
      Now we are going to improve GVTg's guest workload scheduler policy,
      and add Guc emulation support for new Gen graphics. Both these two
      features require acknowledgment for all contexts running on hardware.
      (But will not alter host workload.) So here try to make some change.
      
      The change is simple:
        1. Move the context status notifier head from i915_gem_context to
           intel_engine_cs. Which means there is a notifier head per engine
           instead of per context. Execlist driver still call notifier for
           each context sched-in/out events of current engine.
        2. At GVTg side, it binds a notifier_block for each physical engine
           at GVTg initialization period. Then GVTg can hear all context
           status events.
      
      In this patch, GVTg do nothing for host context event, but later
      will add a function there. But in any case, the notifier callback is
      a noop if this is no active vGPU.
      
      Since intel_gvt_init() is called at early initialization stage and
      require the status notifier head has been initiated, I initiate it in
      intel_engine_setup().
      
      v2: remove a redundant newline. (chris)
      
      Fixes: 3c7ba635 ("drm/i915: Introduce execlist context status change notification")
      Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100232Signed-off-by: NChangbin Du <changbin.du@intel.com>
      Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
      Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
      Cc: Zhi Wang <zhi.a.wang@intel.com>
      Reviewed-by: NChris Wilson <chris@chris-wilson.co.uk>
      Link: http://patchwork.freedesktop.org/patch/msgid/20170313024711.28591-1-changbin.du@intel.comAcked-by: NZhenyu Wang <zhenyuw@linux.intel.com>
      Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      3fc03069
  13. 24 2月, 2017 1 次提交
  14. 23 2月, 2017 2 次提交