1. 01 4月, 2012 4 次提交
  2. 07 3月, 2012 1 次提交
  3. 14 2月, 2012 1 次提交
  4. 03 2月, 2012 2 次提交
  5. 01 2月, 2012 1 次提交
  6. 20 1月, 2012 1 次提交
  7. 08 1月, 2012 1 次提交
  8. 23 12月, 2011 1 次提交
  9. 20 12月, 2011 2 次提交
  10. 08 12月, 2011 1 次提交
    • S
      ASoC: Tegra: Move DAS configuration into DAS driver · 7b9b5e11
      Stephen Warren 提交于
      Move DAS routing setup into the DAS driver itself. This removes the need
      to duplicate this in each machine driver, of which we'll soon have three.
      
      An added advantage is that the machine drivers no longer call the Tegra20-
      specific DAS functions by name, so the machine driver no longer needs to
      be split up into Tegra20 and Tegra30 versions.
      
      If individual machine drivers need a different routing setup to this
      default, they can still call the DAS functions to set that up.
      
      Long-term, DAS will be a codec driver, and user-space will be able to
      control its routing, possibly within constraints that the machine driver
      sets up. Configuring the DAS routing from the DAS driver is a very slight
      move in that direction.
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
      7b9b5e11
  11. 30 11月, 2011 1 次提交
  12. 29 11月, 2011 2 次提交
  13. 24 11月, 2011 3 次提交
  14. 23 11月, 2011 8 次提交
  15. 01 11月, 2011 1 次提交
  16. 18 10月, 2011 1 次提交
  17. 08 10月, 2011 1 次提交
  18. 03 10月, 2011 2 次提交
  19. 24 8月, 2011 1 次提交
    • S
      ASoC: Tegra: wm8903 machine driver: Drop Ventana support · ee1a4d4b
      Stephen Warren 提交于
      Board file support for Ventana is not yet mainlined, and probably won't
      ever be given the move to Device-Tree. Consequently, the Ventana entry
      is being removed from arch/arm/tools/mach-types in the next merge window,
      since it was registered over a year ago.
      
      This will also remove function machine_is_ventana(), which is used by
      the ASoC Tegra WM8903 machine driver. This will cause compilation
      failures. Drop Ventana support to resolve this.
      
      Hopefully, in the not-too-distant future, tegra_wm8903.c will be able to
      configure itself from Device-Tree, and hence we'll be able to re-instate
      Ventana support just by creating a .dts file for the board.
      
      Also note that Aebl support is in a similar boat. However, that board
      isn't scheduled for deprecation for at least another 5 months, and
      perhaps we will have completely removed non-Device-Tree support from
      tegra_wm8903.c by then and/or adjusted mach-types policy.
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      Acked-by: NLiam Girdwood <lrg@ti.com>
      Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
      ee1a4d4b
  20. 09 8月, 2011 2 次提交
    • S
      ASoC: Tegra: wm8903 machine driver: Allow re-insertion of module · 29591ed4
      Stephen Warren 提交于
      Two issues were preventing module snd-soc-tegra-wm8903.ko from being
      removed and re-inserted:
      
      a) The speaker-enable GPIO is hosted by the WM8903 chip. This GPIO must
         be freed before snd_soc_unregister_card() is called, because that
         triggers wm8903.c:wm8903_remove(), which calls gpiochip_remove(), which
         then fails if any of the GPIOs are in use. To solve this, free all GPIOs
         first, so the code doesn't care where they come from.
      
      b) We need to call snd_soc_jack_free_gpios() to match the call to
         snd_soc_jack_add_gpios() during initialization. Without this, the
         call to snd_soc_jack_add_gpios() fails during any subsequent modprobe
         and initialization, since the GPIO and IRQ are already registered. In
         turn, this causes the headphone state not to be monitored, so the
         headphone is assumed not to be plugged in, and the audio path to it is
         never enabled.
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      Cc: stable@kernel.org
      Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
      29591ed4
    • S
      ASoC: Tegra: tegra_pcm_deallocate_dma_buffer: Don't OOPS · a96edd59
      Stephen Warren 提交于
      Not all PCM devices have all sub-streams. Specifically, the SPDIF driver
      only supports playback and hence has no capture substream. Check whether
      a substream exists before dereferencing it, when de-allocating DMA
      buffers in tegra_pcm_deallocate_dma_buffer.
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      Acked-by: NLiam Girdwood <lrg@ti.com>
      Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
      Cc: stable@kernel.org
      a96edd59
  21. 06 7月, 2011 1 次提交
  22. 04 7月, 2011 2 次提交
    • S
      ASoC: Tegra: I2S: s/clk_get_sys/clk_get/ · b5f9cfed
      Stephen Warren 提交于
      The clock needed by the I2S driver is associated with the I2S device name
      in the standard fashion. Hence, use clk_get(dev) instead of clk_get_sys(clk_name).
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      Acked-by: NLiam Girdwood <lrg@ti.com>
      Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
      b5f9cfed
    • S
      ASoC: Tegra: I2S: Ensure clock is enabled when writing regs · 713d1369
      Stephen Warren 提交于
      The I2S controller needs a clock to respond to register writes. Without
      this, register writes will at worst hang the CPU. In practice, I've only
      observed writes being dropped.
      
      Luckily, the dropped register writes historically had no effect:
      
      TEGRA_I2S_TIMING: The value we wrote was the reset default.
      
      TEGRA_I2S_FIFO_SCR: The default was for the FIFOs to request more data
      when one slot was empty. The requested value was for the FIFOs to request
      when four slots were empty. The DMA controller in the mainline kernel is
      configured to burst a single entry at a time into the FIFO, hence there
      was no issue. The only negative effect was on bus efficiency losses due
      to an increased number of arbitration attempts.
      
      However, in various non-upstream changes, the DMA controller now bursts
      four entries at a time into the FIFO. If there is only space for one
      entry, the data is simply dropped. In practice, this resulted in 3/4 of
      samples being dropped, and playback at 4x the expected rate and pitch.
      By fixing the clocking issue, this is solved.
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      Acked-by: NLiam Girdwood <lrg@ti.com>
      Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
      713d1369