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  1. 04 6月, 2013 4 次提交
  3. 10 5月, 2013 1 次提交
    • F
      ARM: imx: Select GENERIC_ALLOCATOR · 60371952
      由 Fabio Estevam 提交于 
      Since commit 657eee7d (media: coda: use genalloc API) the following build
error happens with imx_v4_v5_defconfig:

drivers/built-in.o: In function 'coda_remove':
clk-composite.c:(.text+0x112180): undefined reference to 'gen_pool_free'
drivers/built-in.o: In function 'coda_probe':
clk-composite.c:(.text+0x112310): undefined reference to 'of_get_named_gen_pool'
clk-composite.c:(.text+0x1123f4): undefined reference to 'gen_pool_alloc'
clk-composite.c:(.text+0x11240c): undefined reference to 'gen_pool_virt_to_phys'
clk-composite.c:(.text+0x112458): undefined reference to 'dev_get_gen_pool'

Select GENERIC_ALLOCATOR and get rid of the custom IRAM_ALLOC.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
Signed-off-by: NOlof Johansson <olof@lixom.net>
      60371952
  5. 30 4月, 2013 5 次提交
  7. 19 4月, 2013 1 次提交
    • A
      mmc: sdhci-s3c: remove platform dependencies · cc014f3e
      由 Arnd Bergmann 提交于 
      plat/regs-sdhci.h is not used anywhere but in the sdhci-s3c
driver, so it can become a local file there and all other
inclusions removed.

plat/sdhci.h is used only to define the platform devices,
and with the exception of the platform_data structure not
needed by the driver, so we can split out the platform_data
definition instead and leave the rest to platform code.
Signed-off-by: NArnd Bergmann <arnd@arndb.de>
Acked-by: NChris Ball <cjb@laptop.org>
      cc014f3e
  9. 16 4月, 2013 2 次提交
  11. 13 4月, 2013 2 次提交
  13. 12 4月, 2013 1 次提交
    • A
      spi: s3c64xx: move to generic dmaengine API · 78843727
      由 Arnd Bergmann 提交于 
      The spi-s3c64xx uses a Samsung proprietary interface for
talking to the DMA engine, which does not work with
multiplatform kernels.

This version of the patch leaves the old code in place,
behind an #ifdef. This can be removed in the future,
after the s3c64xx platform start supporting the regular
dmaengine interface. An earlier version of this patch was
tested successfully on exynos5250 by Padma Venkat.

The conversion was rather mechanical, since the samsung
interface is just a shallow wrapper around the dmaengine
interface.
Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      78843727
  15. 11 4月, 2013 1 次提交
  17. 08 4月, 2013 6 次提交
  19. 05 4月, 2013 1 次提交
  21. 04 4月, 2013 1 次提交
  23. 03 4月, 2013 3 次提交
  25. 02 4月, 2013 3 次提交
    • C
      usb: mv_usb: remove clock name from pdata · ef096542
      由 Chao Xie 提交于 
      Using pdata to pass clock name is not correct.
Directly get clock from usb drivers.
Signed-off-by: NChao Xie <chao.xie@marvell.com>
Signed-off-by: NFelipe Balbi <balbi@ti.com>
      ef096542
    • K
      leds: lp55xx: configure the clock detection · 81f2a5b4
      由 Kim, Milo 提交于 
      Now LP55xx provides automatic clock detection API, lp55xx_is_extclk_used().
The clock configuration can be done by the driver itself.

(a) Concept
The default value is set by each driver with clock selection.
The internal clock selection bit is updated in case that the external clock
is not detected or clock rate is not 32KHz.

(b) Change on LP55xx platform data
The clock configuration is done automatically, so no need to define
'update_config' in the platform side.
Correlated information are removed in the documentations and header.

(c) Definitions moved from header to driver files
CONFIG register values are moved each driver, LP5521 and LP5562.
Not necessary definitions are removed also.
Signed-off-by: NMilo(Woogyom) Kim <milo.kim@ti.com>
Signed-off-by: NBryan Wu <cooloney@gmail.com>
      81f2a5b4
    • K
      leds: add new LP5562 LED driver · ff45262a
      由 Kim, Milo 提交于 
      LP5562 can drive up to 4 channels, RGB and White.
LEDs can be controlled directly via the led class control interface.

 LP55xx common driver
  LP5562 is one of LP55xx family device, so LP55xx common code are used.
  On the other hand, chip specific configuration is defined in the structure
  'lp55xx_device_config'

 LED pattern data
  LP5562 has also internal program memory which is used for running various LED
  patterns. LP5562 driver supports the firmware interface and the predefined
  pattern data as well.

 LP5562 device attributes: 'led_pattern' and 'engine_mux'
  A 'led_pattern' is an index code which runs the predefined pattern data.
  And 'engine_mux' is updated with the firmware interface is activated.
  Detailed description has been updated in the documentation files,
  'leds-lp55xx.txt' and 'leds-lp5562.txt'.

 Changes on the header file
  LP5562 configurable definitions are added.
  Pattern RGB data is fixed as constant value.
  (No side effect on other devices, LP5521 or LP5523.)

(cooloney@gmail.com: remove redundant mutex_unlock(). Reported by Dan
Carpenter <dan.carpenter@oracle.com>)
Signed-off-by: NMilo(Woogyom) Kim <milo.kim@ti.com>
Signed-off-by: NBryan Wu <cooloney@gmail.com>
      ff45262a
  27. 26 3月, 2013 1 次提交
  29. 22 3月, 2013 1 次提交
    • R
      ACPI / scan: Add special handler for Intel Lynxpoint LPSS devices · f58b082a
      由 Rafael J. Wysocki 提交于 
      Devices on the Intel Lynxpoint Low Power Subsystem (LPSS) have some
common features that aren't shared with any other platform devices,
including the clock and LTR (Latency Tolerance Reporting) registers.
It is better to handle those features in common code than to bother
device drivers with doing that (I/O functionality-wise the LPSS
devices are generally compatible with other devices that don't
have those special registers and may be handled by the same drivers).

The clock registers of the LPSS devices are now taken care of by
the special clk-x86-lpss driver, but the MMIO mappings used for
accessing those registers can also be used for accessing the LTR
registers on those devices (LTR support for the Lynxpoint LPSS is
going to be added by a subsequent patch).  Thus it is convenient
to add a special ACPI scan handler for the Lynxpoint LPSS devices
that will create the MMIO mappings for accessing the clock (and
LTR in the future) registers and will register the LPSS devices'
clocks, so the clk-x86-lpss driver will only need to take care of
the main Lynxpoint LPSS clock.

Introduce a special ACPI scan handler for Intel Lynxpoint LPSS
devices as described above.  This also reduces overhead related to
browsing the ACPI namespace in search of the LPSS devices before the
registration of their clocks, removes some LPSS-specific (and
somewhat ugly) code from acpi_platform.c and shrinks the overall code
size slightly.
Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
Acked-by: NMike Turquette <mturquette@linaro.org>
      f58b082a
  31. 18 3月, 2013 4 次提交
    • M
      irqchip: Renesas IRQC driver · fbc83b7f
      由 Magnus Damm 提交于 
      This patch adds a driver for external IRQ pins connected
to the IRQC hardware block on recent SoCs from Renesas.

The IRQC hardware block is used together with more
recent ARM based SoCs using the GIC. As usual the GIC
requires external IRQ trigger setup somewhere else
which in this particular case happens to be IRQC.

This driver implements the glue code needed to configure
IRQ trigger and also handle mask/unmask and demux of
external IRQ pins hooked up from the IRQC to the GIC.

Tested on r8a73a4 but is designed to work with a wide
range of SoCs. The driver requires one GIC SPI per
external IRQ pin to operate.  Each driver instance
will handle up to 32 external IRQ pins.

The SoCs using this driver are currently mainly used
together with regular platform devices so this driver
allows configuration via platform data to support things
like static interrupt base address. DT support will
be added incrementally in the not so distant future.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Tested-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
      fbc83b7f
    • M
      irqchip: intc-irqpin: GPL header for platform data · 0ca87122
      由 Magnus Damm 提交于 
      Add GPL header to platform data include file.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Reviewed-by: NThomas Gleixner <tglx@linutronix.de>
Tested-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
      0ca87122
    • M
      irqchip: Renesas INTC External IRQ pin driver · 44358048
      由 Magnus Damm 提交于 
      This patch adds a driver for external IRQ pins connected
to the INTC block on recent SoCs from Renesas.

The INTC hardware block usually contains a rather wide
range of features ranging from external IRQ pin handling
to legacy interrupt controller support. On older SoCs
the INTC is used as a general purpose interrupt controller
both for external IRQ pins and on-chip devices.

On more recent ARM based SoCs with Cortex-A9 the main
interrupt controller is the GIC, but IRQ trigger setup
still need to happen in the INTC hardware block.

This driver implements the glue code needed to configure
IRQ trigger and also handle mask/unmask and demux of
external IRQ pins hooked up from the INTC to the GIC.

Tested on sh73a0 and r8a7779. The hardware varies quite
a bit with SoC model, for instance register width and
bitfield widths vary wildly. The driver requires one GIC
SPI per external IRQ pin to operate.  Each driver instance
will handle up to 8 external IRQ pins.

The SoCs using this driver are currently mainly used
together with regular platform devices so this driver
allows configuration via platform data to support things
like static interrupt base address. DT support will
be added incrementally in the not so distant future.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Acked-by: NThomas Gleixner <tglx@linutronix.de>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
      44358048
    • K
      usb: dwc3: omap: remove platform data associated with dwc3-omap · 4495afcf
      由 Kishon Vijay Abraham I 提交于 
      omap5 is not going to have support for non-dt boot making the platform
data associated with dwc3 useless. Removed it here.
Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: NFelipe Balbi <balbi@ti.com>
      4495afcf
  33. 13 3月, 2013 1 次提交
  35. 10 3月, 2013 1 次提交
  37. 25 2月, 2013 1 次提交