After the patch series for system suspending support, tegra_idle_lp2_last()
no longer uses its parameters cpu_on_time or cpu_off_time, so remove them.
Signed-off-by: NJoseph Lo <josephl@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

Adding suspend to RAM support for Tegra platform. There are three suspend
mode for Tegra. The difference were below.

* LP2: CPU voltage off
* LP1: CPU voltage off, DRAM in self-refresh
* LP0: CPU + Core voltage off, DRAM in self-refresh

After this patch, the LP2 suspend mode will be supported.
Signed-off-by: NJoseph Lo <josephl@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

The PMC mostly controls the entry and exit of the system from different
sleep modes. Different platform or system may have different configurations.
The power management configurations of PMC is represented as some properties.
The system needs to define the properties when the system supports deep sleep
mode (i.e. suspend).

Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: devicetree-discuss@lists.ozlabs.org
Signed-off-by: NJoseph Lo <josephl@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

Add the wake up handling for legacy irq controller, and using
IRQCHIP_MASK_ON_SUSPEND for wake irq handling.

Based on the work by:
Varun Wadekar <vwadekar@nvidia.com>
Signed-off-by: NJoseph Lo <josephl@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

The CPU power timer set up function was related to PMC register. Now moving
it to PMC driver. And it also help to clean up the PM related code later.

The timer was calculated based on the input clock of PMC. In this patch, we
also get the clock from DT.
Signed-off-by: NJoseph Lo <josephl@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

Adding the bindings of the clock source of PMC in DT.
Signed-off-by: NJoseph Lo <josephl@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

Add speedo-based process identification for Tegra114.

Based on the work by: Alex Frid <afrid@nvidia.com>
Signed-off-by: NDanny Huang <dahuang@nvidia.com>
[swarren: added include of bug.h]
Signed-off-by: NStephen Warren <swarren@nvidia.com>

Expose Tegra chip ID and revision in /sys/devices/soc for user mode
usage
Signed-off-by: NDanny Huang <dahuang@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

The secondary CPU can be brought up by toggling the power in PMC. Then
the flow controller will release CPU to go by clearing the reset and
clamp signal automatically.

Based on the work by:
Bo Yan <byan@nvidia.com>
Signed-off-by: NJoseph Lo <josephl@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

Using the CPU power on function in PMC driver to bring up secondary CPUs,
because we are going to re-factor powergate driver to support generic
power domain. It will be removed later and added the generic power domain
support in PMC driver.
Signed-off-by: NJoseph Lo <josephl@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

Adding the power on function for secondary CPUs in PMC driver, this can
help us to remove legacy powergate driver and add generic power domain
support later.
Signed-off-by: NJoseph Lo <josephl@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

The Tegra kernel only support boot from DT now. Clean up the PMC driver
to support DT only, that includes:

* remove the ifdef of CONFIG_OF
* replace the static mapping of PMC addr to map from DT
Signed-off-by: NJoseph Lo <josephl@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

The PMC HW is not 100% compatible across all Tegra series. We need to
specify them in DT.
Signed-off-by: NJoseph Lo <josephl@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

The PMC HW is not 100% compatible across all Tegra series. We need to
specify each of them in the DT match table.
Signed-off-by: NJoseph Lo <josephl@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

"tegra_boot_secondary()" has many condition branches for some Tegra
SoC generations in a single function so that it's not easy to compile
a kernel only for a single SoC if one wants with some reason, debug
purpose(?). This patch provides SoC specific version of
boot_secondary(), tegra{20,30}_boot_secondary(). This could allow
any combination of SoC to be built. Those boot_secondary functions can
be preparation when we ntroduce chip specific function pointers in the
future without having chip dependent branches around.

Also removed unused definition/prototpye.
Signed-off-by: NHiroshi Doyu <hdoyu@nvidia.com>
[josephl: remove the Tegra114 part of the original patch]
Signed-off-by: NJoseph Lo <josephl@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

The new clockframework introduced DT IDs for each clock. To be able to remove
the device registrations, this driver needs to be updated to use the DT IDs.
Note that the actual removal of the clk_register_clkdev() calls will be done
in a later series.
Signed-off-by: NPeter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

Unify board-dt-tegra{30,114} to the Tegra20 DT board file, "tegra.c".
Signed-off-by: NHiroshi Doyu <hdoyu@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

This is the preparation to unify "board-dt-tegra{20,30,114}.c" to a
single file "tegra.c".
Signed-off-by: NHiroshi Doyu <hdoyu@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

Refactored tegra{20,30,114}_init_early() so that we have the unified
tegra_init_early().
Signed-off-by: NHiroshi Doyu <hdoyu@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

This fixes:

arch/arm/mach-tegra/board-harmony-pcie.c: In function ‘harmony_pcie_init’:
arch/arm/mach-tegra/board-harmony-pcie.c:65:18: warning: ignoring return
    value of ‘regulator_enable’, declared with attribute
    warn_unused_result [-Wunused-result]
Signed-off-by: NStephen Warren <swarren@nvidia.com>

The warm boot sequence of Tegra30 secondary CPUs should wait for the
power ready then removing the clamps.

This did not fix any known or unknown issue, but nice to have this fix.
Signed-off-by: NJoseph Lo <josephl@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

Check a return value for tegra_powergate_remove_clamping().
Signed-off-by: NHiroshi Doyu <hdoyu@nvidia.com>
Signed-off-by: NJoseph Lo <josephl@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

There is no need to unlock MMIO access to the DBGLAR all the time. Doing
so may even cause problems if a SW bug causes writes to that MMIO region.

Cortex-A15 processors do not support the CP14 register write the code
currently uses to unlock the DBGLAR; the instruction throws an undefined
instruction exceptions. This prevents tegra_secondary_startup() from
executing on Tegra114, and hence prevents SMP.

Remove the code that unlocks this access.
Signed-off-by: NJoseph Lo <josephl@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

Prior to this change, {save,restore}_cpu_arch_register() collaborated to
maintain the value of the CPU diagnostic register across power cycles.
This was required to maintain any CPU errata workaround enable bits in
that register. However, now that the Tegra reset vector code always
enables all required workarounds, there is no need to save and restore
the diagnostic register; it is always explicitly programmed in the
required manner.

Hence, remove the save/restore logic.

This has the advantage that the kernel always directly controls the value
of this register every boot, rather than relying on a bootloader or other
kernel code having previously written the correct value into it. This
makes CPU0 (which was previously saved/restored) and CPUn (which should
have been set up by the reset vector) be controlled in exactly the same
way, which is easier to debug/find/...

In particular, when converting Tegra to a multi-platform kernel, the CPU0
diagnostic register value initially comes from the bootloader. Most Tegra
bootloaders don't yet enable all required CPU bug workarounds. The
previous commit updates the kernel to do so on any CPU power cycle.
However, the save/restore code ends up over-writing the value with the
old bootloader-driven value instead of the now more-likely-to-be-correct
kernel value!

Even irrespective of multi-platform conversion, this change limits the
kernel's exposure to any WARs the bootloader didn't enable for CPU0: on
the very first LP2 transition (CPU power-saving which power-cycles the
CPU), the correct value will be enabled.
Signed-off-by: NStephen Warren <swarren@nvidia.com>

The CPU cores in Tegra contain some errata. Workarounds must be applied
for these every time a CPU boots. Implement those workarounds directly
in the Tegra-specific CPU reset vector.

Many of these workarounds duplicate code in the core ARM kernel.

However, the core ARM kernel cannot enable those workarounds when
building a multi-platform kernel, since they require writing to secure-
only registers, and a multi-platform kernel often does not run in secure
mode, and also cannot generically/architecturally detect whether it is
running in secure mode, and hence cannot either unconditionally or
conditionally apply these workarounds.

Instead, the workarounds must be applied in architecture-specific reset
code, which is able to have more direct knowledge of the secure/normal
state. On Tegra, we will be able to detect this using a non-architected
register in the future, although we currently assume the kernel runs only
in secure mode. Other SoCs may never run the kernel in secure mode, and
hence always rely on a secure monitor to enable the workarounds, and
hence never implement them in the kernel.
Signed-off-by: NStephen Warren <swarren@nvidia.com>

The GPIO pin of SD slot card detection should active low.
Signed-off-by: NJoseph Lo <josephl@nvidia.com>
Tested-by: NThierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

metag/allmodconfig:

drivers/media/v4l2-core/videobuf2-dma-contig.c: In function 'vb2_dc_get_base_sgt':
drivers/media/v4l2-core/videobuf2-dma-contig.c:387: error: implicit declaration of function 'dma_get_sgtable'

For architectures using dma_map_ops, dma_get_sgtable() is provided in
<asm-generic/dma-mapping-common.h>.

Metag does not use dma_map_ops yet, hence it should implement it as an
inline stub using dma_common_get_sgtable().
Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
Cc: Geert Uytterhoeven <geert@linux-m68k.org>
Acked-by: NMarek Szyprowski <m.szyprowski@samsung.com>

Metag doesn't have a metag_dt_memblock_reserve() function so remove the
declaration from asm/prom.h.
Signed-off-by: NJames Hogan <james.hogan@imgtec.com>

Make a copy of the device tree blob in non-init memory. It is required
when using built-in device tree files that the platform code copies the
blob to non-init memory prior to calling unflatten_device_tree(),
otherwise the strings that the device tree refer to will get poisoned
and potentially reused, breaking later reading of the device tree
post-init (such as compatible matching in modules, debugfs, and the
procfs interface).
Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
Reviewed-by: NVineet Gupta <vgupta@synopsys.com>

Minimise metag_ksyms.c includes to directly include the <asm/*.h> files
that declare a particular symbol, and not include any unnecessary ones.
Signed-off-by: NJames Hogan <james.hogan@imgtec.com>

It's less error prone to have function symbols exported immediately
after the function rather than in metag_ksyms.c. Move each EXPORT_SYMBOL
in metag_ksyms.c for symbols defined in mm/init.c into mm/init.c.
Signed-off-by: NJames Hogan <james.hogan@imgtec.com>

It's less error prone to have function symbols exported immediately
after the function rather than in metag_ksyms.c. Move each EXPORT_SYMBOL
in metag_ksyms.c for symbols defined in usercopy.c into usercopy.c
Signed-off-by: NJames Hogan <james.hogan@imgtec.com>

It's less error prone to have function symbols exported immediately
after the function rather than in metag_ksyms.c. Move each EXPORT_SYMBOL
in metag_ksyms.c for symbols defined in setup.c into setup.c
Signed-off-by: NJames Hogan <james.hogan@imgtec.com>

It's less error prone to have function symbols exported immediately
after the function rather than in metag_ksyms.c. Move each EXPORT_SYMBOL
in metag_ksyms.c for symbols defined in kick.c into kick.c
Signed-off-by: NJames Hogan <james.hogan@imgtec.com>

It's less error prone to have function symbols exported immediately
after the function rather than in metag_ksyms.c. Move each EXPORT_SYMBOL
in metag_ksyms.c for symbols defined in traps.c into traps.c
Signed-off-by: NJames Hogan <james.hogan@imgtec.com>

The SMP version of arch_local_irq_enable() uses preempt_disable(), but
<asm/irqflags.h> doesn't include <linux/preempt.h> causing the following
errors on SMP when pstore/ftrace is enabled (caught by buildbot smp
allyesconfig):

In file included from include/linux/irqflags.h:15,
                 from fs/pstore/ftrace.c:16:
arch/metag/include/asm/irqflags.h: In function 'arch_local_irq_enable':
arch/metag/include/asm/irqflags.h:84: error: implicit declaration of function 'preempt_disable'
arch/metag/include/asm/irqflags.h:86: error: implicit declaration of function 'preempt_enable_no_resched'

However <linux/preempt.h> cannot be easily included from
<asm/irqflags.h> as it can cause circular include dependencies in the
!SMP case, and potentially in the SMP case in the future. Therefore move
the SMP implementation of arch_local_irq_enable() into traps.c and use
an inline version of get_trigger_mask() which is also defined in traps.c
for SMP.

This adds an extra layer of function call / stack push when
preempt_disable needs to call other functions, however in the
non-preemptive SMP case it should be about as fast, as it was already
calling the get_trigger_mask() function which is now used inline.
Signed-off-by: NJames Hogan <james.hogan@imgtec.com>

Convert hugetlb_get_unmapped_area_new_pmd() to use vm_unmapped_area()
rather than searching the virtual address space itself. This fixes the
following errors in linux-next due to the specified members being
removed after other architectures have already been converted:

arch/metag/mm/hugetlbpage.c: In function 'hugetlb_get_unmapped_area_new_pmd':
arch/metag/mm/hugetlbpage.c:199: error: 'struct mm_struct' has no member named 'cached_hole_size'
arch/metag/mm/hugetlbpage.c:200: error: 'struct mm_struct' has no member named 'free_area_cache'
arch/metag/mm/hugetlbpage.c:215: error: 'struct mm_struct' has no member named 'cached_hole_size'
Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
Acked-by: NMichel Lespinasse <walken@google.com>

Various file systems use clear_page() and copy_page(), so when they're
built as modules we get build errors like the following:

ERROR: "clear_page" [fs/ntfs/ntfs.ko] undefined!
ERROR: "copy_page" [fs/nilfs2/nilfs2.ko] undefined!

Therefore export these functions to modules from metag_ksyms.c to fix
the errors. This was hit by a randconfig build.
Signed-off-by: NJames Hogan <james.hogan@imgtec.com>

Various file systems indirectly use metag_code_cache_flush_all(), so
when they're built as modules we get build errors like the following:

ERROR: "metag_code_cache_flush_all" [fs/xfs/xfs.ko] undefined!

Therefore export this function to modules to fix the errors. This was
hit by a randconfig build.
Signed-off-by: NJames Hogan <james.hogan@imgtec.com>

Rename setup_txprivext() to setup_priv() and add initialisation of some
more per-thread privilege protection registers:

 - TxPRIVSYSR: 0x04400000-0x047fffff
               0x05000000-0x07ffffff
               0x84000000-0x87ffffff
 - TxPIOREG:   0x02000000-0x02ffffff
               0x04800000-0x048fffff
 - TxSYREG:    0x04000000-0x04000fff (except write fetch system event)
Signed-off-by: NJames Hogan <james.hogan@imgtec.com>