Every DMA engine implementation declares a last completed dma cookie
in their private dma channel structures.  This is pointless, and
forces driver specific code.  Move this out into the common dma_chan
structure.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
Tested-by: NLinus Walleij <linus.walleij@linaro.org>
Reviewed-by: NLinus Walleij <linus.walleij@linaro.org>
Acked-by: NJassi Brar <jassisinghbrar@gmail.com>
[imx-sdma.c & mxs-dma.c]
Tested-by: NShawn Guo <shawn.guo@linaro.org>
Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>

mv_xor's is_complete_cookie is only ever written to, but never read.
This is silly, remove the write-only structure member.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
Tested-by: NLinus Walleij <linus.walleij@linaro.org>
Reviewed-by: NLinus Walleij <linus.walleij@linaro.org>
Acked-by: NJassi Brar <jassisinghbrar@gmail.com>
[imx-sdma.c & mxs-dma.c]
Tested-by: NShawn Guo <shawn.guo@linaro.org>
Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>

Signed-off-by: NViresh Kumar <viresh.kumar@st.com>
Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>

This patch adds support for DMA_SLAVE_CONFIG in dwc DMAC controller. Fields in
struct dw_dma_slave for passing similar data are preserved in this patch untill
all existing users are fixed.

That will be handled later in this patchset.
Signed-off-by: NViresh Kumar <viresh.kumar@st.com>
Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>

64 bit transfers are possible on both sides in slave transfers (memory as well
as peripherals). This patch adds support for it memory side 64 bit transfers.
Signed-off-by: NViresh Kumar <viresh.kumar@st.com>
Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>

Block interrupts give interrupt on completion of every LLI, which is actually
too much interrupts. This is just not required for current functioning of
dw_dmac.

So, just don't handle them at all.
Signed-off-by: NViresh Kumar <viresh.kumar@st.com>
Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>

Use already defined function dev_get_platdata() instead of accessing
pdev->dev.data.
Signed-off-by: NViresh Kumar <viresh.kumar@st.com>
Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>

Total number of channels is passed in pdata->nr_channels variable, thus we must
not use magic number '7' for total number of channels.
Signed-off-by: NViresh Kumar <viresh.kumar@st.com>
Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>

Flow controller information is passed now from DMA_SLAVE_CONFIG option. This
patch makes changes in pl08x driver to use device_fc from it instead of platform
data.
Signed-off-by: NViresh Kumar <viresh.kumar@st.com>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>

The suspend and resume implementation is through dev_pm_ops in dmac. So
in order to support hibernation, freeze, thaw, restore and poweroff
features are required.
Signed-off-by: NRajeev Kumar <rajeev-dlh.kumar@st.com>
Acked-by: NViresh Kumar <viresh.kumar@st.com>
Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>

Move pm_runtime_put() to the end of intel_mid_dma_free_chan_resources()
because there is no sense in allowing runtime suspend while the driver
is still accessing the device.
Signed-off-by: NAdrian Hunter <adrian.hunter@intel.com>
Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>

The error status mask (MASK_ERR) has the same format as the other
masks (MASK_TFR, MASK_BLOCK etc) and must be cleared the same way.
Signed-off-by: NAdrian Hunter <adrian.hunter@intel.com>
Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>

Commit 6584cb88 (ARM i.MX dma: Fix burstsize settings) fixed
the mxcmmc driver but forgot to fix the SDMA driver to handle the
correct burtsize.
This make the SD card access works again with DMA on i.MX31 boards.
Signed-off-by: NPhilippe Rétornaz <philippe.retornaz@epfl.ch>
Tested-by: NSascha Hauer <s.hauer@pengutronix.de>
Acked-by: NSascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>

Add a flag to allow platforms to specify, whether a DMAC instance supports
the MEMCPY operation. To avoid regressions, preserve the current default.
Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de>
Acked-by: NPaul Mundt <lethal@linux-sh.org>
Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>

commit 46389470 deleted redundant
chan_id and chancnt initialization in dma drivers as this is done
in dma_async_device_register().

However, atc_enable_irq() relied on chan_id set before registering
the device, what left only channel 0 functional for this driver.

This patch introduces atc_enable/disable_chan_irq() as a variant
of atc_enable/disable_irq() with the channel as explicit argument.
Signed-off-by: NNikolaus Voss <n.voss@weinmann.de>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
Cc: stable <stable@vger.kernel.org>
Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>

We don't need extra lock, so we use non-atomic bit ops to set/clear bits,

merge event_mask0 and event_mask1 into an array, it helps use bit ops.

It also fixs the issue:

sdmac->event_mask0 = 1 << sdmac->event_id0;
sdmac->event_mask1 = 1 << (sdmac->event_id0 - 32);

It event_id0 < 32, it shifts negative number. If event_id0 >= 32, it
shifts number >= sizeof(int). Both the cases behavior is undefined.
Signed-off-by: NRichard Zhao <richard.zhao@linaro.org>
Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>

event number is not always 32. use num_events for checking instead.
Signed-off-by: NRichard Zhao <richard.zhao@linaro.org>
Acked-by: NShawn Guo <shawn.guo@linaro.org>
Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>

It makes clk_enable/disable pair more readable, and fix one bug:
sdma_init calls sdma_request_channel, but seems don't know
sdma_request_channel enabled the clock.
Signed-off-by: NRichard Zhao <richard.zhao@linaro.org>
Acked-by: NShawn Guo <shawn.guo@linaro.org>
[fixed typo in commit log]
Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>

sdma_request_channel sets the default priority. sdma_alloc_chan_resources
should call sdma_set_channel_priority thereafter to over write it.
Signed-off-by: NRichard Zhao <richard.zhao@linaro.org>
Acked-by: NShawn Guo <shawn.guo@linaro.org>
Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>

use readl_relaxed/writel_relaxed in most places, and use writel when
enable channel, because it needs memory barrier.
Signed-off-by: NRichard Zhao <richard.zhao@linaro.org>
Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>

Let all enable channel code call sdma_enable_channel.
Signed-off-by: NRichard Zhao <richard.zhao@linaro.org>
Acked-by: NShawn Guo <shawn.guo@linaro.org>
Acked-by: NSascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>

Rewrite a duplicated test to test the correct value

The semantic match that finds this problem is as follows:
(http://coccinelle.lip6.fr/)

// <smpl>
@@
expression E;
@@

(
* E
  || ... || E
|
* E
  && ... && E
)
// </smpl>
Signed-off-by: NJulia Lawall <Julia.Lawall@lip6.fr>
Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>

Add missing iounmap in error handling code, in a case where the function
already preforms iounmap on some other execution path.

This patch additionally adds calls to clk_disable and clk_put.

A simplified version of the semantic match that finds this problem is as
follows: (http://coccinelle.lip6.fr/)

// <smpl>
@@
expression e;
statement S,S1;
int ret;
@@
e = \(ioremap\|ioremap_nocache\)(...)
... when != iounmap(e)
if (<+...e...+>) S
... when any
    when != iounmap(e)
*if (...)
   { ... when != iounmap(e)
     return ...; }
... when any
iounmap(e);
// </smpl>
Signed-off-by: NJulia Lawall <Julia.Lawall@lip6.fr>
Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>

The DMA engine API requires that transfers are started in issue_pending
instead of tx_submit. Fix this.
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
[corrected change log to DMA engine API insteadof DMA API]
Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>

The DMA engine API requires that transfers are started in issue_pending
instead of tx_submit. Fix this.
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
[corrected change log to DMA engine API insteadof DMA API]
Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>

Hi,
  On the latest tree my compiler has started giving the warning:

drivers/dma/dmatest.c:575:28: warning: the omitted middle operand in ?: will always be ?true?, suggest explicit middle operand [-Wparentheses]

The following patch fixes the missing middle clause with the same
fix that Nicolas Ferre used in the similar clauses.
(There seems to have been a race between him fixing that and
the extra clause going in a little later).

I don't actually know the dmatest code/structures, nor do I own
any hardware to test it on (assuming it needs a DMA engine);
 but this patch builds, the existing code is almost certainly
wrong and the fix is the same as the corresponding lines above it.

(WTH is x=y?:z legal C anyway?)
Signed-off-by: NDr. David Alan Gilbert <linux@treblig.org>
Reported-by: NDan Carpenter <dan.carpenter@oracle.com>
Reported-by: NPaul Gortmaker <paul.gortmaker@windriver.com>
Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: NDan Williams <dan.j.williams@intel.com>

On platforms, supporting power domains, if the domain, containing a DMAC
instance is powered down, the driver fails to resume correctly. On those
platforms DMAC channels have an additional CHCLR register for clearing
channel buffers. Using this register during runtime resume fixes the
problem.
Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>

mx53_loco: fix deadlock report from sdma_tx_submit() during boot

BugLink: http://bugs.launchpad.net/bugs/878701

Adjust to use spin_lock_irqsave()/spin_unlock_irqresotre(), so to
make it safe when called from interrupt context.
Signed-off-by: NHaitao Zhang <haitao.zhang@linaro.org>
Signed-off-by: NEric Miao <eric.miao@linaro.org>
Signed-off-by: NRichard Zhao <richard.zhao@linaro.org>
Acked-by: NSascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>

Otherwise if a previously physical channel is used as a logical channel, the
LNK may have old values which affect the operation of the logical channel since
the LNK register has different semantics between physical and logical channels.
Signed-off-by: NRabin Vincent <rabin.vincent@stericsson.com>
Reviewed-by: NJonas ABERG <jonas.aberg@stericsson.com>
Signed-off-by: NNarayanan G <narayanan.gopalakrishnan@stericsson.com>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>

Drivers should not support both legacy pm and new framework.
Signed-off-by: NKristen Carlson Accardi <kristen@linux.intel.com>
Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>

The patch converts mxs-dma driver to clk_prepare/clk_unprepare by
using helper functions clk_prepare_enable/clk_disable_unprepare.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
Acked-by: NMarek Vasut <marek.vasut@gmail.com>
Acked-by: NVinod Koul <vinod.koul@linux.intel.com>

Add missing iounmap in error path.
Signed-off-by: NAdrian Hunter <adrian.hunter@intel.com>
Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>

Two issues are fixed:

1. DMA descriptors are reused so when freeing lli structures
that are linked to them, the pointer must be nulled.

2. midc_scan_descriptors() must be called with the
channel lock held.
Signed-off-by: NAdrian Hunter <adrian.hunter@intel.com>
Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>

Before dma_transfer_direction was introduced to replace
dma_data_direction, some dmaengine device uses DMA_NONE of
dma_data_direction for some talk with its client drivers.
The mxs-dma and its clients mxs-mmc and gpmi-nand are such case.

This patch adds DMA_TRANS_NONE to dma_transfer_direction and
migrate the DMA_NONE use in mxs-dma to it.

It also fixes the compile warning below.

CC      drivers/dma/mxs-dma.o
drivers/dma/mxs-dma.c: In function ‘mxs_dma_prep_slave_sg’:
drivers/dma/mxs-dma.c:420:16: warning: comparison between ‘enum dma_transfer_direction’ and ‘enum dma_data_direction’
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>

This is how the original Freescale code (unintentionally) worked,
because the code path which would have asserted the CLKGATE bit was
never actually reached in their code.
This fixes the nefarious "DMA timout" bug when multiple DMA channels
(e.g. GPMI NAND and MMC) are used at the same time.
If a better fix for this problem should be found, the clkgate handling
could be reinstated.
See http://lists.infradead.org/pipermail/linux-arm-kernel/2011-September/065228.html

Also reverse the order of mxs_dma_disable_chan() and
mxs_dma_reset_chan() in mxs_dma_control() because mxs_dma_reset_chan()
can only work when the DMA channel is enabled.
Signed-off-by: NLothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>

Using a static variable for counting the number of CCWs attached to
a DMA channel when appending a new descriptor is not multi user safe.
Signed-off-by: NLothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>

There is no need to have the clock enabled all the time the driver is
loaded.
It will be enabled anyway in mxs_dma_alloc_chan_resources() when a
channel is actually going to be used.
Signed-off-by: NLothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>

Signed-off-by: NLothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>

For PL330 dma controllers instantiated from device tree, the channel
lookup is based on phandle of the dma controller and dma request id
specified by the client node. During probe, the private data of each
channel of the controller is set to point to the device node of the
dma controller. The 'chan_id' of the each channel is used as the
dma request id.

Client driver requesting dma channels specify the phandle of the
dma controller and the request id. The pl330 filter function
converts the phandle to the device node pointer and matches that
with channel's private data. If a match is found, the request id
from the client node and the 'chan_id' of the channel is matched.
A channel is found if both the values match.
Acked-by: NJassi Brar <jassisinghbrar@gmail.com>
Acked-by: NBoojin Kim <boojin.kim@samsung.com>
Signed-off-by: NThomas Abraham <thomas.abraham@linaro.org>
Reviewed-by: NRob Herring <rob.herring@calxeda.com>
Acked-by: NGrant Likely <grant.likely@secretlab.ca>
Acked-by: NVinod Koul <vinod.koul@intel.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

The transfer direction for a channel can be inferred from the transfer
request and the need for specifying transfer direction in platfrom data
can be eliminated. So the structure definition 'struct dma_pl330_peri'
is no longer required.

The channel's private data is set to point to a channel id specified in
the platform data (instead of an instance of type 'struct dma_pl330_peri').
The filter function is correspondingly modified to match the channel id.

With the 'struct dma_pl330_peri' removed from platform data, the dma
controller transfer capabilities cannot be inferred any more. Hence,
the dma controller capabilities is specified using platform data.
Acked-by: NJassi Brar <jassisinghbrar@gmail.com>
Acked-by: NBoojin Kim <boojin.kim@samsung.com>
Signed-off-by: NThomas Abraham <thomas.abraham@linaro.org>
Acked-by: NGrant Likely <grant.likely@secretlab.ca>
Acked-by: NVinod Koul <vinod.koul@intel.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>