- 26 4月, 2012 1 次提交
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由 Stephen Warren 提交于
Add nodes for the Tegra30 AHUB and I2S controllers. Signed-off-by: NStephen Warren <swarren@nvidia.com> Acked-by: NOlof Johansson <olof@lixom.net>
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- 05 3月, 2012 1 次提交
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由 Stephen Warren 提交于
This enables HW performance measurements, and usage of the "perf" tool. Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 07 2月, 2012 5 次提交
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由 Stephen Warren 提交于
Enhance the driver to dynamically allocate the base IRQ number, and create an IRQ domain for itself. The use of an IRQ domain ensures that any device tree node interrupts properties are correctly parsed. Describe interrupt-related properties in the device tree binding docs, and the contents of "child" node interrupts property. Update tegra*.dtsi to specify the required interrupt-related properties. Finally, remove the definition of TEGRA_GPIO_TO_IRQ; this macro no longer gives correct results since the IRQ numbers for GPIOs are dynamically allocated. Signed-off-by: NStephen Warren <swarren@nvidia.com> Acked-by: NGrant Likely <grant.likely@secretlab.ca> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Stephen Warren 提交于
The Tegra PMC (Power Management Controller) interfaces with an external PMU (Power Management Unit), and controls wake-up from sleep modes. This initial binding is the bare minimum required to control the PMC's inversion of the PMU's interrupt signal. Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Stephen Warren 提交于
Document binding, and add the node to tegra*.dtsi. The driver isn't actually instantiated from this node yet, but the I2S binding will rely on being able to refer to the APB DMA node using a phandle. Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Stephen Warren 提交于
The Tegra30 GPIO controller has one more bank than Tegra20, and hence has one more interrupt. Signed-off-by: NStephen Warren <swarren@nvidia.com> Acked-by: NGrant Likely <grant.likely@secretlab.ca> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Stephen Warren 提交于
The new content matches tegra20.dtsi, and is < 80 columns. Signed-off-by: NStephen Warren <swarren@nvidia.com> Acked-by: NGrant Likely <grant.likely@secretlab.ca> Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 18 12月, 2011 1 次提交
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由 Peter De Schrijver 提交于
This patch adds the initial device tree for tegra30 Signed-off-by: NPeter De Schrijver <pdeschrijver@nvidia.com> Acked-by: NStephen Warren <swarren@nvidia.com> Acked-by: NColin Cross <ccross@android.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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