1. 17 5月, 2010 3 次提交
  2. 25 4月, 2010 4 次提交
    • A
      KVM: PPC: Implement Paired Single emulation · 831317b6
      Alexander Graf 提交于
      The one big thing about the Gekko is paired singles.
      
      Paired singles are an extension to the instruction set, that adds 32 single
      precision floating point registers (qprs), some SPRs to modify the behavior
      of paired singled operations and instructions to deal with qprs to the
      instruction set.
      
      Unfortunately, it also changes semantics of existing operations that affect
      single values in FPRs. In most cases they get mirrored to the coresponding
      QPR.
      
      Thanks to that we need to emulate all FPU operations and all the new paired
      single operations too.
      
      In order to achieve that, we use the just introduced FPU call helpers to
      call the real FPU whenever the guest wants to modify an FPR. Additionally
      we also fix up the QPR values along the way.
      
      That way we can execute paired single FPU operations without implementing a
      soft fpu.
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      Signed-off-by: NAvi Kivity <avi@redhat.com>
      831317b6
    • A
      KVM: PPC: Make ext giveup non-static · aba3bd7f
      Alexander Graf 提交于
      We need to call the ext giveup handlers from code outside of book3s.c.
      So let's make it non-static.
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      Signed-off-by: NAvi Kivity <avi@redhat.com>
      aba3bd7f
    • A
      KVM: PPC: Make software load/store return eaddr · 5467a97d
      Alexander Graf 提交于
      The Book3S KVM implementation contains some helper functions to load and store
      data from and to virtual addresses.
      
      Unfortunately, this helper used to keep the physical address it so nicely
      found out for us to itself. So let's change that and make it return the
      physical address it resolved.
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      Signed-off-by: NAvi Kivity <avi@redhat.com>
      5467a97d
    • A
      KVM: PPC: Add Gekko SPRs · d6d549b2
      Alexander Graf 提交于
      The Gekko has some SPR values that differ from other PPC core values and
      also some additional ones.
      
      Let's add support for them in our mfspr/mtspr emulator.
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      Signed-off-by: NAvi Kivity <avi@redhat.com>
      d6d549b2
  3. 01 3月, 2010 6 次提交
    • A
      KVM: PPC: Fix initial GPR settings · 1c0006d8
      Alexander Graf 提交于
      Commit 7d01b4c3ed2bb33ceaf2d270cb4831a67a76b51b introduced PACA backed vcpu
      values. With this patch, when a userspace app was setting GPRs before it was
      actually first loaded, the set values get discarded.
      
      This is because vcpu_load loads them from the vcpu backing store that we use
      whenever we're not owning the PACA.
      
      That behavior is not really a major problem, because we don't need it for
      qemu. Other users (like kvmctl) do have problems with it though, so let's
      better do it right.
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      Signed-off-by: NAvi Kivity <avi@redhat.com>
      1c0006d8
    • A
      KVM: PPC: Add helper functions to call real mode loaders · d5e52813
      Alexander Graf 提交于
      Linux contains quite some bits of code to load FPU, Altivec and VSX lazily for
      a task. It calls those bits in real mode, coming from an interrupt handler.
      
      For KVM we better reuse those, so let's wrap a bit of trampoline magic around
      them and then we can call them from normal module code.
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      Signed-off-by: NAvi Kivity <avi@redhat.com>
      d5e52813
    • A
      KVM: PPC: Make large pages work · 4b5c9b7f
      Alexander Graf 提交于
      An SLB entry contains two pieces of information related to size:
      
        1) PTE size
        2) SLB size
      
      The L bit defines the PTE be "large" (usually means 16MB),
      SLB_VSID_B_1T defines that the SLB should span 1 GB instead of the
      default 256MB.
      
      Apparently I messed things up and just put those two in one box,
      shaked it heavily and came up with the current code which handles
      large pages incorrectly, because it also treats large page SLB entries
      as "1TB" segment entries.
      
      This patch splits those two features apart, making Linux guests boot
      even when they have > 256MB.
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      Signed-off-by: NAvi Kivity <avi@redhat.com>
      4b5c9b7f
    • A
      KVM: PPC: Emulate trap SRR1 flags properly · 25a8a02d
      Alexander Graf 提交于
      Book3S needs some flags in SRR1 to get to know details about an interrupt.
      
      One such example is the trap instruction. It tells the guest kernel that
      a program interrupt is due to a trap using a bit in SRR1.
      
      This patch implements above behavior, making WARN_ON behave like WARN_ON.
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      Signed-off-by: NAvi Kivity <avi@redhat.com>
      25a8a02d
    • A
      KVM: PPC: Call SLB patching code in interrupt safe manner · 021ec9c6
      Alexander Graf 提交于
      Currently we're racy when doing the transition from IR=1 to IR=0, from
      the module memory entry code to the real mode SLB switching code.
      
      To work around that I took a look at the RTAS entry code which is faced
      with a similar problem and did the same thing:
      
        A small helper in linear mapped memory that does mtmsr with IR=0 and
        then RFIs info the actual handler.
      
      Thanks to that trick we can safely take page faults in the entry code
      and only need to be really wary of what to do as of the SLB switching
      part.
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      Signed-off-by: NAvi Kivity <avi@redhat.com>
      021ec9c6
    • A
      KVM: PPC: Use PACA backed shadow vcpu · 7e57cba0
      Alexander Graf 提交于
      We're being horribly racy right now. All the entry and exit code hijacks
      random fields from the PACA that could easily be used by different code in
      case we get interrupted, for example by a #MC or even page fault.
      
      After discussing this with Ben, we figured it's best to reserve some more
      space in the PACA and just shove off some vcpu state to there.
      
      That way we can drastically improve the readability of the code, make it
      less racy and less complex.
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      Signed-off-by: NAvi Kivity <avi@redhat.com>
      7e57cba0
  4. 08 12月, 2009 1 次提交
  5. 05 11月, 2009 1 次提交