Skip to content

R
raspberrypi-kernel

openeuler / raspberrypi-kernel

通知 13
Star 1
Fork 0
R
raspberrypi-kernel
切换分支/标签
  1. 17 12月, 2005 7 次提交
  3. 16 12月, 2005 10 次提交
  5. 15 12月, 2005 2 次提交
  7. 13 12月, 2005 16 次提交
  9. 12 12月, 2005 2 次提交
  11. 10 12月, 2005 1 次提交
    • N
      [ARM] 3200/1: Singlestep over ARM BX and BLX instructions using ptrace fix · 22f975f4
      由 Nikola Valerjev 提交于 
      Patch from Nikola Valerjev

Single stepping an application using ptrace() fails over ARM instructions BX and BLX.

Steps to reproduce:

Compile and link the following files

main.c
-----
void foo();
int main() {
    foo();
    return 0;
}

foo.s
-----
	.text
	.globl foo
foo:
	BX LR

Using ptrace() functionality, run to main(), and start singlestepping.
Singlestep over \"BX LR\" instruction won\'t transfer the control back
to main, but run the code to completion.

This problems seems to be in the function get_branch_address() in
arch/arm/kernel/ptrace.c. The function doesn\'t seem to recognize BX
and BLX instructions as branches. BX and BLX instructions can be used
to convert from ARM to Thumb mode if the target address has the low
bit set. However, they are also perfectly legal in the ARM only mode.
Although other things in the kernel seem to indicate that only ARM
mode is accepted (and not Thumb), many compilers will generate BX
and BLX instructions even when generating ARM only code.
Signed-off-by: NNikola Valerjev <nikola@ghs.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      22f975f4
  13. 09 12月, 2005 2 次提交
    • D
      [PATCH] powerpc: Fix SLB flushing path in hugepage · 23ed6cb9
      由 David Gibson 提交于 
      On ppc64, when opening a new hugepage region, we need to make sure any
old normal-page SLBs for the area are flushed on all CPUs.  There was
a bug in this logic - after putting the new hugepage area masks into
the thread structure, we copied it into the paca (read by the SLB miss
handler) only on one CPU, not on all.  This could cause incorrect SLB
entries to be loaded when a multithreaded program was running
simultaneously on several CPUs.  This patch corrects the error,
copying the context information into the PACA on all CPUs using the mm
in question before flushing any existing SLB entries.
Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
Signed-off-by: NPaul Mackerras <paulus@samba.org>
      23ed6cb9
    • D
      [PATCH] powerpc: Add missing icache flushes for hugepages · cbf52afd
      由 David Gibson 提交于 
      On most powerpc CPUs, the dcache and icache are not coherent so
between writing and executing a page, the caches must be flushed.
Userspace programs assume pages given to them by the kernel are icache
clean, so we must do this flush between the kernel clearing a page and
it being mapped into userspace for execute.  We were not doing this
for hugepages, this patch corrects the situation.

We use the same lazy mechanism as we use for normal pages, delaying
the flush until userspace actually attempts to execute from the page
in question.

Tested on G5.
Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
Signed-off-by: NPaul Mackerras <paulus@samba.org>
      cbf52afd