1. 01 2月, 2018 1 次提交
  2. 27 1月, 2018 1 次提交
  3. 25 1月, 2018 1 次提交
  4. 24 1月, 2018 5 次提交
  5. 23 1月, 2018 1 次提交
    • E
      signal/ptrace: Add force_sig_ptrace_errno_trap and use it where needed · f71dd7dc
      Eric W. Biederman 提交于
      There are so many places that build struct siginfo by hand that at
      least one of them is bound to get it wrong.  A handful of cases in the
      kernel arguably did just that when using the errno field of siginfo to
      pass no errno values to userspace.  The usage is limited to a single
      si_code so at least does not mess up anything else.
      
      Encapsulate this questionable pattern in a helper function so
      that the userspace ABI is preserved.
      
      Update all of the places that use this pattern to use the new helper
      function.
      Signed-off-by: N"Eric W. Biederman" <ebiederm@xmission.com>
      f71dd7dc
  6. 20 1月, 2018 1 次提交
  7. 19 1月, 2018 1 次提交
  8. 18 1月, 2018 8 次提交
    • R
      ARM: net: bpf: clarify tail_call index · 091f0248
      Russell King 提交于
      As per 90caccdd ("bpf: fix bpf_tail_call() x64 JIT"), the index used
      for array lookup is defined to be 32-bit wide. Update a misleading
      comment that suggests it is 64-bit wide.
      
      Fixes: 39c13c20 ("arm: eBPF JIT compiler")
      Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk>
      091f0248
    • R
      ARM: net: bpf: fix LDX instructions · ec19e02b
      Russell King 提交于
      When the source and destination register are identical, our JIT does not
      generate correct code, which leads to kernel oopses.
      
      Fix this by (a) generating more efficient code, and (b) making use of
      the temporary earlier if we will overwrite the address register.
      
      Fixes: 39c13c20 ("arm: eBPF JIT compiler")
      Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk>
      ec19e02b
    • R
      ARM: net: bpf: fix register saving · 02088d9b
      Russell King 提交于
      When an eBPF program tail-calls another eBPF program, it enters it after
      the prologue to avoid having complex stack manipulations.  This can lead
      to kernel oopses, and similar.
      
      Resolve this by always using a fixed stack layout, a CPU register frame
      pointer, and using this when reloading registers before returning.
      
      Fixes: 39c13c20 ("arm: eBPF JIT compiler")
      Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk>
      02088d9b
    • R
      ARM: net: bpf: correct stack layout documentation · 0005e55a
      Russell King 提交于
      The stack layout documentation incorrectly suggests that the BPF JIT
      scratch space starts immediately below BPF_FP. This is not correct,
      so let's fix the documentation to reflect reality.
      Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk>
      0005e55a
    • R
      ARM: net: bpf: move stack documentation · 70ec3a6c
      Russell King 提交于
      Move the stack documentation towards the top of the file, where it's
      relevant for things like the register layout.
      Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk>
      70ec3a6c
    • R
      ARM: net: bpf: fix stack alignment · d1220efd
      Russell King 提交于
      As per 2dede2d8 ("ARM EABI: stack pointer must be 64-bit aligned
      after a CPU exception") the stack should be aligned to a 64-bit boundary
      on EABI systems.  Ensure that the eBPF JIT appropraitely aligns the
      stack.
      
      Fixes: 39c13c20 ("arm: eBPF JIT compiler")
      Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk>
      d1220efd
    • R
      ARM: net: bpf: fix tail call jumps · f4483f2c
      Russell King 提交于
      When a tail call fails, it is documented that the tail call should
      continue execution at the following instruction.  An example tail call
      sequence is:
      
        12: (85) call bpf_tail_call#12
        13: (b7) r0 = 0
        14: (95) exit
      
      The ARM assembler for the tail call in this case ends up branching to
      instruction 14 instead of instruction 13, resulting in the BPF filter
      returning a non-zero value:
      
        178:	ldr	r8, [sp, #588]	; insn 12
        17c:	ldr	r6, [r8, r6]
        180:	ldr	r8, [sp, #580]
        184:	cmp	r8, r6
        188:	bcs	0x1e8
        18c:	ldr	r6, [sp, #524]
        190:	ldr	r7, [sp, #528]
        194:	cmp	r7, #0
        198:	cmpeq	r6, #32
        19c:	bhi	0x1e8
        1a0:	adds	r6, r6, #1
        1a4:	adc	r7, r7, #0
        1a8:	str	r6, [sp, #524]
        1ac:	str	r7, [sp, #528]
        1b0:	mov	r6, #104
        1b4:	ldr	r8, [sp, #588]
        1b8:	add	r6, r8, r6
        1bc:	ldr	r8, [sp, #580]
        1c0:	lsl	r7, r8, #2
        1c4:	ldr	r6, [r6, r7]
        1c8:	cmp	r6, #0
        1cc:	beq	0x1e8
        1d0:	mov	r8, #32
        1d4:	ldr	r6, [r6, r8]
        1d8:	add	r6, r6, #44
        1dc:	bx	r6
        1e0:	mov	r0, #0		; insn 13
        1e4:	mov	r1, #0
        1e8:	add	sp, sp, #596	; insn 14
        1ec:	pop	{r4, r5, r6, r7, r8, sl, pc}
      
      For other sequences, the tail call could end up branching midway through
      the following BPF instructions, or maybe off the end of the function,
      leading to unknown behaviours.
      
      Fixes: 39c13c20 ("arm: eBPF JIT compiler")
      Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk>
      f4483f2c
    • R
      ARM: net: bpf: avoid 'bx' instruction on non-Thumb capable CPUs · e9062481
      Russell King 提交于
      Avoid the 'bx' instruction on CPUs that have no support for Thumb and
      thus do not implement this instruction by moving the generation of this
      opcode to a separate function that selects between:
      
      	bx	reg
      
      and
      
      	mov	pc, reg
      
      according to the capabilities of the CPU.
      
      Fixes: 39c13c20 ("arm: eBPF JIT compiler")
      Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk>
      e9062481
  9. 16 1月, 2018 2 次提交
    • J
      KVM: arm64: Handle RAS SErrors from EL1 on guest exit · 3368bd80
      James Morse 提交于
      We expect to have firmware-first handling of RAS SErrors, with errors
      notified via an APEI method. For systems without firmware-first, add
      some minimal handling to KVM.
      
      There are two ways KVM can take an SError due to a guest, either may be a
      RAS error: we exit the guest due to an SError routed to EL2 by HCR_EL2.AMO,
      or we take an SError from EL2 when we unmask PSTATE.A from __guest_exit.
      
      For SError that interrupt a guest and are routed to EL2 the existing
      behaviour is to inject an impdef SError into the guest.
      
      Add code to handle RAS SError based on the ESR. For uncontained and
      uncategorized errors arm64_is_fatal_ras_serror() will panic(), these
      errors compromise the host too. All other error types are contained:
      For the fatal errors the vCPU can't make progress, so we inject a virtual
      SError. We ignore contained errors where we can make progress as if
      we're lucky, we may not hit them again.
      
      If only some of the CPUs support RAS the guest will see the cpufeature
      sanitised version of the id registers, but we may still take RAS SError
      on this CPU. Move the SError handling out of handle_exit() into a new
      handler that runs before we can be preempted. This allows us to use
      this_cpu_has_cap(), via arm64_is_ras_serror().
      Acked-by: NMarc Zyngier <marc.zyngier@arm.com>
      Signed-off-by: NJames Morse <james.morse@arm.com>
      Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
      3368bd80
    • J
      KVM: arm/arm64: mask/unmask daif around VHE guests · 4f5abad9
      James Morse 提交于
      Non-VHE systems take an exception to EL2 in order to world-switch into the
      guest. When returning from the guest KVM implicitly restores the DAIF
      flags when it returns to the kernel at EL1.
      
      With VHE none of this exception-level jumping happens, so KVMs
      world-switch code is exposed to the host kernel's DAIF values, and KVM
      spills the guest-exit DAIF values back into the host kernel.
      On entry to a guest we have Debug and SError exceptions unmasked, KVM
      has switched VBAR but isn't prepared to handle these. On guest exit
      Debug exceptions are left disabled once we return to the host and will
      stay this way until we enter user space.
      
      Add a helper to mask/unmask DAIF around VHE guests. The unmask can only
      happen after the hosts VBAR value has been synchronised by the isb in
      __vhe_hyp_call (via kvm_call_hyp()). Masking could be as late as
      setting KVMs VBAR value, but is kept here for symmetry.
      Acked-by: NMarc Zyngier <marc.zyngier@arm.com>
      Signed-off-by: NJames Morse <james.morse@arm.com>
      Reviewed-by: NChristoffer Dall <christoffer.dall@linaro.org>
      Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
      4f5abad9
  10. 15 1月, 2018 2 次提交
  11. 13 1月, 2018 1 次提交
    • E
      signal/arm: Document conflicts with SI_USER and SIGFPE · 7771c664
      Eric W. Biederman 提交于
      Setting si_code to 0 results in a userspace seeing an si_code of 0.
      This is the same si_code as SI_USER.  Posix and common sense requires
      that SI_USER not be a signal specific si_code.  As such this use of 0
      for the si_code is a pretty horribly broken ABI.
      
      Further use of si_code == 0 guaranteed that copy_siginfo_to_user saw a
      value of __SI_KILL and now sees a value of SIL_KILL with the result
      that uid and pid fields are copied and which might copying the si_addr
      field by accident but certainly not by design.  Making this a very
      flakey implementation.
      
      Utilizing FPE_FIXME, siginfo_layout will now return SIL_FAULT and the
      appropriate fields will be reliably copied.
      
      Possible ABI fixes includee:
      - Send the signal without siginfo
      - Don't generate a signal
      - Possibly assign and use an appropriate si_code
      - Don't handle cases which can't happen
      
      Cc: Russell King <rmk@flint.arm.linux.org.uk>
      Cc: linux-arm-kernel@lists.infradead.org
      Ref: 451436b7bbb2 ("[ARM] Add support code for ARM hardware vector floating point")
      History Tree: https://git.kernel.org/pub/scm/linux/kernel/git/tglx/history.gitSigned-off-by: N"Eric W. Biederman" <ebiederm@xmission.com>
      7771c664
  12. 12 1月, 2018 5 次提交
  13. 10 1月, 2018 5 次提交
  14. 09 1月, 2018 4 次提交
  15. 06 1月, 2018 1 次提交
  16. 05 1月, 2018 1 次提交
    • M
      ARM: dts: da850-lcdk: Remove leading 0x and 0s from unit address · 7669b122
      Mathieu Malaterre 提交于
      Improve the DTS files by removing all the leading "0x" and zeros to fix the
      following dtc warnings:
      
      Warning (unit_address_format): Node /XXX unit name should not have leading "0x"
      
      and
      
      Warning (unit_address_format): Node /XXX unit name should not have leading 0s
      
      Converted using the following command:
      
      find . -type f \( -iname *.dts -o -iname *.dtsi \) -exec sed -i -e "s/@\([0-9a-fA-FxX\.;:#]+\)\s*{/@\L\1 {/g" -e "s/@0x\(.*\) {/@\1 {/g" -e "s/@0+\(.*\) {/@\1 {/g" {} +^C
      
      For simplicity, two sed expressions were used to solve each warnings separately.
      
      To make the regex expression more robust a few other issues were resolved,
      namely setting unit-address to lower case, and adding a whitespace before the
      the opening curly brace:
      
      https://elinux.org/Device_Tree_Linux#Linux_conventions
      
      This will solve as a side effect warning:
      
      Warning (simple_bus_reg): Node /XXX@<UPPER> simple-bus unit address format error, expected "<lower>"
      
      This is a follow up to commit 4c9847b7 ("dt-bindings: Remove leading 0x from bindings notation")
      Reported-by: NDavid Daney <ddaney@caviumnetworks.com>
      Suggested-by: NRob Herring <robh@kernel.org>
      Signed-off-by: NMathieu Malaterre <malat@debian.org>
      Signed-off-by: NSekhar Nori <nsekhar@ti.com>
      7669b122