1. 27 11月, 2012 11 次提交
  2. 26 11月, 2012 1 次提交
  3. 23 11月, 2012 1 次提交
    • T
      OMAPFB: fix compilation error · 9b76c9cd
      Tomi Valkeinen 提交于
      omapfb compilation fails on x86 (but not on omap):
      
      drivers/video/omap2/omapfb/omapfb-ioctl.c: In function ‘omapfb_ioctl’:
      drivers/video/omap2/omapfb/omapfb-ioctl.c:861:23: error: ‘SZ_1M’ undeclared (first use in this function)
      drivers/video/omap2/omapfb/omapfb-ioctl.c:861:23: note: each undeclared identifier is reported only once for each function it appears in
      
      Fix this by including linux/sizes.h.
      Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
      9b76c9cd
  4. 22 11月, 2012 2 次提交
  5. 20 11月, 2012 2 次提交
  6. 19 11月, 2012 2 次提交
  7. 16 11月, 2012 3 次提交
  8. 13 11月, 2012 5 次提交
  9. 12 11月, 2012 6 次提交
    • A
      OMAPDSS: APPLY: Remove unnecessary call to mg_clear_shadow_dirty · c9092902
      Archit Taneja 提交于
      When doing a manual update in dss_mgr_start_update, we clear the shadow dirty
      flags. Although there isn't any harm in clearing them. The need to clear them
      out here should never arrive.
      
      When applying configurations for a manual update manager, we never do any
      register writes, i.e, calls to dss_mgr_write_regs and dss_mgr_write_regs_extra
      never happen while applying. We do all these writes only when we call
      dss_mgr_start_update. Hence, there is never a time when the shadow registers
      are dirty.
      
      Remove the call to mg_clear_shadow_dirty.
      Signed-off-by: NArchit Taneja <archit@ti.com>
      Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
      c9092902
    • A
      OMAPDSS: APPLY: Remove unnecessary variable in dss_apply_irq_handler · ca8d4e8b
      Archit Taneja 提交于
      The bool was_updating is never really used for anything. It is set to the
      current value of mp->updating, but not used anywhere. Remove this variable.
      Signed-off-by: NArchit Taneja <archit@ti.com>
      Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
      ca8d4e8b
    • A
      OMAPDSS: APPLY: Don't treat an overlay's channel out as shadow bits · 02b5ff1a
      Archit Taneja 提交于
      An overlay's channel out field isn't a shadow register. The TRM says that it's
      taken into effect immediately. This understanding was missing and channel out
      was treated as a shadow parameter, and in overlay's private data as extra info.
      
      Program channel out bits directly in dss_ovl_set_manager(). In order to do this
      safely, we need to be totally sure that the overlay is disabled in hardware. For
      auto update managers, we can assume that the overlay was truly disabled at
      dss_ovl_unset_manager() through the wait_pending_extra_info_updates() call.
      However, when unsetting manager for an overlay that was previously connected to
      a manager in manual update, we can't be sure if the overlay is truly disabled.
      That is, op->enabled might not reflect the actual state of the overlay in
      hardware. The older manager may require a manual update transfer to truly
      disable the overlay. We expect the user of OMAPDSS to take care of this, in
      OMAPDSS, we make sure that an overlay's manager isn't unset if there if
      extra_info is still dirty for that overlay.
      
      The wrong understanding of channel out bits also explains the reason why we see
      sync lost when changing an overlay's manager which was previously connected to a
      manual update manager. The following sequence of events caused this:
      
      - When we disable the overlay, no register writes are actually done since the
        manager is manual update, op->enabled is set to false, and the
        extra_info_dirty flag is set. However, in hardware, the overlay is still
        enabled in both shadow and working registers.
      
      - When we unset the manager, the software just configures the overlay's manager
        to point to NULL.
      
      - When we set the overlay to a new manager(which is in auto update) through
        dss_ovl_set_manager, the check  for op->enabled passes, the channel field in
        extra info is set to the new manager. When we do an apply on this manager,
        the new channel out field is set in the hardware immediately, and since the
        overlay enable bit is still set in hardware, the new manager sees that the
        overlay is enabled, and tries to retrieve pixels from it, this leads to sync
        lost as it might be in the middle of processing a frame when we set the
        channel out bit.
      
      The solution to this was to ensure that user space does another update after
      disabling the overlay, this actually worked because the overlay was now truly
      disabled, and an immediate write to channel out didn't impact since the manager
      saw the new overlay as disabled, and doesn't try to retrieve pixels from it.
      
      Remove channel as an extra_info field. Make dss_ovl_unset_manager more strict
      about the overlay being disabled when detaching the manager. For overlays
      connected to a manual update manager, unset_manager fails if we need another
      update to disable the overlay.
      
      We still need to a manual update to ensure the overlay is disabled to get change
      the overlay's manager. We could work on doing a dummy update by using DISPC's
      capability to gate the different video port signals. This is left for later.
      
      Remove the comment about the sync lost issue.
      Signed-off-by: NArchit Taneja <archit@ti.com>
      Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
      02b5ff1a
    • A
      OMAPDSS: DISPC: Use output width and height to calculate row/pix inc for writeback · 6be0d73e
      Archit Taneja 提交于
      When calculating row and pixel increments for graphics and video pipes, we need
      to consider the dimensions of the input frame to know how to read from the
      buffer. Hence, we need to calculate these parameters from the input to the
      pipeline.
      
      For writeback, the row and pixel increments need to be calculated based on the
      output of the writeback pipeline, i.e, the dimensions of the frame after
      scaling. Ensure that dispc driver uses values of out_width and out_height when
      calling calc_dma/calc_tiler_rotation_offset.
      
      For graphics and video pipes, the original code passed the original height as
      frame_height to calc_dma_rotation_offset, and not the predecimated height. This
      is left as it is for now. We need to figure out why pre decimated height isn't
      needed.
      Signed-off-by: NArchit Taneja <archit@ti.com>
      Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
      6be0d73e
    • A
      OMAPDSS: DISPC: Don't allow predecimation for writeback · 1c031441
      Archit Taneja 提交于
      Since writeback writes to a buffer instead of reading from one, predecimation
      doesn't make sense for it. Configure the width and height predecimation limits
      to 1 if the plane is writeback.
      Signed-off-by: NArchit Taneja <archit@ti.com>
      Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
      1c031441
    • A
      OMAPDSS: DISPC: Fix calc_scaling_44xx() bugs for writeback pipeline · 5d501085
      Archit Taneja 提交于
      dispc_ovl_calc_scaling_44xx() doesn't work correctly for writeback. There are
      two issues with it:
      
      - the function tries to calculate pixel clock for the input plane using
        dispc_plane_pclk_rate(), calling this with writeback as input plane results in
        a BUG(), this function shouldn't be called for writeback at all. Fix this by
        calculating pixel clock only when we are not in mem to mem mode.
      
      - the maximum input_width is the product of the downscale ratio supported and
        the and the given output_width. This was calculated incorrectly by dividing
        output_width with maxdownscale. Fix this.
      Signed-off-by: NArchit Taneja <archit@ti.com>
      Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
      5d501085
  10. 07 11月, 2012 3 次提交
  11. 06 11月, 2012 4 次提交