This driver adds support for /dev/watchdog for boards using either the MCP51 or
MCP55 chipsets.  These are also known as the nForce 430 and nForce 550.  This
driver is likely to work on other chipsets as well, though those are the only
two that have been tested.
Signed-off-by: NMike Waychison <mikew@google.com>
Signed-off-by: NWim Van Sebroeck <wim@iguana.be>

This driver adds /dev/watchdog support for the AMD sp5100 aka SB7x0 chipsets.

It follows the same conventions found in other /dev/watchdog drivers.
Signed-off-by: NPriyanka Gupta <priyankag@google.com>
Signed-off-by: NMike Waychison <mikew@google.com>
Signed-off-by: NWim Van Sebroeck <wim@iguana.be>

Update Kconfig with the additional Fintek hardware that we support.
Signed-off-by: NLutz Ballaschke <vegan.grindcore@googlemail.com>
Acked-by: NGiel van Schijndel <me@mortis.eu>
Signed-off-by: NWim Van Sebroeck <wim@iguana.be>

This patch adds the DeviceIDs for TCO Watchdog on the Intel DH89xxCC PCH.
Signed-off-by: NSeth Heasley <seth.heasley@intel.com>
Signed-off-by: NWim Van Sebroeck <wim@iguana.be>

This patch adds the Intel NM10 DeviceIDs for iTCO Watchdog.
Reported-by: NDan Weinlader <dan@weinlader.org>
Signed-off-by: NWim Van Sebroeck <wim@iguana.be>

ks8695_wdt needs KS8695_CLOCK_RATE, which is defined in
mach/hardware.h, which is pulled in by the include of mach/timex.h,
but the latter is going away, so just include mach/hardware.h
directly.
Signed-off-by: NYegor Yefremov <yegorslists@googlemail.com>
Signed-off-by: NLennert Buytenhek <buytenh@secretlab.ca>
Signed-off-by: NWim Van Sebroeck <wim@iguana.be>

When the watchdog period is changed, it needs to be propagated to all cores
in addition to the core that performed the change.
Signed-off-by: NRandy Vinson <rvinson@mvista.com>
Signed-off-by: NWim Van Sebroeck <wim@iguana.be>

Normally, the watchdog is disabled when dev/watchdog is closed, but if
CONFIG_WATCHDOG_NOWAYOUT is defined, then it means that the watchdog should
remain enabled.  So we should disable it only if CONFIG_WATCHDOG_NOWAYOUT is
not defined.

Also ensure that /dev/watchdog is only opened by one process at a time.  That
way, a second process can't accidentally disable the watchdog while the first
process has it open.  There shouldn't be any need for more than one process to
open /dev/watchdog anyway.
Signed-off-by: NTimur Tabi <timur@freescale.com>
Acked-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>
Signed-off-by: NWim Van Sebroeck <wim@iguana.be>

Annotate alim7101_pci_tbl as '__used' to fix following warning:

  CC      drivers/watchdog/alim7101_wdt.o
drivers/watchdog/alim7101_wdt.c:433: warning: ‘alim7101_pci_tbl’ defined but not used
Signed-off-by: NNamhyung Kim <namhyung@gmail.com>
Signed-off-by: NWim Van Sebroeck <wim@iguana.be>

Annotate ali_pci_tbl as '__used' to fix following warning:

  CC      drivers/watchdog/alim1535_wdt.o
drivers/watchdog/alim1535_wdt.c:304: warning: ‘ali_pci_tbl’ defined but not used
Signed-off-by: NNamhyung Kim <namhyung@gmail.com>
Signed-off-by: NWim Van Sebroeck <wim@iguana.be>

The watchdog driver for the SUPERIO chip winbond w83627ehf does not work.
If you open /dev/watchdog and write a character to /dev/watchdog then
the watchdog will be triggered. However the watchdog will not trigger
the hardware RESET after the timeout, because the watchdog has never been
enabled.
Signed-off-by: NHerman Morsink Vollenbroek <h.morsinkvollenbroek@home.nl>
Signed-off-by: NWim Van Sebroeck <wim@iguana.be>

The following adds watchdog support for the Winbond W83627DHG chip.
I have tested it on a PQ7-M102XL (Intel Atom) board.
Signed-off-by: NBenny Lønstrup Ammitzbøll <benny@ammitzboell-consult.dk>
Signed-off-by: NWim Van Sebroeck <wim@iguana.be>

Add Fintek f71869 as a supported watchdog device.
Signed-off-by: NMichel Arboi <michel@arboi.fr.eu.org>
Acked-by: NGiel van Schijndel <me@mortis.eu>
Signed-off-by: NWim Van Sebroeck <wim@iguana.be>

Watchdog support for Fintek F71862fg Super-I/O added.
Two different hardware reset pins of the F71862fg chip can be configured 
by an additional module parameter.
Signed-off-by: NLutz Ballaschke <vegan.grindcore@googlemail.com>
Signed-off-by: NWim Van Sebroeck <wim@iguana.be>

Cleaned up and replaced some magic numbers by constants.
Signed-off-by: NLutz Ballaschke <vegan.grindcore@googlemail.com>
Signed-off-by: NWim Van Sebroeck <wim@iguana.be>

If the Link Start fails in cxgb4vf_open(), we need to back out any state
that we've built up ...
Signed-off-by: NCasey Leedom <leedom@chelsio.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Currently the skb array is not fully allocated, and the allocation
is done as it's requested, which is not the expected way.

This patch just allocate the full skb array at driver initialization.
Also, this patch increases ehea version to 107.
Signed-off-by: NBreno Leitao <leitao@linux.vnet.ibm.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Signed-off-by: NShawn Guo <shawn.guo@freescale.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

pcnet_cs:
     add another ID of "corega Ether CF-TD" 10Base-T PCMCIA card.
Signed-off-by: NKen Kawasaki <ken_kawasaki@spring.nifty.jp>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

The mr optimization introduced a reference count leak on an exception
test.  The lock/refcount manipulation is moved down and the problematic
exception test now calls bail to insure that the lock is released.

Additional fixes as suggested by Ralph Campbell <ralph.campbell@qlogic.org>:
- reduce lock scope of dma regions
- use explicit values on returns vs. automatic ret value
Signed-off-by: NMike Marciniszyn <mike.marciniszyn@qlogic.com>
Signed-off-by: NRoland Dreier <rolandd@cisco.com>

Improve the QMH SERDES tunning on initial driver load by having the
driver go through a link state change.
Signed-off-by: NMike Marciniszyn <mike.marciniszyn@qlogic.com>
Signed-off-by: NRoland Dreier <rolandd@cisco.com>

Currently on receipt of a response message (ACKs, RDMA Response,
Atomic Responses etc.) if the SDMA completion counter is not advanced
the driver delays the completion of the WQE.  In most cases this is
overly pessimistic as the response (ACK) to a previously transmitted
send implies that the send is complete.  Ensure that SDMA queue is
progressed appropriately before determining if a send has delayed
completions.
Signed-off-by: NMike Marciniszyn <mike.marciniszyn@qlogic.com>
Signed-off-by: NRoland Dreier <rolandd@cisco.com>

Under congestion resulting in eager buffer overflow attempt to send
pre-emptive NAKs if header queue entries with TID errors are generated
and a valid header is present.  This prevents long timeouts and flow
restarts if a trailing set of packets are dropped due to eager
overflows.  Pre-emptive NAKs are currently only supported for RDMA
writes.
Signed-off-by: NMike Marciniszyn <mike.marciniszyn@qlogic.com>
Signed-off-by: NRoland Dreier <rolandd@cisco.com>

The current code loops during rkey/lkey validiation to isolate the MR
for the RDMA, which is expensive when the current operation is inside
a very large memory region.

This fix optimizes rkey/lkey validation routines for user memory
regions and fast memory regions.  The MR entry can be isolated by
shifts/mods instead of looping.  The existing loop is preserved for
phys memory regions for now.
Signed-off-by: NMike Marciniszyn <mike.marciniszyn@qlogic.com>
Signed-off-by: NRoland Dreier <rolandd@cisco.com>

Changing from +1 to +2 allows for better QP distribution across
receive contexts.
Signed-off-by: NMike Marciniszyn <mike.marciniszyn@qlogic.com>
Signed-off-by: NRoland Dreier <rolandd@cisco.com>

The upstream code was missing part of a receive/error race fix from
the internal tree.  Add the missing part, which makes future merges
possible.
Signed-off-by: NMike Marciniszyn <mike.marciniszyn@qlogic.com>
Signed-off-by: NRoland Dreier <rolandd@cisco.com>

The basic idea is that on SusieQ, the difficult part of mapping QPN to
context is handled by the mapping registers so the generic QPN
allocation doesn't need to worry about chip specifics.  For Monty and
Linda, there is no mapping table so the qpt->mask (same as
dd->qpn_mask), is used to see if the QPN to context falls within
[zero..dd->n_krcv_queues).
Signed-off-by: NMike Marciniszyn <mike.marciniszyn@qlogic.com>
Signed-off-by: NRoland Dreier <rolandd@cisco.com>

For SusieQ we need to write to the interrupt timer register before
updating the header queue head with interrupt count.  This is to
ensure that the timer is enabled properly and a receive available
interrupt is delivered.  Otherwise this interrupt can be lost if the
receiver header/eager queues are full before the timer is enabled.
Signed-off-by: NMike Marciniszyn <mike.marciniszyn@qlogic.com>
Signed-off-by: NRoland Dreier <rolandd@cisco.com>

Avoid duplicate writes to the head register as this can lead to lost
interrupts if the context goes full before the second write is done.
Signed-off-by: NMike Marciniszyn <mike.marciniszyn@qlogic.com>
Signed-off-by: NRoland Dreier <rolandd@cisco.com>

Add new SERDES tuning to aid manufacturing.
Signed-off-by: NMike Marciniszyn <mike.marciniszyn@qlogic.com>
Signed-off-by: NRoland Dreier <rolandd@cisco.com>

Reset the list pointers after freeing the SDMA packet list.  This is
done to any potential double-free cases.
Signed-off-by: NMike Marciniszyn <mike.marciniszyn@qlogic.com>
Signed-off-by: NRoland Dreier <rolandd@cisco.com>

Implement new SERDES initialization routine and improvements to signal
integrity -- disable LE1 adaptation, disable LOS after link-up, set
better SERDES parameters.
Signed-off-by: NMike Marciniszyn <mike.marciniszyn@qlogic.com>
Signed-off-by: NRoland Dreier <rolandd@cisco.com>

If these flags are set when the QP is transitioned to the error state,
it will wait until the flags are cleared, which may never happen if
the error transition is due to a link going down.
Signed-off-by: NMike Marciniszyn <mike.marciniszyn@qlogic.com>
Signed-off-by: NRoland Dreier <rolandd@cisco.com>

The driver was incorrectly choosing HCAs on which to allocate new user
contexts based on overall count of usable ports regardless whether the
usable port was on the currently selected HCA.
Signed-off-by: NMike Marciniszyn <mike.marciniszyn@qlogic.com>
Signed-off-by: NRoland Dreier <rolandd@cisco.com>

Add check when setting configured contexts that the value does not
exceed the number of contexts allocated for the card.  If the value
exceeds the already allocated count, set it to what is already
allocated.
Signed-off-by: NMike Marciniszyn <mike.marciniszyn@qlogic.com>
Signed-off-by: NRoland Dreier <rolandd@cisco.com>

When the link transitions from ACTIVE_DEFERRED to ACTIVE, the driver
only sees the ACTIVE state. With this change, it will check whether
the state was already ACTIVE and if so, it will not generated IB
events and will not clear symbol error counts.
Signed-off-by: NMike Marciniszyn <mike.marciniszyn@qlogic.com>
Signed-off-by: NRoland Dreier <rolandd@cisco.com>

The code to generate receive completion entries for UD send with
immediate contains the wrong payload length.  This is because when the
code to compute the payload size was moved, the value of hdrsize
didn't get moved too.  The fix is to update tlen directly.
Signed-off-by: NMike Marciniszyn <mike.marciniszyn@qlogic.com>
Signed-off-by: NRoland Dreier <rolandd@cisco.com>

The IBTA vol. 1 release 1.2.1 spec. says:
C14-24.2.1: If PortInfo:Portstate=Down, then a SubnSet(PortInfo) shall
make any changes it specifies to PortInfo:PortPhysicalState; any other
result is vendor-dependent.

The patch changes the error handling so that the reply says there are
invalid fields but still attempts to set fields that are in range
including PortInfo:PortPhysicalState.
Signed-off-by: NMike Marciniszyn <mike.marciniszyn@qlogic.com>
Signed-off-by: NRoland Dreier <rolandd@cisco.com>

According to IBTA vol. 1, C11-30.1.1, a notification callback is
invoked if the CQ is armed for the next solicited completion event or
an error completion.  The error case wasn't being generated correctly.
Signed-off-by: NMike Marciniszyn <mike.marciniszyn@qlogic.com>
Signed-off-by: NRoland Dreier <rolandd@cisco.com>

Add support to recognize another board variation named QME7362.
Signed-off-by: NMike Marciniszyn <mike.marciniszyn@qlogic.com>
Signed-off-by: NRoland Dreier <rolandd@cisco.com>