The IP in DRA7xx is similar to the IP found in TI81xxAM3xxx/AM4xxx type of
SoCs but it is is integrated with sDMA instead of eDMA. The suitable pcm
driver for DRA7xx is the omap-pcm driver which is using dmaengine.
In the driver we can configure both dma related structures used for eDMA and
sDMA. The only thing we need to make sure that we set the correct dma_data
at startup with snd_soc_dai_set_dma_data()
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NMark Brown <broonie@linaro.org>

In synchronous mode both transmit and receive sections are using the TX
clocks. In setup like this the TX clocks need to be enabled when capture
is running.
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NMark Brown <broonie@linaro.org>

The audio data to/from McASP can be sent/received via two method:
Via the data port (preferred) or via the configuration bus.
Currently the driver assumes that all data communication will be done via
the data port.
This patch adds support for selecting the configuration port as data
interface.
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NMark Brown <broonie@linaro.org>

The FIFO registers base address is different in dm646x compared to newer
SoCs with McASP IP. Instead of using two paths (switch/case) to handle the
difference we can simply pick the correct base address beforehand and use
offsets to address the register we need to configure.
With this change the indentation depth can be reduced as well.
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NMark Brown <broonie@linaro.org>

Replace mcasp->base use with plain base in the davinci_mcasp_set_dai_fmt()
function since it has been already used by the remaining part of the function.
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NMark Brown <broonie@linaro.org>

Rename the private struct from davinci_audio_dev to davinci_mcasp.
Change the local use of the pointer to this struct from *dev to *mcasp.

The aim is to have better readable code for the first look since having
dev->xxxx in the code when using the local private struct is a bit
surprising.
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NMark Brown <broonie@linaro.org>

It brings no benefit to inline this function due to it's size and function.
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NMark Brown <broonie@linaro.org>

It is not used in the code.
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NMark Brown <broonie@linaro.org>

Since it is a private struct strictly used by the davinci-mcasp driver it
can be moved from header file to the source file.
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NMark Brown <broonie@linaro.org>

It is better for readability to have the register definitions out from the
source file.
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NMark Brown <broonie@linaro.org>

Add .name when assigning the dai name.
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NMark Brown <broonie@linaro.org>

It is not used outside of the .c file.
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NMark Brown <broonie@linaro.org>

The serial-dir array gives this information so there is no need to have the
num-serializer property in DT description.
Just ignore the property in the driver the DTS files can be updated
separately without regression.
Update the documentation at the same time for davinci-mcasp
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NJyri Sarha <jsarha@ti.com>
Signed-off-by: NMark Brown <broonie@linaro.org>

Change the model omap2-mcasp-audio in compatible property to
am33xx-mcasp-audio as omap2 does not have mcasp.
Signed-off-by: NJyri Sarha <jsarha@ti.com>
Signed-off-by: NMark Brown <broonie@linaro.org>

Extract DMA channels directly from DT as they can not be found from
platform resources anymore. This is a work-around until davinci audio
driver is updated to use dmaengine.
Signed-off-by: NJyri Sarha <jsarha@ti.com>
Signed-off-by: NMark Brown <broonie@linaro.org>

This patch adds a separate register location for data port registers to
mcasp DT bindings. On am33xx SoCs the McASP registers are mapped
trough L4 interconnect, but data port registers are also mapped trough
L3 bus to a different memory location.
Signed-off-by: NHebbar, Gururaja <gururaja.hebbar@ti.com>
Signed-off-by: NDarren Etheridge <detheridge@ti.com>
Signed-off-by: NJyri Sarha <jsarha@ti.com>
Signed-off-by: NMark Brown <broonie@linaro.org>

When the system returns from suspend, it looses its configuration. Most
of it is restored by running a normal audio stream startup, but the DAI
format is left unset as that's configured on the audio device creation.

Hence, it suffices here to care for the registers which are touched by
davinci_mcasp_set_dai_fmt() and restore them when the system is resumed.
Signed-off-by: NDaniel Mack <zonque@gmail.com>
Signed-off-by: NMark Brown <broonie@linaro.org>

'mcasp_dt_ids' is always compiled in. Hence of_match_ptr is not
necessary.
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: NMark Brown <broonie@linaro.org>

McASP serial audio engine needs different rotation values on TX and RX
channels. Commit dde109fb ("ASoC: McASP: Fix data rotation for
playback. Enables 24bit audio playback") changed the calculation to fix
the playback format, but broke the capture stream by doing it for both
TXFMT and RXFMT.
Signed-off-by: NDaniel Mack <zonque@gmail.com>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Cc: stable@vger.kernel.org [3.9 only]

According documentation bit ACLKRPOL is set to 0 (receiver samples data
on falling edge) and when set to 1 (receiver samples data on rising edge).

I2S data are always sampled on falling edge and valid during rising edge
of bit clock. So in case of capture data transmitter sample data on falling
edge and macsp must read then on rising edge.
Signed-off-by: NMarek Belisko <marek.belisko@streamunlimited.com>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

When McASP is bit clock and frame clock master enable pin output for rx clocks.
Signed-off-by: NMarek Belisko <marek.belisko@streamunlimited.com>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

For TDM mode, BCLK-to-LCLK ratio is computed as (tdm_slots) x (word_length).
I2S mode is only subset of TDM mode with specific tdm_slots = 2 channels.
Also bclk_lrclk_ratio can be greater than 255, therefore u16 need to be used.
Signed-off-by: NMichal Bachraty <michal.bachraty@streamunlimited.com>
Acked-by: NDaniel Mack <zonque@gmail.com>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

As pointed of by Vaibhav, commit message: "ASoC: davinci-mcasp: Add support for multichannel playback"
number of active serializers can be hidden into fifo_level variable, which is set in davimci-mcasp.
Signed-off-by: NMichal Bachraty <michal.bachraty@streamunlimited.com>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

Channel size settings will be made at the end of
davinci_mcasp_hw_params() routine and thus overwrite frame
format settings made for DIT mode. This patch fixes this issue
by taking op_mode into account. Tested with official PSP 3.2
kernel and sii9022a HDMI transmitter.
Signed-off-by: NYegor Yefremov <yegorslists@googlemail.com>
Tested-by: NDaniel Mack <zonque@gmail.com>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

AFSX won't be used in DIT mode. The related pins are AHCLKX and
the data pins.
Signed-off-by: NYegor Yefremov <yegorslists@googlemail.com>
Acked-by: NVaibhav Bedia <vaibhav.bedia@ti.com>
Tested-by: NDaniel Mack <zonque@gmail.com>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

As pointed of by Vaibhav, commit 2952b27e ("ASoC: davinci-mcasp:
Add support for multichannel playback") duplicated the logic of
counting the active serializers. That can be avoided by shifting
the code around a bit.

Also, drop two unused defines introduced by the same commit.
Signed-off-by: NDaniel Mack <zonque@gmail.com>
Acked-by: NVaibhav Bedia <vaibhav.bedia@ti.com>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

Davinci McASP has support for I2S multichannel playback.
For I2S playback/receive, each serializer is capable to play 2 channels
(L/R) audio data.Serializer function (Playback-receive-none) is configured
in DT, depending on hardware specification. It is possible to play less
channels than configured in DT. For that purpose,only specific number of
active serializers are enabled. McASP FIFO need to have DMA transfer Bcnt
set to number of enabled serializers, otherwise no data are transfered to
McASP and Alsa generates "DMA/IRQ playback write error (DMA or IRQ trouble?)"
error. For TDM mode, McASP is capable to play or receive 32 channels for one
serializer. McAsp has support for max 16 serializer, therefore max channels
is 32 * 8.
Signed-off-by: NMichal Bachraty <michal.bachraty@streamunlimited.com>
Tested-by: NDaniel Mack <zonque@gmail.com>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

u32 rotate = (32 - word_length) / 4;
This implementation is wrong, but it works only for 16, or 32 bit audio data.
(rotation for 16 or 32 bit is same as in code I present) Mcasp rotated data in
4 bits (max value 0x7)and then masks them . That data are sended to i2s bus.
For 24 bit or 20 bit or other data formats, this code rotates data badly and
you hear somethink like noise.  You need to use
u32 rotate = (word_length / 4) & 0x7;
to proper data rotation.
Signed-off-by: NMichal Bachraty <michal.bachraty@streamunlimited.com>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

Depending on the Codec, the the BCLK/LRCLK ratio might not be freely
chosen by the CPU DAI.

For example, some Codec might want to be supplied with 32-bit samples
for both its channels regardless of the actual audio word size the CPU
sends. In such cases, the rest of the bits on the data lines must be
padded with zeros:

          _______________________________
LRCLK    /                               \
      --'                                 `---------- .....

BCLK  ||||||||||||||||||||||||||||||||||||||||||||||| .....

DATA  ____||||||||||||||||_________________|||||||||| .....

          |<--  data  -->|<--   pads  --> |

This patch adds a new clock divider to configure the BCLK/LRCLK ratio.
If the machine code uses that divider, the driver uses the specified
value, instead of deriving that information from the audio word size.

Otherwise, the original behaviour is retained.
Signed-off-by: NDaniel Mack <zonque@gmail.com>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

Change davinci_config_channel_size() to derive the values for XSSZ and
XROT in DAVINCI_MCASP_[RT]XFMT_REG from the configured word length
rather than hard-coding them in a switch/case block.

Also, by directly passing the word length to
davinci_config_channel_size(), we can get rid of the
DAVINCI_AUDIO_WORD_* enum.
Signed-off-by: NDaniel Mack <zonque@gmail.com>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

codec_fmt and sample_rate variables are unused in both snd_platform_data
and davinci_audio_dev, so drop them.
Signed-off-by: NDaniel Mack <zonque@gmail.com>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

Removes the DaVinci private SRAM API and replaces it with
the genalloc API. The SRAM gen_pool is passed in pdata since
DaVinci is in the early stages of DT conversion.

[zonque@gmail.com: stub out gen_pool functions for
		   !CONFIG_GENERIC_ALLOCATOR]
Signed-off-by: NMatt Porter <mporter@ti.com>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

Signed-off-by: NDaniel Mack <zonque@gmail.com>
Reported-by: NMike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

Signed-off-by: NDaniel Mack <zonque@gmail.com>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

The FSDUR flag configures whether the frame clock uses a high phase of
only one bit or a full word. This has to be set depending on the DAI
format.

For other modes than DSP_B, the FSXDLY/FSRDLY fields have to be set to
1.
Signed-off-by: NDaniel Mack <zonque@gmail.com>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

Add a .set_sysclk function to pass the direction of the clock down to
the driver. Only enable AHCLKX in the PDIR register when the CPU is
driving the clock.

This also removes the modification of the AHCLKXE/AHCLKRE bits in the
hw_params callback, and users must set the desired configuration using
snd_soc_dai_set_sysclk(), which this patch also does for the only user
in mainline (davinci-evm).
Signed-off-by: NDaniel Mack <zonque@gmail.com>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

Add support for the internal clock dividers of the McASP driver.
Signed-off-by: NDaniel Mack <zonque@gmail.com>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

The OMAP2+ variant of McASP is different from Davinci variant w.r.to
some register offset.

Changes
- Add new MCASP_VERSION_3 to identify new variant. New DT compatible
  "ti,omap2-mcasp-audio" to identify version 3 controller.
- The register offsets are handled depending on the version.

Note:
    DMA parameters (dma fifo offset) are not updated and will be done later.
Signed-off-by: NHebbar, Gururaja <gururaja.hebbar@ti.com>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

Add device tree probe for McASP driver.

Note:
DMA parameters are not populated from DT and will be done later.
Signed-off-by: NHebbar, Gururaja <gururaja.hebbar@ti.com>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>