- 14 12月, 2011 2 次提交
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由 Andrew Lunn 提交于
Move the *_mbus_dram_info structure into the orion platform and call it orion_mbus_dram_info everywhere. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Tested-by: NMichael Walle <michael@walle.cc> Acked-by: NNicolas Pitre <nico@linaro.org> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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由 Andrew Lunn 提交于
Compile tested on Dove, orion5x, mv78xx0. Boot tested on Kirkwood. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Tested-by: NMichael Walle <michael@walle.cc> Acked-by: NNicolas Pitre <nico@linaro.org> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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- 31 3月, 2011 1 次提交
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由 Lucas De Marchi 提交于
Fixes generated by 'codespell' and manually reviewed. Signed-off-by: NLucas De Marchi <lucas.demarchi@profusion.mobi>
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- 11 8月, 2009 1 次提交
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由 Lennert Buytenhek 提交于
On the 88f6183, orion5x's setup_cpu_win() fails to ever program any mbus bridge remap registers, which causes transactions for PCI/PCIe IO/MEM space to get sent to random mbus targets. Adding a check for the 6183 in orion5x_cpu_win_can_remap() is necessary and sufficient to make PCIe wlan cards work on the 6183 reference design. Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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- 15 6月, 2009 1 次提交
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Without incrementing the counter the next window setup will overwrite the SRAM mapping. Signed-off-by: NSebastian Andrzej Siewior <sebastian@breakpoint.cc> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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- 09 6月, 2009 1 次提交
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The security accelerator which can act as a puppet player for the crypto engine requires its commands in the sram. This patch adds support for the phys mapping and creates a platform device for the actual driver. [ nico: renamed device name from "mv,orion5x-crypto" to "mv_crypto" so to match the module name and be more generic for Kirkwood use ] Signed-off-by: NSebastian Andrzej Siewior <sebastian@breakpoint.cc> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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- 24 4月, 2009 1 次提交
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由 Nicolas Pitre 提交于
Symbols like SOFT_RESET are way too generic to be exported at large. To avoid this, let's move the mbus bridge register defines into a separate file and include it where needed. This affects mach-kirkwood, mach-loki, mach-mv78xx0 and mach-orion5x simultaneously as they all share code in plat-orion which relies on those defines. Some other defines have been moved to narrower scopes, or simply deleted when they had no user. This fixes compilation problem with mpt2sas on the above listed platforms. Signed-off-by: NNicolas Pitre <nico@marvell.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 06 9月, 2008 1 次提交
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由 Russell King 提交于
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 07 8月, 2008 2 次提交
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由 Russell King 提交于
This just leaves include/asm-arm/plat-* to deal with. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Remove includes of asm/hardware.h in addition to asm/arch/hardware.h. Then, since asm/hardware.h only exists to include asm/arch/hardware.h, update everything to directly include asm/arch/hardware.h and remove asm/hardware.h. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 23 6月, 2008 3 次提交
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由 Lennert Buytenhek 提交于
Nuke the Orion-specific orion5x_{read,write} wrappers. Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
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由 Lennert Buytenhek 提交于
The DRAM base address and size fields in the CPU's MBUS bridge have 64KiB granularity, instead of the currently used 16MiB. Since all of the currently supported MBUS peripherals support 64KiB granularity as well, this patch changes the Orion address map code to stop rounding base addresses down and sizes up to multiples of 16MiB. Found by Ke Wei <kewei@marvell.com>. Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Acked-by: NRussell King <linux@arm.linux.org.uk>
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由 Lennert Buytenhek 提交于
Currently, Orion window setup uses hardcoded window indexes for each of the boot/cs0/cs1/cs2/PCIe WA windows. The static window allocation used can clash if board support code will ever attempt to configure both a dev2 and a PCIe WA window, as both of those use CPU mbus window #7 at present. This patch keeps track of the last used window, and opens subsequently requested windows sequentially, starting from 4. (Windows 0-3 are used as MEM/IO windows for the PCI/PCIe buses.) Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
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- 09 5月, 2008 2 次提交
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由 Lennert Buytenhek 提交于
This patch cleans up Orion's addr-map.c a bit after all peripheral window programming code has been moved out into the relevant drivers. Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Reviewed-by: NTzachi Perelstein <tzachi@marvell.com> Acked-by: NRussell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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由 Lennert Buytenhek 提交于
Make the Orion 5x platform code use the mbus window handling code that's in the mv643xx_eth driver, instead of programming the GigE block's mbus window registers by hand. Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Reviewed-by: NTzachi Perelstein <tzachi@marvell.com> Acked-by: NRussell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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- 29 4月, 2008 1 次提交
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由 Lennert Buytenhek 提交于
Unify a couple more spellings of "PCIe" ("PCI-E", "PCIE".) Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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- 28 3月, 2008 8 次提交
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由 Lennert Buytenhek 提交于
Do a global s/orion/orion5x/ of the Orion 5x-specific bits (i.e. not the plat-orion bits.) Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Reviewed-by: NTzachi Perelstein <tzachi@marvell.com> Acked-by: NSaeed Bishara <saeed@marvell.com> Acked-by: NRussell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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由 Lennert Buytenhek 提交于
Various Orion cleanups: - Unify GPL license banner format across all files. - Unify naming of .h double inclusion guard preprocessor macros. - Unify spelling of "PCIe" (variants seen: PCIE, PCIe, PCI-EX.) - Various typo fixes. - Remove __init attributes from prototypes declared in headers. - Remove trailing comments from #endif statements. - Mark a couple of locally-used-only structs static. Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Reviewed-by: NTzachi Perelstein <tzachi@marvell.com> Acked-by: NRussell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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由 Lennert Buytenhek 提交于
Move the Orion register accessor macros out of orion.h, to prevent them from ending up in the decompressor image (Orion uncompress.h includes orion.h.) Move them into io.h, which seems a better place for this kind of stuff. Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Reviewed-by: NTzachi Perelstein <tzachi@marvell.com> Acked-by: NRussell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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由 Lennert Buytenhek 提交于
Instead of forcing all device bus window setup through one function with some enum as the first argument, create separate window setup functions for each of the four possible targets, and do the demux internally. This allows getting rid of the window identifier enum and the big switch statement in orion_setup_cpu_win(). Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Reviewed-by: NTzachi Perelstein <tzachi@marvell.com> Acked-by: NRussell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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由 Lennert Buytenhek 提交于
Make it possible to pass mbus_dram_target_info to the sata_mv driver via the platform data, make the sata_mv driver program the window registers based on this data if it is passed in, and make the Orion platform setup code use this method instead of programming the SATA mbus window registers by hand. Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Reviewed-by: NTzachi Perelstein <tzachi@marvell.com> Acked-by: NRussell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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由 Lennert Buytenhek 提交于
Make it possible to pass mbus_dram_target_info to the ehci-orion driver via the platform data, make the ehci-orion driver program the window registers based on this data if it is passed in, and make the Orion platform setup code use this method instead of programming the EHCI mbus window registers by hand. Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Reviewed-by: NTzachi Perelstein <tzachi@marvell.com> Acked-by: NRussell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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由 Lennert Buytenhek 提交于
Make the Orion PCIe/PCI code initialise MBUS decode windows based on mbus_dram_target_info instead of reading the info from the Orion DDR unit decode registers directly, and move the window code with the other PCI code, where it can be called as part of the generic PCIe/PCI init process. Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Reviewed-by: NTzachi Perelstein <tzachi@marvell.com> Acked-by: NRussell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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由 Lennert Buytenhek 提交于
Initialise orion_mbus_dram_info on boot, and prepare for passing this info into peripheral drivers. Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Reviewed-by: NTzachi Perelstein <tzachi@marvell.com> Acked-by: NRussell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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- 08 3月, 2008 1 次提交
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由 Lennert Buytenhek 提交于
Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 09 2月, 2008 1 次提交
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由 Lennert Buytenhek 提交于
Hack up the Orion port to distinguish between virtual and physical addresses of register windows. This will allow moving virtual mappings higher up in the address space, to free up more kernel virtual address space. Signed-off-by: NLennert Buytenhek <buytenh@marvell.com> Signed-off-by: NNicolas Pitre <nico@marvell.com>
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- 26 1月, 2008 2 次提交
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由 Herbert Valerio Riedel 提交于
add MV88F5181 support bits required by D-link DNS-323 patch Signed-off-by: NHerbert Valerio Riedel <hvr@gnu.org> Acked-by: NTzachi Perelstein <tzachi@marvell.com> Acked-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Tzachi Perelstein 提交于
The Orion has fully programable address map. There's a separate address map for each of the device _master_ interfaces, e.g. CPU, PCI, PCIE, USB, Gigabit Ethernet, DMA/XOR engines, etc. Signed-off-by: NTzachi Perelstein <tzachi@marvell.com> Reviewed-by: NNicolas Pitre <nico@marvell.com> Reviewed-by: NLennert Buytenhek <buytenh@marvell.com>
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