- 05 4月, 2013 4 次提交
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由 Kuninori Morimoto 提交于
"ip" and "root" settings are useful for development Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Kuninori Morimoto 提交于
This patch adds SMSC ethernet support on Bock-W Bock-W SMSC needs FPGA settings which enables interrupt. This patch does it on bockw_init() function. As notes for future, this FPGA settings should be updated, since this FPGA is using cascaded interrupt. Current code is assuming that this FPGA interrupt user is only SMSC. Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Simon Horman 提交于
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由 Sergei Shtylyov 提交于
Add Ether clock and platform device for R8A7778 SoC; add a function to register this device with board-specific platform data. Signed-off-by: NSergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 04 4月, 2013 2 次提交
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由 Kuninori Morimoto 提交于
This patch adds r8a7778_init_irq_extpin() for IRQ0 - IRQ3. But this patch doesn't enable DT settings on r8a7778.dts, because R8A7778 chip external IRQ depends on IRQ0 - IRQ3 pin encoding which came from platform board implementation. Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Kuninori Morimoto 提交于
remove pointless PLATFORM_INFO() macro from setup-r8a7778, and, used original platform_device_register_xxx() Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 03 4月, 2013 34 次提交
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由 Guennadi Liakhovetski 提交于
MMCIF and SDHI1 share the same slot on mackerel. One of them is selected by a jumper, which cannot be queried from software. Currently in software one of the two interfaces is selected, depending whether or not the MMCIF driver is enabled. This is not optimal, since the kernel has to be rebuilt to switch from one interface to another. Still, so far there isn't a better option. At least make this selection consistent. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Guennadi Liakhovetski 提交于
To unify with SDHI1 also use named IRQs for SDHI0. This also clarifies which specific IRQs are used. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Guennadi Liakhovetski 提交于
Both SDHI and MMCIF drivers can use the standard slot-gpio card-detection functions. Switch mackerel to using them instead of platform callbacks. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Guennadi Liakhovetski 提交于
Both SDHI and MMCIF drivers ignore their OCR platform values, when available voltages can be retrieved from regulators. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Guennadi Liakhovetski 提交于
The SDHI driver doesn't care about platform resource order, explicit resource numbering is redundant. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Magnus Damm 提交于
Lager base board support making use of 2 GiB of memory, the r8a7790 SoC with the SCIF0 serial port and CA15 with ARM architected timer. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Magnus Damm 提交于
Add LAN9220 support to the APE6EVM board using C and DT. At this point the PFC driver lacks DT bindings so to configure the PFC we use PINCTRL in C board code. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Magnus Damm 提交于
Start using the r8a73a4 PFC on the APE6EVM board and configure the SCIFA0 console signals in the PFC via PINCTRL. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Magnus Damm 提交于
V3 of APE6EVM base board support making use of 1 GiB of memory, the SCIFA0 serial port and ARM architected timer. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Guennadi Liakhovetski 提交于
Add a DT node for the SMSC 9221 ethernet chip, found on kzm9g, to its reference implementation. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Kuninori Morimoto 提交于
Add basic Bock-W board support More devices will be added on top of this patch after PICNTRL and clock framework are in better shape. Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Simon Horman 提交于
Second round of Renesas ARM and SH based SoC pinmux updates for v3.10 Highlights: * Compilation fixes for sh7269 and for when CONFIG_BUG is not set * sh-pfc Support for r8a73a4 SoC * Move GPIOs handling from the PFC device to separate GPIO devices on the r8a7779 SoC This pull request is based on a merge of: git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-pinmux-for-v3.10 git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas renesas-soc2-for-v3.10 This merge is made to supply run-time dependencies for the following patches that will bea added on top: ARM: shmobile: APE6EVM LAN9220 support ARM: shmobile: APE6EVM PFC support
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由 Magnus Damm 提交于
Remove unused pull-up/down data from the r8a73a4 PFC code. Signed-off-by: NMagnus Damm <damm@opensource.se> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Magnus Damm 提交于
Function GPIOs are not used anymore, and all code use the GPIO numbers directly. Remove the GPIOs enumeration. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Magnus Damm 提交于
All r8a73a4 platforms use the pinctrl API to control pin functions. Function GPIOs are no longer needed. Signed-off-by: NMagnus Damm <damm@opensource.se> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Magnus Damm 提交于
Remove IRQ pin function GPIOs that have been deprecated by the pinctrl API. Signed-off-by: NMagnus Damm <damm@opensource.se> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Magnus Damm 提交于
Remove SCIF function GPIOs that have been deprecated by the pinctrl API. Signed-off-by: NMagnus Damm <damm@opensource.se> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Magnus Damm 提交于
The r8a73a4 board support will use the pinctrl API to control the external IRQ pins so remove the unused function GPIOS. Signed-off-by: NMagnus Damm <damm@opensource.se> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Magnus Damm 提交于
The r8a73a4 board support will use the pinctrl API to control the SCIF pins, remove the corresponding unused function GPIOS. Signed-off-by: NMagnus Damm <damm@opensource.se> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Magnus Damm 提交于
V2 of PINCTRL support for r8a73a4 IRQC hardware and in particular the external pins IRQ0 -> IRQ57. Signed-off-by: NMagnus Damm <damm@opensource.se> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Magnus Damm 提交于
Add PINCTRL support for r8a73a4 SCIF ports SCIFA0->SCIFA1 and SCIFB0->SCIFB3. Signed-off-by: NMagnus Damm <damm@opensource.se> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Magnus Damm 提交于
Implement pull-up/down support for r8a73a4 similar to the implementation for sh73a0. Signed-off-by: NMagnus Damm <damm@opensource.se> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Magnus Damm 提交于
V2 of code to add GPIO -> IRQ mappings to the PFC table for the r8a73a4 SoC. Requires the IRQs to be mapped at a fixed location in Linux IRQ space. The actual IRQs are not handled by the PFC, instead IRQC is used on r8a73a4. Signed-off-by: NMagnus Damm <damm@opensource.se> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Magnus Damm 提交于
The r8a73a4 SoC has sparse GPIO numbers. Declare ranges for pin numbers in the PFC SoC data. Pin numbers shall be used with the GPIO API from this point on. Signed-off-by: NMagnus Damm <damm@opensource.se> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Magnus Damm 提交于
Add initial PFC support for the r8a73a4 SoC. At this point only GPIO interface is supported, move to newer interfaces planned as incremental changes. Original authors are Morimoto-san with help from Yoshii-san, thanks to them for the heavy lifting. Adjusted by Magnus to work together with updated code in drivers/pinctrl. Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NTakashi Yoshii <takashi.yoshii.zj@renesas.com> Signed-off-by: NMagnus Damm <damm@opensource.se> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Laurent Pinchart 提交于
The output pixel clocks can be used without the input pixel clocks. Split them in different groups. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Laurent Pinchart 提交于
GPIOs are now handled by a separate driver, remove GPIO data from the SoC information structure. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Laurent Pinchart 提交于
Move GPIOs handling from the PFC device to separate GPIO devices. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Laurent Pinchart 提交于
When a GPIO is handled by a separate driver the pinmux gpio_set_direction() handler won't be called. The pin mux type then need to be configured to GPIO at request time. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Laurent Pinchart 提交于
Boards/platforms that register dedicated GPIO devices will not supply a memory resource for GPIOs. Try to locate the GPIO memory resource at initialization time, and skip registration of the gpiochip if the resource can't be found. This is a temporary modification to ease the transition to separate GPIO drivers. It should be reverted when all boards and platforms will have been moved. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Laurent Pinchart 提交于
When implemented as a separate IP block, GPIOs should be handled by a separate driver. To make this possible GPIO support needs to be optional in the sh-pfc driver. If no GPIO data registers are supplied in the SoC information structure skip registration of the gpiochip. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Laurent Pinchart 提交于
The target is to get rid of function GPIOs completely. To reach this, make function GPIOs support optional by skipping the function GPIO chip registration if no function GPIOS are defined in SoC data. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Laurent Pinchart 提交于
The board has 3 LEDs connected to GPIOs. Add a led-gpio device to support them. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Laurent Pinchart 提交于
Register the GPIO pin range, and request and free GPIO pins using the pinctrl API. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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