set SMP link timeout value to maximum.
Signed-off-by: NXiangliang Yu <yuxiangl@marvell.com>
Signed-off-by: NJames Bottomley <JBottomley@Parallels.com>

with 1 expander, connect 8 HDD, the write performance will be
improved by 80%.
Signed-off-by: NXiangliang Yu <yuxiangl@marvell.com>
Signed-off-by: NJames Bottomley <JBottomley@Parallels.com>

-- change connection behavior
-- set bit8 to 1 for performance tuning
-- set bit0 to 0 to enable retry for no_dest reject case.
Signed-off-by: NXiangliang Yu <yuxiangl@marvell.com>
Signed-off-by: NJames Bottomley <JBottomley@Parallels.com>

disable non data frame retry
Signed-off-by: NXiangliang Yu <yuxiangl@marvell.com>
Signed-off-by: NJames Bottomley <JBottomley@Parallels.com>

spin up issue: some direct attached SAS device can't spin up
Signed-off-by: NXiangliang Yu <yuxiangl@marvell.com>
Signed-off-by: NJames Bottomley <JBottomley@Parallels.com>

Add support for Marvell 88SE9480 SAS/SATA HBA
Signed-off-by: NXiangliang Yu <yuxiangl@marvell.com>
Signed-off-by: NJames Bottomley <JBottomley@Parallels.com>

Expanders fail to link when the phy rates are mismatched.
Signed-off-by: NXiangliang Yu <yuxiangl@marvell.com>
Signed-off-by: NJames Bottomley <JBottomley@Parallels.com>

Needed to jump to scic_lock unlock.

Also spotted by coccicheck.
Signed-off-by: NJeff Skirvin <jeffrey.d.skirvin@intel.com>
Cc: <stable@kernel.org>
Signed-off-by: NDan Williams <dan.j.williams@intel.com>
Signed-off-by: NJames Bottomley <JBottomley@Parallels.com>

Kill the local smp response buffer.

Besides being unnecessary, it is too small (currently truncates
responses to 60 bytes).  The mid-layer will have already allocated a
sufficiently sized buffer, just kmap and copy into it directly.

Cc: <stable@kernel.org>
Reported-by: NDerick Marks <derick.w.marks@intel.com>
Tested-by: NDerick Marks <derick.w.marks@intel.com>
Signed-off-by: NDan Williams <dan.j.williams@intel.com>
Signed-off-by: NJames Bottomley <JBottomley@Parallels.com>

Code Inspection: found two missing break directives. First one will
result in not retrying an a task that report
IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY, the second will result in cosmetic
debug printk conflicting statement stutter. Because checkpatch.pl came
up with a warning regarding unnecessary space before a newline on one of
the fragments associated with the diff context, I took the liberty of
fixing all the cases of this issue in the pair of files touched by this
defect. These cosmetic changes hide the break changes :-(

To help focus, break changes are in pm8001_hwi.c fragment line 1649 for
the IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY case statement and pm8001_sas.c
line 1000 deals with the conflicting debug print stutter.
Signed-off-by: NMark Salyzyn <mark_salyzyn@us.xyratex.com>
Acked-by: NJack Wang <jack_wang@usish.com>
Signed-off-by: NJames Bottomley <JBottomley@Parallels.com>

On the pm8001, when a device is in the process of going away (device
power off or hot plug), depending on the timing, the driver would return
SAS_PHY_DOWN as the return value to the queuecommand DEV_IS_GONE logic.
The net result is an near infinite retry (especially if SAS debugging is
enabled), the logs will fill with:

kernel: mpi_ssp_completion 2119:e21:SSP IO status 0x13 tag 0xcc1c0000
dlen=90 param=0xe
kernel: wwn=5000c50034069e86  cdb=12 00 00 00 5a 00 00 00 00 00 00 00 00
00 00 00
kernel: sas: lldd_execute_task returned: 138
kernel: sas: lldd_execute_task returned: 138
kernel: sas: lldd_execute_task returned: 138
kernel: sas: lldd_execute_task returned: 138
kernel: sas: lldd_execute_task returned: 138
kernel: sas: lldd_execute_task returned: 138
kernel: sas: lldd_execute_task returned: 138
. . .

This patch changes to leverage the port_attached logic to complete the
command with a status of PHY_DOWN so that the disposition can be handled
immediately and correctly.
Signed-off-by: NMark Salyzyn <mark_salyzyn@us.xyratex.com>
Acked-by: NJack Wang <jack_wang@usish.com>
Signed-off-by: NJames Bottomley <JBottomley@Parallels.com>

Currently fcoe_ddp_min doesn't have default value
so by default not used, so setting up default value
as 4k as this works better by avoiding overhead
of programing DDP for small IOs.
Signed-off-by: NVasu Dev <vasu.dev@intel.com>
Tested-by: NRoss Brattain <ross.b.brattain@intel.com>
Signed-off-by: NYi Zou <yi.zou@intel.com>
Signed-off-by: NJames Bottomley <JBottomley@Parallels.com>

Use real dev in case it has HW vlan acceleration
support since in this case the real dev would
do needed vlan processing, this way unnecessary
vlan layer processing avoided and it gives
slightly better IOPS with 512B size IOs.
Signed-off-by: NVasu Dev <vasu.dev@intel.com>
Tested-by: NRoss Brattain <ross.b.brattain@intel.com>
Signed-off-by: NYi Zou <yi.zou@intel.com>
Signed-off-by: NJames Bottomley <JBottomley@Parallels.com>

fix holes and better cache aligned fields.
Signed-off-by: NVasu Dev <vasu.dev@intel.com>
Tested-by: NRoss Brattain <ross.b.brattain@intel.com>
Signed-off-by: NYi Zou <yi.zou@intel.com>
Signed-off-by: NJames Bottomley <JBottomley@Parallels.com>

cache aligned xid and ex_lock beside
removing holes.
Signed-off-by: NVasu Dev <vasu.dev@intel.com>
Tested-by: NRoss Brattain <ross.b.brattain@intel.com>
Signed-off-by: NYi Zou <yi.zou@intel.com>
Signed-off-by: NJames Bottomley <JBottomley@Parallels.com>

Re-arrange its fields to avoid padding and have better
cacheline alignments.

Removed not used start_time, end_time and last_pkt_time
fields.

This all reduced this struct size to 448 from 480 and
that also reduced one cacheline on x86_64 beside
eliminating 8 pads. However kept logical fields together.
Signed-off-by: NVasu Dev <vasu.dev@intel.com>
Tested-by: NRoss Brattain <ross.b.brattain@intel.com>
Signed-off-by: NYi Zou <yi.zou@intel.com>
Signed-off-by: NJames Bottomley <JBottomley@Parallels.com>

Since fcoe_percpu_thread_create() creates percpu kthread, it makes sense
to use kthread_create_on_node() to get proper NUMA affinity for kthread
stack.
Signed-off-by: NEric Dumazet <eric.dumazet@gmail.com>
Signed-off-by: NYi Zou <yi.zou@intel.com>
Signed-off-by: NJames Bottomley <JBottomley@Parallels.com>

Several sas drivers legitimately check the protocol against the union of
SAS_PROTOCOL_SATA and SAS_PROTOCOL_STP.  Provide a SAS_PROTOCOL_STP_ALL
to silence warnings like:

drivers/scsi/pm8001/pm8001_sas.c:438:3: warning: case value ‘5’ not in enumerated type ‘enum sas_protocol’ [-Wswitch]
drivers/scsi/mvsas/mv_sas.c:798:2: warning: case value ‘5’ not in enumerated type ‘enum sas_protocol’ [-Wswitch]
drivers/scsi/mvsas/mv_sas.c:1783:2: warning: case value ‘5’ not in enumerated type ‘enum sas_protocol’ [-Wswitch]
drivers/scsi/mvsas/mv_sas.c:1886:2: warning: case value ‘5’ not in enumerated type ‘enum sas_protocol’ [-Wswitch]
drivers/scsi/isci/request.c:3565:2: warning: case value ‘5’ not in enumerated type ‘enum sas_protocol’ [-Wswitch]
Signed-off-by: NDan Williams <dan.j.williams@intel.com>
Signed-off-by: NJames Bottomley <JBottomley@Parallels.com>

Libsas forget to set the sas_address and device type of rphy lead to file
under /sys/class/sas_x show wrong value, fix that.
Signed-off-by: NJack Wang <jack_wang@usish.com>
Tested-by: NCrystal Yu <crystal_yu@usish.com>
Cc: stable@kernel.org
Signed-off-by: NJames Bottomley <JBottomley@Parallels.com>

If the user has disabled CONFIG_SCSI_SAS_HOST_SMP then libsas drivers
will not be receiving smp-gpio frames and do not need this lookup code.
Reported-by: NRandy Dunlap <rdunlap@xenotime.net>
Tested-by: NRandy Dunlap <rdunlap@xenotime.net>
Signed-off-by: NDan Williams <dan.j.williams@intel.com>
Signed-off-by: NJames Bottomley <JBottomley@Parallels.com>

libsas handles:
1/ limiting ata scanning to lun0
2/ changes to /sys/block/<sdX>/device/queue_depth for ata devices

libata handles turning off ncq globally via kernel command line
(libata.force=noncq) or sysfs (echo 1 >
/sys/block/<sdX>/device/queue_depth).  A lldd specific compile option is
not necessary.

Cc: Jack Wang <jack_wang@usish.com>
Signed-off-by: NDan Williams <dan.j.williams@intel.com>
Signed-off-by: NJames Bottomley <JBottomley@Parallels.com>

libsas now handles:
1/ limiting ata scanning to lun0
2/ maximizing the queue_depth of sas devices (up to 256, mvsas only
   supports 64)
3/ changes to /sys/block/<sdX>/device/queue_depth for ata devices
Acked-by: NXiangliang Yu <yuxiangl@marvell.com>
Signed-off-by: NDan Williams <dan.j.williams@intel.com>
Signed-off-by: NJames Bottomley <JBottomley@Parallels.com>

The queue-depth for libsas-attached devices initializes to 32 and can
only be increased manually via sysfs to a max of 64, while mpt2sas
attached devices initialize to 254 and dynamically float via the
midlayer ->change_queue_depth interface.

No performance regression was observed with this change on the isci
driver.
Tested-by: NDave Jiang <dave.jiang@intel.com>
Signed-off-by: NDan Williams <dan.j.williams@intel.com>
Signed-off-by: NJames Bottomley <JBottomley@Parallels.com>

Pass queue_depth change requests to libata, and prevent queue_type
changes for ATA devices.

Otherwise:
1/ we do not honor the libata specific restrictions on the queue depth
2/ libsas drivers that do not set sdev->tagged_supported are unable to
   change the queue_depth of ata devices via sysfs
Signed-off-by: NDan Williams <dan.j.williams@intel.com>
Acked-by: NJeff Garzik <jgarzik@redhat.com>
Signed-off-by: NJames Bottomley <JBottomley@Parallels.com>

Currently mvsas and pm8001 have custom ->slave_alloc implementations to
achieve this.  Uplevel it for all libsas drivers as isci encounters problems
with atapi devices when scanning past lun0.

Just do what Darrick suggested [1], and limit the scan for ata devices.

[1] http://marc.info/?l=linux-scsi&m=116604101119861&w=2Signed-off-by: NDan Williams <dan.j.williams@intel.com>
Signed-off-by: NJames Bottomley <JBottomley@Parallels.com>

Allow expander table-to-table attachments for
expanders that support it.
Signed-off-by: NLuben Tuikov <ltuikov@yahoo.com>
Signed-off-by: NJames Bottomley <JBottomley@Parallels.com>

When the ipr driver decides to dump the adapter, it changes the
sdt_state to GET_DUMP, then prepares the adapter so that the dump
can be read. However, if the ipr worker thread wakes up for some
reason before the driver has put the adapter in a state where it
can succesfully dump the adapter, the driver will start dumping
the adapter too early, which can potentially trigger a BUG check
in the pci config blocking API. Fix this by adding a new
sdt_state to differentiate between the ipr driver wanting to dump
the adapter in the near future and wanting to dump the adapter now.
Signed-off-by: NBrian King <brking@linux.vnet.ibm.com>
Signed-off-by: NJames Bottomley <JBottomley@Parallels.com>

Signed-off-by: NVijay Chauhan <Vijay.chauhan@netapp.com>
Reviewed-by: NBob Stankey <Robert.stankey@netapp.com>
Reviewed-by: NBabu Moger <Babu.moger@netapp.com>
Acked-by: NChandra Seetharaman <sekharan@us.ibm.com>
Signed-off-by: NJames Bottomley <JBottomley@Parallels.com>

Signed-off-by: NBhanu Prakash Gollapudi <bprakash@broadcom.com>
Signed-off-by: NJames Bottomley <JBottomley@Parallels.com>

Gracefully handle bnx2fc_map_sg failure, so that queuecommand returns host busy
and SCSI-ml can retry the IO.
Signed-off-by: NBhanu Prakash Gollapudi <bprakash@broadcom.com>
Signed-off-by: NJames Bottomley <JBottomley@Parallels.com>

scsi_dma_map doesn't work for NPIV since vport dev isn't fully initialized.

For more details: http://marc.info/?l=linux-scsi&m=118312448030633&w=2 and
commit - c59fd9eb.
Signed-off-by: NNithin Sujir <nsujir@broadcom.com>
Signed-off-by: NBhanu Prakash Gollapudi <bprakash@broadcom.com>
Signed-off-by: NJames Bottomley <JBottomley@Parallels.com>

When READ_16 command is issued, the setting of SILI Bit in CDB is confirmed
and if SILI bit is off, the processing of relavent Errata is executed.

Added code for checking SILI bit for READ_16 as described in "SSC-4".
Signed-off-by: NNagalakshmi Nandigama <nagalakshmi.nandigama@lsi.com>
Signed-off-by: NJames Bottomley <JBottomley@Parallels.com>

Sizeof a pointer-typed expression returns the size of the pointer, not that
of the pointed data.

The semantic patch that fixes this problem is as follows:
(http://coccinelle.lip6.fr/)

// <smpl>
@@
expression *e;
type T;
identifier f;
@@

f(...,(T)e,...,
-sizeof(e)
+sizeof(*e)
,...)
// </smpl>
Signed-off-by: NJulia Lawall <julia@diku.dk>
Signed-off-by: NJames Bottomley <JBottomley@Parallels.com>

bnx2fc.txt outlines the driver usage model.
Signed-off-by: NBhanu Prakash Gollapudi <bprakash@broadcom.com>
Signed-off-by: NJames Bottomley <JBottomley@Parallels.com>

Mutual exclusion is redundant here because all the paths in the call graph
leading to esp_driver_ops.send_dma_cmd() happen under spin_lock_irqsave/
spin_lock_irqrestore. Remove it.

Tested on a Mac Quadra 660av and a Mac LC 630.
Signed-off-by: NFinn Thain <fthain@telegraphics.com.au>
Signed-off-by: NJames Bottomley <JBottomley@Parallels.com>

Signed-off-by: NNagalakshmi Nandigama <nagalakshmi.nandigama@lsi.com>
Signed-off-by: NJames Bottomley <JBottomley@Parallels.com>

Support added for controllers capable of multi reply queues.

The following are the modifications to the driver to support NUMA.

1) Create the new structure adapter_reply_queue to contain the reply queue
   info for every msix vector.  This object will contain a
   reply_post_host_index, reply_post_free for each instance, msix_index, among
   other parameters.  We will track all the reply queues on a link list called
   ioc->reply_queue_list. Each reply queue is aligned with each IRQ, and is
   passed to the interrupt via the bus_id parameter.

(2) The driver will figure out the msix_vector_count from the PCIe MSIX
    capabilities register instead of the IOC Facts->MaxMSIxVectors. This is
    because the firmware is not filling in this field until the driver has
    already registered MSIX support.

(3) If the ioc_facts reports that the controller is MSIX compatible in the
    capabilities, then the driver will request for multiple irqs.  This count
    is calculated based on the minimum between the online cpus available and
    the ioc->msix_vector_count.  This count is reported to firmware in the
    ioc_init request.

(4) New routines were added _base_free_irq and _base_request_irq, so
    registering and freeing msix vectors were done thru simple function API.

(5) The new routine _base_assign_reply_queues was added to align the msix
    indexes across cpus. This will initialize the array called
    ioc->cpu_msix_table.  This array is looked up on every MPI request so the
    MSIxIndex is set appropriately.

(6) A new shost sysfs attribute was added to report the reply_queue_count.

(7) User needs to set the affinity cpu mask, so the interrupts occur on the
    same cpu that sent the original request.
Signed-off-by: NNagalakshmi Nandigama <nagalakshmi.nandigama@lsi.com>
Signed-off-by: NJames Bottomley <JBottomley@Parallels.com>

This patch adds couple more Vendor/Product IDs for RDAC.. There are no
functional changes.
Signed-off-by: NBabu Moger <babu.moger@netapp.com>
Signed-off-by: NJames Bottomley <JBottomley@Parallels.com>

Basic support to initialize the gpio unit, accept an incomming
SAS_GPIO_REG_TX_GP bitstream, and translate it to the ODx.n fields in
the hardware registers.  If register indexes outside the supported range
are specified in the SMP frame we simply accept the write and return how
many registers (SFF-8485) were written (libsas reports this as residue
in the request).
Signed-off-by: NDan Williams <dan.j.williams@intel.com>
Signed-off-by: NJames Bottomley <JBottomley@Parallels.com>

output_data_select registers are off by one u32

delete the macros we will never use.
Reported-by: NArtur Wojcik <artur.wojcik@intel.com>
Signed-off-by: NDan Williams <dan.j.williams@intel.com>
Signed-off-by: NJames Bottomley <JBottomley@Parallels.com>