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  1. 20 4月, 2007 6 次提交
    • S
      sky2: handle descriptor errors · 40b01727
      由 Stephen Hemminger 提交于 
      There should never be descriptor error unless hardware or driver is buggy.
But if an error occurs, print useful information, clear irq, and recover.
Signed-off-by: NStephen Hemminger <shemminger@linux-foundation.org>
Signed-off-by: NJeff Garzik <jeff@garzik.org>
      40b01727
    • S
      sky2: disable support for 88E8056 · 0a17e4c2
      由 Stephen Hemminger 提交于 
      This device is having all sorts of problems that lead to data corruption
and system instability.  It gets receive status and data out of order,
it generates descriptor and TSO errors, etc.

Until the problems are resolved, it should not be used by anyone
who cares about there system.
Signed-off-by: NStephen Hemminger <shemminger@linux-foundation.org>
Signed-off-by: NJeff Garzik <jeff@garzik.org>
      0a17e4c2
    • D
      gianfar needs crc32 lib dependency · bf41a7c5
      由 Dave Jiang 提交于 
      Gianfar needs crc32 to be selected to compile.
Signed-off-by: NDave Jiang <djiang@mvista.com>

--
 drivers/net/Kconfig |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)
--
Signed-off-by: NJeff Garzik <jeff@garzik.org>
      bf41a7c5
    • L
      spidernet: Fix problem sending IP fragments · 33bdeec8
      由 Linas Vepstas 提交于 
      The basic structure of "normal" UDP/IP/Ethernet
frames (that actually work):
 - It starts with the Ethernet header (dest MAC, src MAC, etc.)
 - The next part is occupied by the IP header (version info, length of
packet, id=0, fragment offset=0, checksum, from / to address, etc.)
 - Then comes the UDP header (src / dest port, length, checksum)
 - Actual payload
 - Ethernet checksum

Now what's different for IP fragment:
 - The IP header has id set to some value (same for all fragments),
offset is set appropriately (i.e. 0 for first fragment, following
according to size of other fragments), size is the length of the frame.
 - UDP header is unchanged. I.e. length is according to full UDP
datagram, not just the part within the actual frame! But this is only
true within the first frame: all following frames don't have a valid
UDP-header at all.

The spidernet silicon seems to be quite intelligent: It's able to
compute (IP / UDP / Ethernet) checksums on the fly and tests if frames
are conforming to RFC -- at least conforming to RFC on complete frames.

But IP fragments are different as explained above:
I.e. for IP fragments containing part of a UDP datagram it sees
incompatible length in the headers for IP and UDP in the first frame
and, thus, skips this frame. But the content *is* correct for IP
fragments. For all following frames it finds (most probably) no valid
UDP header at all. But this *is* also correct for IP fragments.

The Linux IP-stack seems to be clever in this point. It expects the
spidernet to calculate the checksum (since the module claims to be able
to do so) and marks the skb's for "normal" frames accordingly
(ip_summed set to CHECKSUM_HW).
But for the IP fragments it does not expect the driver to be capable to
handle the frames appropriately. Thus all checksums are allready
computed. This is also flaged within the skb (ip_summed set to
CHECKSUM_NONE).

Unfortunately the spidernet driver ignores that hints. It tries to send
the IP fragments of UDP datagrams as normal UDP/IP frames. Since they
have different structure the silicon detects them the be not
"well-formed" and skips them.

The following one-liner against 2.6.21-rc2 changes this behavior. If the
IP-stack claims to have done the checksumming, the driver should not
try to checksum (and analyze) the frame but send it as is.
Signed-off-by: NNorbert Eicker <n.eicker@fz-juelich.de>
Signed-off-by: NLinas Vepstas <linas@austin.ibm.com>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NJeff Garzik <jeff@garzik.org>
      33bdeec8
    • D
      cxgb3 - PHY interrupts and GPIO pins. · 1ca03cbc
      由 Divy Le Ray 提交于 
      Remove assumption that PHY interrupts use GPIOs 3 and 5.
Deal with PHY interrupts connected to any GPIO pins.
Signed-off-by: NDivy Le Ray <divy@chelsio.com>
Signed-off-by: NJeff Garzik <jeff@garzik.org>
      1ca03cbc
    • D
      cxgb3 - Fix low memory conditions · 606fcd0b
      由 Divy Le Ray 提交于 
      Reuse the incoming skb when a clientless abort req is recieved.

The release of RDMA connections HW resources might be deferred in
low memory situations.
Ensure that no further activity is passed up to the RDMA driver
for these connections.
Signed-off-by: NDivy Le Ray <divy@chelsio.com>
Signed-off-by: NJeff Garzik <jeff@garzik.org>
      606fcd0b
  3. 11 4月, 2007 14 次提交
  5. 10 4月, 2007 2 次提交
  7. 07 4月, 2007 1 次提交
  9. 04 4月, 2007 7 次提交
  11. 03 4月, 2007 1 次提交
    • M
      [BNX2]: Fix nvram write logic. · c873879c
      由 Michael Chan 提交于 
      The nvram dword alignment logic was broken when writing less than 4
bytes on a non-aligned offset.  It was missing logic to round the
length to 4 bytes.

The page erase code is also moved so that it is only called when
using non-buffered flash for better code clarity.

Update version to 1.5.7.

Based on initial patch from Tony Cureington <tony.cureington@hp.com>.
Signed-off-by: NMichael Chan <mchan@broadcom.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      c873879c
  13. 02 4月, 2007 1 次提交
    • G
      [ARM] 4295/2: Fix error-handling in pxaficp_ir.c (version 2) · 9a4d93d4
      由 Guennadi Liakhovetski 提交于 
      This patch addresses the following issues with the pxa2xx FIr driver:

1. increment overrun error counter and not frame error counter on ICSR1_ROR bit set in ICSR1.
2. drop frames reported with the frame error from the IC.
3. when resetting the receiver and preparing it for the next DMA in pxa_irda_fir_irq() actually clear the Rx FIFO. See description in Table 11-2 in PXA270 Developer's Manual of the RXE bit.

Correction added in version 2: clearing the IC Rx FIFO also has to be done in pxa_irda_fir_dma_tx_irq()
Signed-off-by: NG. Liakhovetski <gl@dsa-ac.de>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      9a4d93d4
  15. 30 3月, 2007 1 次提交
  17. 29 3月, 2007 4 次提交
  19. 28 3月, 2007 3 次提交