- 18 6月, 2015 1 次提交
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由 Russell King 提交于
Convert SA11x0 (Neponset, SA1111, and UCB1x00 code) to use the new irq_set_chained_handler_and_data() helper. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Cc: Alexandre Courbot <gnurou@gmail.com> Cc: Hans Ulli Kroll <ulli.kroll@googlemail.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Lee Jones <lee.jones@linaro.org> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: linux-arm-kernel@lists.infradead.org Link: http://lkml.kernel.org/r/E1Z4yzx-0002S6-7p@rmk-PC.arm.linux.org.ukSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
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- 04 4月, 2015 1 次提交
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由 Nicolas Pitre 提交于
All backends are reimplementing a variation of the same CPU reference count handling. They are also responsible for driving the MCPM special low-level locking. This is needless duplication, involving algorithmic requirements that are not necessarily obvious to the uninitiated. And from past code review experience, those were all initially implemented badly. After 3 years, it is time to refactor as much common code to the core MCPM facility to make the backends as simple as possible. To avoid a flag day, the new scheme is introduced in parallel to the existing backend interface. When all backends are converted over, the compatibility interface could be removed. The new MCPM backend interface implements simpler methods addressing very platform specific tasks performed under lock protection while keeping the algorithmic complexity and race avoidance local to the core code. Signed-off-by: NNicolas Pitre <nico@linaro.org> Tested-by: NDaniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 01 4月, 2015 1 次提交
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由 Thomas Gleixner 提交于
Use the new tick_suspend/resume_local() and get rid of the homebrewn implementation of these in the ARM bL switcher. The check for the cpumask is completely pointless. There is no harm to suspend a per cpu tick device unconditionally. If that's a real issue then we fix it proper at the core level and not with some completely undocumented hacks in some random core code. Move the tick internals to the core code, now that this nuisance is gone. Signed-off-by: NThomas Gleixner <tglx@linutronix.de> [ rjw: Rebase, changelog ] Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com> Cc: Nicolas Pitre <nicolas.pitre@linaro.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Russell King <rmk+kernel@arm.linux.org.uk> Link: http://lkml.kernel.org/r/1655112.Ws17YsMfN7@vostro.rjw.lanSigned-off-by: NIngo Molnar <mingo@kernel.org>
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- 27 3月, 2015 1 次提交
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由 Viresh Kumar 提交于
'enum clock_event_mode' is used for two purposes today: - to pass mode to the driver of clockevent device::set_mode(). - for managing state of the device for clockevents core. For supporting new modes/states we have moved away from the legacy set_mode() callback to new per-mode/state callbacks. New modes/states shouldn't be exposed to the legacy (now OBSOLOTE) callbacks and so we shouldn't add new states to 'enum clock_event_mode'. Lets have separate enums for the two use cases mentioned above. Keep using the earlier enum for legacy set_mode() callback and mark it OBSOLETE. And add another enum to clearly specify the possible states of a clockevent device. This also renames the newly added per-mode callbacks to reflect state changes. We haven't got rid of 'mode' member of 'struct clock_event_device' as it is used by some of the clockevent drivers and it would automatically die down once we migrate those drivers to the new interface. It ('mode') is only updated now for the drivers using the legacy interface. Suggested-by: NPeter Zijlstra <peterz@infradead.org> Suggested-by: NIngo Molnar <mingo@kernel.org> Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org> Acked-by: NPeter Zijlstra <a.p.zijlstra@chello.nl> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Frederic Weisbecker <fweisbec@gmail.com> Cc: Kevin Hilman <khilman@linaro.org> Cc: Preeti U Murthy <preeti@linux.vnet.ibm.com> Cc: linaro-kernel@lists.linaro.org Cc: linaro-networking@linaro.org Cc: linux-arm-kernel@lists.infradead.org Link: http://lkml.kernel.org/r/b6b0143a8a57bd58352ad35e08c25424c879c0cb.1425037853.git.viresh.kumar@linaro.orgSigned-off-by: NIngo Molnar <mingo@kernel.org>
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- 21 11月, 2014 2 次提交
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由 Russell King 提交于
Convert many (but not all) printk(KERN_* to pr_* to simplify the code. We take the opportunity to join some printk lines together so we don't split the message across several lines, and we also add a few levels to some messages which were previously missing them. Tested-by: NAndrew Lunn <andrew@lunn.ch> Tested-by: NFelipe Balbi <balbi@ti.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Arnd Bergmann 提交于
The recently introduced resume hook in the edma driver is not referenced when CONFIG_PM_SLEEP is not set, which results in a compile warning in keystone builds. This adds an appropriate #ifdef. Cc: Nishanth Menon <nm@ti.com> Cc: Daniel Mack <zonque@gmail.com> Cc: Joel Fernandes <joelf@ti.com> Acked-by: NSekhar Nori <nsekhar@ti.com> Fixes: a2b11751: ("ARM: common: edma: add suspend resume hook") Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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- 18 11月, 2014 1 次提交
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由 Daniel Mack 提交于
This patch makes the edma driver resume correctly after suspend. Tested on an AM33xx platform with cyclic audio streams and omap_hsmmc. All information can be reconstructed by already known runtime information. As we now use some functions that were previously only used from __init context, annotations had to be dropped. [nm@ti.com: added error handling for runtime + suspend_late/early_resume] Signed-off-by: NNishanth Menon <nm@ti.com> Signed-off-by: NDaniel Mack <zonque@gmail.com> Tested-by: NJoel Fernandes <joelf@ti.com> Acked-by: NJoel Fernandes <joelf@ti.com> [nsekhar@ti.com: remove unneeded pm_runtime_get_sync() from resume] Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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- 06 11月, 2014 1 次提交
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由 Arnd Bergmann 提交于
The horrible split between the low-level part of the edma support and the dmaengine front-end driver causes problems on multiplatform kernels. This is an attempt to improve the situation slightly by only registering the dmaengine devices that are actually present. Signed-off-by: NArnd Bergmann <arnd@arndb.de> [olof: add missing include of linux/dma-mapping.h] Signed-off-by: NOlof Johansson <olof@lixom.net> Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 20 10月, 2014 1 次提交
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由 Wolfram Sang 提交于
A platform_driver does not need to set an owner, it will be populated by the driver core. Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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- 19 9月, 2014 1 次提交
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由 abdoulaye berthe 提交于
this remove all reference to gpio_remove retval in all driver except pinctrl and gpio. the same thing is done for gpio and pinctrl in two different patches. Signed-off-by: NAbdoulaye Berthe <berthe.ab@gmail.com> Acked-by: NMichael Büsch <m@bues.ch> Acked-by: NDmitry Torokhov <dmitry.torokhov@gmail.com> Acked-by: NMauro Carvalho Chehab <m.chehab@samsung.com> Acked-by: NTomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 26 8月, 2014 1 次提交
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由 Peter Ujfalusi 提交于
The edma_setup_from_hw() should know about the CC number when parsing the CCCFG register - when it reads the register to be precise. The base addresses for CCs stored in an array and we need to provide the correct id to edma_read() in order to read the correct register. Cc: <stable@vger.kernel.org> # 3.16 Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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- 28 7月, 2014 2 次提交
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由 Peter Ujfalusi 提交于
In some cases it is desired to move a channel to a specific event queue. Such a use case is audio, where it is preferred that it is served with highest priority compared to other DMA clients. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: NSekhar Nori <nsekhar@ti.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Peter Ujfalusi 提交于
Use the lowest priority queue as default for clients. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: NSekhar Nori <nsekhar@ti.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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- 24 7月, 2014 1 次提交
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由 Thomas Gleixner 提交于
Use the nanoseconds based interface instead of converting from a timespec. Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Cc: Russell King <linux@arm.linux.org.uk> Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: NJohn Stultz <john.stultz@linaro.org>
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- 18 7月, 2014 1 次提交
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由 Nicolas Pitre 提交于
The kernel already has the responsibility to handle resources such as the CCI when hotplugging CPUs, during the booting of secondary CPUs, and when resuming from suspend/idle. It would be more coherent and less confusing if the CCI for the boot CPU (or cluster) was also initialized by the kernel rather than expecting the firmware/bootloader to do it and only in that case. After all, the kernel has all the necessary code already and the bootloader shouldn't have to care at all. The CCI may be turned on only when the cache is off. Leveraging the CPU suspend code to loop back through the low-level MCPM entry point is all that is needed to properly turn on the CCI from the kernel by using the same code as during secondary boot. Let's provide a generic MCPM loopback function that can be invoked by backend initialization code to set things (CCI or similar) on the boot CPU just as it is done for the other CPUs. Signed-off-by: NNicolas Pitre <nico@linaro.org> Reviewed-by: NKevin Hilman <khilman@linaro.org> Tested-by: NKevin Hilman <khilman@linaro.org> Tested-by: NDoug Anderson <dianders@chromium.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 25 6月, 2014 1 次提交
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由 Rob Herring 提交于
The sp804 clocks may be specified in DT, but the kernel may still be using legacy clocks. This is handled if a single clock for sp804 is present, but not when 3 clocks are present. This prevents Versatile platforms from breaking when the DT has clocks added. Signed-off-by: NRob Herring <robh@kernel.org> Cc: Russell King <linux@arm.linux.org.uk>
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- 17 6月, 2014 1 次提交
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由 Fabio Estevam 提交于
Remove the 'temp' variable in order to fix the following build warning: arch/arm/common/scoop.c:185:6: warning: unused variable 'temp' [-Wunused-variable] Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 28 5月, 2014 1 次提交
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由 Nicolas Pitre 提交于
The content of /sys/devices/system/cpu/cpu*/online is still 1 for those CPUs that the switcher has removed even though the global state in /sys/devices/system/cpu/online is updated correctly. It turns out that commit 0902a904 ("Driver core: Use generic offline/online for CPU offline/online") has changed the way those files retrieve their content by relying on on the generic attribute handling code. The switcher, by calling cpu_down() directly, bypasses this handling and the attribute value doesn't get updated. Fix this by calling device_offline()/device_online() instead. Signed-off-by: NNicolas Pitre <nico@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 26 5月, 2014 1 次提交
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由 Dave Martin 提交于
The name "power_down_finish" seems to be causing some confusion, because it suggests that this function is responsible for taking some action to cause the specified CPU to complete its power down. This patch renames the affected functions to "wait_for_powerdown" and similar, since this function's intended purpose is just to wait for the hardware to finish a powerdown initiated by a previous cpu_power_down. Signed-off-by: NDave Martin <Dave.Martin@arm.com> Acked-by: NNicolas Pitre <nico@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 22 5月, 2014 7 次提交
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由 Peter Ujfalusi 提交于
From CCCFG register of eDMA3 we can get all the needed information for the driver about the IP: Number of channels: NUM_DMACH Number of regions: NUM_REGN Number of slots (PaRAM sets): NUM_PAENTRY Number of TC/EQ: NUM_EVQUE In case when booted with DT or the queue_priority_mapping is not provided set up a default priority map. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: NJoel Fernandes <joelf@ti.com> Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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由 Peter Ujfalusi 提交于
To be consistent in the code that we take parameters from edma_cc[j] struct and not randomly from info[j] as well. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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由 Peter Ujfalusi 提交于
The struct edma is allocated per CC bases so the member num_cc does not make any sense. One CC is one CC, it does not have sub CCs. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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由 Peter Ujfalusi 提交于
There is no need to change the default TC -> Queue mapping. By default the mapping is: TC0 -> Q0, TC1 -> Q1, etc. Changing this has no benefits at all and all the board files are just setting the same mapping back to the HW. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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由 Peter Ujfalusi 提交于
Instead of saving the for loop length, take the num_tc value from the pdata. In case of DT boot set the n_tc to 3 as it is hardwired in edma_of_parse_dt() This is a temporary state since upcoming patch(es) will change how we are dealing with these parameters. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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由 Peter Ujfalusi 提交于
The pdata has been just allocated with devm_kzalloc() in edma_setup_info_from_dt() and passed to this function. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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由 Peter Ujfalusi 提交于
Get the two interrupt line number at the same time by merging the two instance of if(node){}else{} places. replace the &pdev->dev with the already existing dev which makes it possible to collapse lines with devm_request_irq() Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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- 30 4月, 2014 1 次提交
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由 Thomas Gleixner 提交于
As Joel pointed out, edma_read_position() uses memcpy_fromio() to read the parameter ram. That's not synchronized with the internal update as it does a byte by byte copy. We need to do a 32bit read to get a consistent value. Further reading destination and source is pointless. In DEV_TO_MEM transfers we are only interested in the destination, in MEM_TO_DEV we care about the source. In MEM_TO_MEM it really does not matter which one you read. Simple solution: Remove the pointers, select dest/source via a bool and return the read value. Remove the export of this function while at it. The only potential user is the dmaengine and that's always builtin. Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Acked-by: NSekhar Nori <nsekhar@ti.com> Signed-off-by: NJoel Fernandes <joelf@ti.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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- 29 4月, 2014 1 次提交
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由 Thomas Gleixner 提交于
This is another great example of trainwreck engineering: commit 2646a0e529 (ARM: edma: Add EDMA crossbar event mux support) added support for using EDMA on peripherals which have no direct EDMA event mapping. The code compiles and does not explode in your face, but that's it. 1) Reading an u16 array from an u32 device tree array simply does not work. Even if the function is named "edma_of_read_u32_to_s16_array". It merily calls of_property_read_u16_array. So the resulting 16bit array will have every other entry = 0. 2) The DT entry for the xbar registers related to xbar has length 0x10 instead of the real length: 0xfd0 - 0xf90 = 0x40. Not a real problem as it does not cross a page boundary, but wrong nevertheless. 3) But none of this matters as the mapping never happens: After reading nonsense edma_of_read_u32_to_s16_array() invalidates the first array entry pair, so nobody can ever notice the braindamage by immediate explosion. Seems the QA criteria for this code was solely not to explode when someone adds edma-xbar-event-map entries to the DT. Goal achieved, congratulations! Not really helpful if someone wants to use edma on a device which requires a xbar mapping. Fix the issues by: - annotating the device tree entry with "/bits/ 16" as documented in the of_property_read_u16_array kernel doc - make the size of the xbar register mapping correct - invalidating the end of the array and not the start This convoluted mess wants to be completely rewritten as there is no point to keep the xbar_chan array memory and the iomapping of the xbar regs around forever. Marking the xbar mapped channels as used should be done right there. But that's a different issue and this patch is small enough to make it work and allows a simple backport for stable. Cc: stable@vger.kernel.org # v3.12+ Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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- 23 4月, 2014 3 次提交
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由 Nicolas Pitre 提交于
The switcher should not depend on MAX_CLUSTER to determine ifit should be activated or not. In a multiplatform kernel binary it is possible to have dual-cluster and quad-cluster platforms configured in. In that case MAX_CLUSTER which is a build time limit should be 4 and that shouldn't prevent the switcher from working if the kernel is booted on a b.L dual-cluster system. In bL_switcher_halve_cpus() we already have a runtime validation check to make sure we're dealing with only two clusters, so booting on a quad cluster system will be caught and switcher activation aborted. However, the b.L switcher must ensure the MCPM layer is initialized on the booted hardware before doing anything. The mcpm_is_available() function is added to that effect. Signed-off-by: NNicolas Pitre <nico@linaro.org> Tested-by: NAbhilash Kesavan <kesavan.abhilash@gmail.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Peter Ujfalusi 提交于
Indicate that the edma dmaengine driver has support for cyclic mode. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: NJoel Fernandes <joelf@ti.com> Reviewed-and-Tested-by: NJoel Fernandes <joelf@ti.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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由 Peter Ujfalusi 提交于
For later use save the number of queues available for the CC. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: NJoel Fernandes <joelf@ti.com> Reviewed-and-Tested-by: NJoel Fernandes <joelf@ti.com> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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- 20 3月, 2014 1 次提交
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由 Alexander Shiyan 提交于
Statements following return will never be executed. This patch removes this code. Signed-off-by: NAlexander Shiyan <shc_work@mail.ru> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 19 2月, 2014 1 次提交
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由 Dave Martin 提交于
The functions in mcpm_entry.c are mostly intended for use during scary cache and coherency disabling sequences, or do other things which confuse trace ... like powering a CPU down and not returning. Similarly for the backend code. For simplicity, this patch just makes whole files notrace. There should be more than enough traceable points on the paths to these functions, but we can be more fine-grained later if there is a need for it. Jon Medhurst: Also added spc.o to the list of files as it contains functions used by MCPM code which have comments comments like: "might be used in code paths where normal cacheable locks are not working" Signed-off-by: NDave Martin <dave.martin@linaro.org> Signed-off-by: NJon Medhurst <tixy@linaro.org> Acked-by: NNicolas Pitre <nico@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 13 2月, 2014 1 次提交
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由 Linus Walleij 提交于
This modifies the SP804 driver so that the clock will be taken from the device tree node for the timer. Cc: Russell King <rmk+kernel@arm.linux.org.uk> Cc: Rob Herring <rob.herring@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 29 12月, 2013 2 次提交
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由 Will Deacon 提交于
sync_cache_w already includes a dsb, so we can just use sev() directly then following a cache-sync. Acked-by: NDave Martin <Dave.Martin@arm.com> Acked-by: NNicolas Pitre <nico@linaro.org> Signed-off-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Nicolas Pitre 提交于
We have a handy macro to replace open coded __cpuc_flush_dcache_area(() and outer_clean_range() sequences. Let's use it. No functional change. Signed-off-by: NNicolas Pitre <nico@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 12 12月, 2013 1 次提交
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由 Yijing Wang 提交于
Use dev_is_pci() instead of checking bus type directly. Signed-off-by: NYijing Wang <wangyijing@huawei.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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- 22 11月, 2013 1 次提交
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由 Stephen Boyd 提交于
The 32 bit sched_clock interface now supports 64 bits. Upgrade to the 64 bit function to allow us to remove the 32 bit registration interface. Also mark the read function notrace since we're here and failure to do so would cause ftrace to break. Cc: Russell King <linux@arm.linux.org.uk> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org> Signed-off-by: NKevin Hilman <khilman@linaro.org>
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- 07 11月, 2013 1 次提交
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由 Tushar Behera 提交于
Commit 6dedcca6 ("hotplug, powerpc, x86: Remove cpu_hotplug_driver_lock())" removes the the definition of cpu_hotplug_driver_{lock,unlock} APIs, thereby causing a build error. Replace these calls with {lock,unlock}_device_hotplug(). Signed-off-by: NTushar Behera <tushar.behera@linaro.org> Signed-off-by: NNicolas Pitre <nico@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 30 10月, 2013 1 次提交
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由 Vinod Koul 提交于
edma header defines DMA_COMPLETE, this causes issues as commit adfedd9a move DMA_SUCCESS to DMA_COMPLETE. edma should properly namespace its defines and needs a future fix Reported-by: NOlof Johansson <olof@lixom.net> Signed-off-by: NVinod Koul <vinod.koul@intel.com>
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