1. 20 12月, 2007 6 次提交
  2. 11 12月, 2007 5 次提交
  3. 03 10月, 2007 1 次提交
  4. 10 8月, 2007 1 次提交
  5. 12 7月, 2007 2 次提交
    • A
      PCI: read revision ID by default · b8a3a521
      Auke Kok 提交于
      Currently there are 97 occurrences where drivers need the pci
      revision ID. We can do this once for all devices. Even the pci
      subsystem needs the revision several times for quirks. The extra
      u8 member pads out nicely in the pci_dev struct.
      Signed-off-by: NAuke Kok <auke-jan.h.kok@intel.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      
      b8a3a521
    • M
      PCI: Make pcibios_add_platform_entries() return errors · a2cd52ca
      Michael Ellerman 提交于
      Currently pcibios_add_platform_entries() returns void, but could fail,
      so instead have it return an int and propagate errors up to
      pci_create_sysfs_dev_files().
      
      Fixes:
      arch/powerpc/kernel/pci_64.c: In function 'pcibios_add_platform_entries':
      arch/powerpc/kernel/pci_64.c:878: warning: ignoring return value of
      	'device_create_file', declared with attribute warn_unused_result
      arch/powerpc/kernel/pci_32.c: In function 'pcibios_add_platform_entries':
        arch/powerpc/kernel/pci_32.c:1043: warning: ignoring return value of
      	'device_create_file', declared with attribute warn_unused_result
      Signed-off-by: NMichael Ellerman <michael@ellerman.id.au>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      
      a2cd52ca
  6. 03 7月, 2007 1 次提交
  7. 29 6月, 2007 3 次提交
  8. 28 6月, 2007 1 次提交
  9. 14 6月, 2007 1 次提交
    • B
      [POWERPC] Rewrite IO allocation & mapping on powerpc64 · 3d5134ee
      Benjamin Herrenschmidt 提交于
      This rewrites pretty much from scratch the handling of MMIO and PIO
      space allocations on powerpc64.  The main goals are:
      
       - Get rid of imalloc and use more common code where possible
       - Simplify the current mess so that PIO space is allocated and
         mapped in a single place for PCI bridges
       - Handle allocation constraints of PIO for all bridges including
         hot plugged ones within the 2GB space reserved for IO ports,
         so that devices on hotplugged busses will now work with drivers
         that assume IO ports fit in an int.
       - Cleanup and separate tracking of the ISA space in the reserved
         low 64K of IO space. No ISA -> Nothing mapped there.
      
      I booted a cell blade with IDE on PIO and MMIO and a dual G5 so
      far, that's it :-)
      
      With this patch, all allocations are done using the code in
      mm/vmalloc.c, though we use the low level __get_vm_area with
      explicit start/stop constraints in order to manage separate
      areas for vmalloc/vmap, ioremap, and PCI IOs.
      
      This greatly simplifies a lot of things, as you can see in the
      diffstat of that patch :-)
      
      A new pair of functions pcibios_map/unmap_io_space() now replace
      all of the previous code that used to manipulate PCI IOs space.
      The allocation is done at mapping time, which is now called from
      scan_phb's, just before the devices are probed (instead of after,
      which is by itself a bug fix). The only other caller is the PCI
      hotplug code for hot adding PCI-PCI bridges (slots).
      
      imalloc is gone, as is the "sub-allocation" thing, but I do beleive
      that hotplug should still work in the sense that the space allocation
      is always done by the PHB, but if you unmap a child bus of this PHB
      (which seems to be possible), then the code should properly tear
      down all the HPTE mappings for that area of the PHB allocated IO space.
      
      I now always reserve the first 64K of IO space for the bridge with
      the ISA bus on it. I have moved the code for tracking ISA in a separate
      file which should also make it smarter if we ever are capable of
      hot unplugging or re-plugging an ISA bridge.
      
      This should have a side effect on platforms like powermac where VGA IOs
      will no longer work. This is done on purpose though as they would have
      worked semi-randomly before. The idea at this point is to isolate drivers
      that might need to access those and fix them by providing a proper
      function to obtain an offset to the legacy IOs of a given bus.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      3d5134ee
  10. 17 5月, 2007 1 次提交
  11. 10 5月, 2007 1 次提交
    • P
      [POWERPC] Fix incorrect calculation of I/O window addresses · 31e92e0a
      Paul Mackerras 提交于
      My patch "Cope with PCI host bridge I/O window not starting at 0"
      introduced a bug in the calculation of the virtual addresses for the
      I/O windows of PCI host bridges other than the first, because it
      didn't account for the fact that hose->io_resource gets offset so that
      it reflects the range of global I/O port numbers assigned to the
      bridge.  This fixes it and simplifies get_bus_io_range() in the
      process.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      31e92e0a
  12. 08 5月, 2007 1 次提交
    • P
      [POWERPC] Cope with PCI host bridge I/O window not starting at 0 · 11fbb00c
      Paul Mackerras 提交于
      Currently our code to set up the data structures for a PCI host bridge
      and create the mapping for its I/O window assumes that the window
      starts at I/O port 0 on the PCI side.  If this is not true, we can end
      up with I/O port numbers in the resources for PCI devices which will
      cause an oops if a driver tries to access them via inb/outb etc.,
      because there is no mapping for the corresponding addresses.
      
      Normally the I/O window starts at 0, but there are some situations on
      partitioned machines with a hypervisor where the window may not start
      at 0.
      
      This fixes the problem by allocating space for the range from 0 to the
      end of the I/O window.  That is, hose->io_base_virt contains the
      virtual address for I/O port 0 on the PCI bus, and thus the assumption
      that hose->io_base_virt - pci_io_base is the offset between the
      "global" I/O port numbers (those in the PCI device resources) and the
      I/O port numbers on the PCI bus is maintained.
      
      For PCI host bridges that are present at boot, we only map the portion
      of that range that correspond to the bridge's I/O window.  For bridges
      added after boot we ioremap the range from 0 to the end of the I/O
      window, for now; in fact hot-added bridges should be using
      reserve_phb_iospace() and __ioremap_explicit (so they get sensible
      global port numbers), but we don't have the infrastructure yet to do
      that (basically a free_phb_iospace() routine plus appropriate
      locking).
      
      Interestingly, this makes the two arms of the if statement in
      get_bus_io_range do almost exactly the same thing; that function could
      now be simplified in a further patch.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      11fbb00c
  13. 03 5月, 2007 1 次提交
  14. 13 4月, 2007 2 次提交
  15. 09 3月, 2007 2 次提交
  16. 08 2月, 2007 1 次提交
  17. 28 1月, 2007 1 次提交
  18. 24 1月, 2007 1 次提交
  19. 20 12月, 2006 1 次提交
  20. 08 12月, 2006 1 次提交
    • B
      [POWERPC] Fix mmap of PCI resource with hack for X · 396a1a58
      Benjamin Herrenschmidt 提交于
      The powerpc version of pci_resource_to_user() and associated hooks
      used by /proc/bus/pci and /sys/bus/pci mmap have been broken for some
      time on machines that don't have a 1:1 mapping of devices (basically
      on non-PowerMacs) and have PCI devices above 32 bits.
      
      This attempts to fix it as well as possible.
      
      The rule is supposed to be that pci_resource_to_user() always converts
      the resources back into a BAR values since that's what the /proc
      interface was supposed to deal with. However, for X to work on
      platforms where PCI MMIO is not mapped 1:1, it became a habit of
      platforms like powerpc to pass "fixed up" values there since X expects
      to be able to use values from /proc/bus/pci/devices as offsets to mmap
      of /dev/mem...
      
      So we keep that contraption here, causing also /sys/*/resource to
      expose fully absolute MMIO addresses instead of BAR values, which is
      ugly, but should still work as long as those are only used to calculate
      alignment within a page.
      
      X is still broken when built 32 bits on machines where PCI MMIO can be
      above 32-bit space unfortunately.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      396a1a58
  21. 04 12月, 2006 6 次提交
    • Y
      [POWERPC] Replace kmalloc+memset with kzalloc · f8485350
      Yan Burman 提交于
      Replace kmalloc+memset with kzalloc.
      Signed-off-by: NYan Burman <burman.yan@gmail.com>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      f8485350
    • B
      [POWERPC] Allow hooking of PCI MMIO & PIO accessors on 64 bits · 4cb3cee0
      Benjamin Herrenschmidt 提交于
      This patch reworks the way iSeries hooks on PCI IO operations (both MMIO
      and PIO) and provides a generic way for other platforms to do so (we
      have need to do that for various other platforms).
      
      While reworking the IO ops, I ended up doing some spring cleaning in
      io.h and eeh.h which I might want to split into 2 or 3 patches (among
      others, eeh.h had a lot of useless stuff in it).
      
      A side effect is that EEH for PIO should work now (it used to pass IO
      ports down to the eeh address check functions which is bogus).
      
      Also, new are MMIO "repeat" ops, which other archs like ARM already had,
      and that we have too now: readsb, readsw, readsl, writesb, writesw,
      writesl.
      
      In the long run, I might also make EEH use the hooks instead
      of wrapping at the toplevel, which would make things even cleaner and
      relegate EEH completely in platforms/iseries, but we have to measure the
      performance impact there (though it's really only on MMIO reads)
      
      Since I also need to hook on ioremap, I shuffled the functions a bit
      there. I introduced ioremap_flags() to use by drivers who want to pass
      explicit flags to ioremap (and it can be hooked). The old __ioremap() is
      still there as a low level and cannot be hooked, thus drivers who use it
      should migrate unless they know they want the low level version.
      
      The patch "arch provides generic iomap missing accessors" (should be
      number 4 in this series) is a pre-requisite to provide full iomap
      API support with this patch.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      4cb3cee0
    • B
      [POWERPC] Generic OF platform driver for PCI host bridges. · 4c9d2800
      Benjamin Herrenschmidt 提交于
      When enabled in Kconfig, it will pick up any of_platform_device
      matching it's match list (currently type "pci", "pcix", "pcie",
      or "ht" and setup a PHB for it.
      
      Platform must provide a ppc_md.pci_setup_phb() for it to work
      (for doing the necessary initialisations specific to a given PHB
      like setting up the config space ops).
      
      It's currently only available on 64 bits as the 32 bits PCI code
      can't quite cope with it in it's current form. I will fix that
      later.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      4c9d2800
    • B
      [POWERPC] Add "parent" struct device for PCI host bridges · 803d4573
      Benjamin Herrenschmidt 提交于
      Add a "parent" struct device to our PCI host bridge data structure so that
      PCI can be rooted off another device in sysfs.
      
      Note that arch/ppc doesn't use it, only arch/powerpc, though it's available
      for both 32 and 64 bits.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      803d4573
    • B
      [POWERPC] Resolve the parent address of a PCI bus range · e557a1c9
      Benjamin Herrenschmidt 提交于
      When parsing the OF "ranges" properties of PCI host busses to determine
      the mapping of a PCI bus, we need to translate the "parent" address using
      the prom_parse.c routines in order to obtain a CPU physical address.
      
      This wasn't necessary while PCI busses were always at the root of the
      device-tree but this is no longer the case on Cell where they can be
      anywhere in the tree.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      e557a1c9
    • B
      [POWERPC] Refactor 64 bits DMA operations · 12d04eef
      Benjamin Herrenschmidt 提交于
      This patch completely refactors DMA operations for 64 bits powerpc. 32 bits
      is untouched for now.
      
      We use the new dev_archdata structure to add the dma operations pointer
      and associated data to struct device. While at it, we also add the OF node
      pointer and numa node. In the future, we might want to look into merging
      that with pci_dn as well.
      
      The old vio, pci-iommu and pci-direct DMA ops are gone. They are now replaced
      by a set of generic iommu and direct DMA ops (non PCI specific) that can be
      used by bus types. The toplevel implementation is now inline.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      12d04eef