The functions that write the OOB info (on hardware ECC only) use the 
HW_SYNDROME method.

This is not correct : the start position is "pos = eccsize + chunk" and 
should be eccsize. So, the standard (nand_write_oob_std) function should 
be used. This patch corrects this by using NAND_ECC_HW instead of 
NAND_ECC_HW_SYNDROME.

This has only been tested on small pages nand flash.
(if anyone can test it on large pages that would be great).

kernel version : 2.6.27-rc2 (current git mtd-2.6)
Signed-off-by: NRichard Genoud <richard.genoud@gmail.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Include missing parts of previous patch.
Signed-off-by: NChen Gong <g.chen@freescale.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Signed-off-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Removed the Kconfig associated with 'NDFC NanD Flash Controller'.
We can't enable !CONFIG_PPC_MERGE so there is no way to enable
this.  Additionally the code needs to get updated for arch/powerpc.

For the time being lets just remove the Kconfig option so we can
actually remove CONFIG_PPC_MERGE.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This patch extends the FSL UPM NAND driver from Anton Vorontsov to
support hardware which does not have the R/B pin of the NAND chip
connected, like the TQM8548 module:

- The OF_GPIO dependency has been removed from the Kconfig option
  because GPIO is not needed. The relevant gpio_* function are then
  stubbed out in <linux/gpio.h>.

- It re-introduces the chip-delay property to define an appropriate
  maximum delay time (tR) required for read operations. The binding
  will be documented in a separate patch.
Signed-off-by: NWolfgang Grandegger <wg@grandegger.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

- Get rid of fsl,wait-pattern and fsl,wait-write. I think this isn't
  chip-specific, and we should always do waits. I saw one board that
  didn't need fsl,wait-pattern, but I assume this was the exception
  that proves the rule;
- Get rid of chip-delay. Today there are no users for this, and if
  anyone really need this they should push the OF bindings beforehand;
- Now flash chips should be child nodes of the FSL UPM NAND controller;
- Implement OF partition parsing.
Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

When iterating over a chain in reverse (oldest block first), this
patch correctly marks the PUtable[] entry of the second to last erase
block of a chain as BLOCK_NIL, regardless of whether or not it can
format the last block successfully. Before, the second to last block
was only marked as pointing to BLOCK_NIL if INFTL_formatblock()
succeeded on the last block of the chain, which could potentially
result in an infinite loop if the block was worn out and refused to
format.
Signed-off-by: NDaniel Rosenthal <danielrosenthal@acm.org>
Acked-by: NGreg Ungerer <gerg@snapgear.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

...since it only probes that
Signed-off-by: NMike Frysinger <vapier.adi@gmail.com>
Signed-off-by: NBryan Wu <cooloney@kernel.org>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Now that the needed helpers are exported, it becomes a nice simple 
switch over. Closes #9420
Signed-off-by: NAlan Cox <alan@redhat.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

The patch fixes CFI issue with multipartitional devices leading to the 
set of errors or even deadlock. The problem is CFI FL_SYNCING state race 
with flash operations (e.g. erase suspend). It is reproduced by running 
intensive writes on one JFFS2 partition and simultaneously performing 
mount/unmount cycle on another partition of the same chip.
Signed-off-by: NAlexander Belyakov <abelyako@googlemail.com>
Acked-by: NNicolas Pitre <nico@cam.org>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Some chips require a RESET after power-up (e.g. Micron MT29FxGxxxxx).
The first command sent is NAND_CMD_READID.
Issue a NAND_CMD_RESET in nand_scan_ident before reading the device id.
Tested with an MT29F4G08AAC.
Signed-off-by: NKarl Beldan <karl.beldan@gmail.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Very occasionally, (about one in a million) read operations are
ongoing after the timeout has expired.  So, retry three times
while the ongoing bit remains set.
Signed-off-by: NAdrian Hunter <ext-adrian.hunter@nokia.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This patch adds support for the integrated NAND flash controller of the
i.MX2 and i.MX3 family. It is tested on MX27 but should work on MX3
aswell.
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
Acked-by: NJuergen Beisert <j.beisert@pengutronix.de>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Minor patch to help debugging of NAND detection.
Signed-off-by: NEnrico Scholz <enrico.scholz@sigma-chemnitz.de>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This patch moves some attributes out from the platform data into the
dynamically created nand device.   This results into a cleaner interface
and allows to use constant pxa3xx_nand_flash definitions.
Signed-off-by: NEnrico Scholz <enrico.scholz@sigma-chemnitz.de>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This patch marks some attributes as 'const' which are set only once and
never be modified by the driver.  There are some changes in parameter
list and variable declarations too which mark them as 'const'.
Signed-off-by: NEnrico Scholz <enrico.scholz@sigma-chemnitz.de>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This patch adds a MTD_NAND_PXA3xx_BUILTIN configuration variables which
allows to disable usage of builtin flash-type table.  Not enabling this
option saves some space in the generated driver.
Signed-off-by: NEnrico Scholz <enrico.scholz@sigma-chemnitz.de>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This patch adds 'flash' and 'num_flash' attributes to the platform data.
There was added code in the driver to iterate across these attributes in the
detect-flash routine.  This is done similarly to the existing method
which uses a 'builtin_flash_types' field.
Signed-off-by: NEnrico Scholz <enrico.scholz@sigma-chemnitz.de>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This patch moves the exported datastructures from the pxa3xx_nand.c driver
into the <mach/pxa3xx_nand.h> header. This is a plain movement without
any modification of the attributes.

This is the first one of a set of patches which:

 * allows to specify used NAND flash in the platform code and allows to turn
   off the old way to specify NAND characteristics in the driver.  This way did
   not worked well as these characteristics depend on the platform and can not be
   derived from NAND id alone.

   E.g.  some NAND chips share the same ID (e.g.  K9K8G08U0A and K9NBG08U5A) but
   have different timings (which are written in the common driver currently and
   must be modified there).

 * adds 'const' annotations at various places

Further patches will be sent to the mtd-list.
Signed-off-by: NEnrico Scholz <enrico.scholz@sigma-chemnitz.de>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

It requires cfi_qry_mode_on(), which is in cfi_util.c

Reported by Russell King
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Signed-off-by: NSemun Lee <semun.lee@samsung.com>
Acked-by: NEric Miao <eric.miao@marvell.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Support 512 byte ECC calculation

[FM: updated two comments]
Signed-off-by: NVimal Singh <vimalsingh@ti.com>
Signed-off-by: NFrans Meulenbroeks <fransmeulenbroeks@gmail.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

It doesn't use LINUX_VERSION_CODE nor KERNEL_VERSION.

This patch removes the said #include <version.h>.
Signed-off-by: NHuang Weiyi <weiyi.huang@gmail.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This patch lets the files using linux/version.h match the files that
#include it.
Signed-off-by: NAdrian Bunk <bunk@kernel.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

[Reported by Randy Dunlap]
Signed-off-by: NAlexey Korolev <akorolev@infradead.org>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This patch for nand_ecc.c fixes three issues

- fix code so it also works on big endian architectures
- added a printk in case of an uncorrectable ecc error
- strengthen the test for correctable errors (decreasing the chance
  that multiple bit faults by accident will be seen as correctable)

Note: the big endian code is only tested in a testbed (running on big endian
hardware) as I cannot rebuild and test a big endian kernel at the moment.
However the only thing that can go wrong is if <asm/byteorder.h> does not
give __BIG_ENDIAN in that case. In my eyes very unlikely.
Signed-off-by: NFrans Meulenbroeks <fransmeulenbroeks@gmail.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

The drivers below do not use LINUX_VERSION_CODE nor KERNEL_VERSION.
  drivers/mtd/maps/amd76xrom.c
  drivers/mtd/maps/ck804xrom.c
  drivers/mtd/maps/esb2rom.c

This patch removes the said #include <version.h>.
Signed-off-by: NHuang Weiyi <weiyi.huang@gmail.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Make the standalone stuff a little cleaner, fix some checkpatch warnings.
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This patch improves the performance of the ecc generation code by a 
factor of 18 on an INTEL D920 CPU, a factor of 7 on MIPS and a factor of 5 
on ARM (NSLU2)
Signed-off-by: NFrans Meulenbroeks <fransmeulenbroeks@gmail.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

On OMAP3, the driver was occasionally not seeing the GPIO
interrupt.  Adding a small delay of one register read
eliminates the problem.
Signed-off-by: NAdrian Hunter <ext-adrian.hunter@nokia.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This driver had resided in the OMAP tree but is now to be in MTD.

Original authors were:
	Jarkko Lavinen <jarkko.lavinen@nokia.com> and Juha Yrjölä
	IRQ and DMA support written by Timo Teras
Signed-off-by: NAdrian Hunter <ext-adrian.hunter@nokia.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Signed-off-by: NAdrian Hunter <ext-adrian.hunter@nokia.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

- add extended device information support
- add s25sl128 device support
Signed-off-by: NChen Gong <g.chen@freescale.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

code cleanup for m25p80.c
Signed-off-by: NChen Gong <g.chen@freescale.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This patch adds an erase_block command to enhance erase operation
Signed-off-by: NChen Gong <g.chen@freescale.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Removed duplicated include <asm/div64.h> in
drivers/mtd/nand/nandsim.c.
Signed-off-by: NHuang Weiyi <weiyi.huang@gmail.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

The TMIO chips are only found (and thus tested) on ARM machines.
Moreover, we don't want the TMIO cells to be built if one of the TMIO
driver is not selected (which indirectly make the TMIO cells drivers
depend on ARM as well).
Signed-off-by: NSamuel Ortiz <sameo@openedhand.com>

This patch adds support for the NAND controller commonly found in
TMIO based MFDs.
Signed-off-by: NIan Molton <spyro@f2s.com>
Acked-By: NDavid Woodhouse <David.Woodhouse@intel.com>
Signed-off-by: NSamuel Ortiz <sameo@openedhand.com>

This patch performs the equivalent include directory shuffle for
plat-orion, and fixes up all users.
Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>