The bitfield allocation function returns error condition
as a negative value, but in two cases its result
was assigned to an unsigned member of the hw_perf_event
structure, thus the error would not be ever detected.

Fixed by using an intermediate, signed variable.
Reported-by: NDan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: NPawel Moll <pawel.moll@arm.com>
Signed-off-by: NOlof Johansson <olof@lixom.net>

Merge tag 'omap-for-v3.17/mailbox-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/drivers

Merge "late omap mailbox clean-up, driver parts" from Tony Lindgren:

Driver specific omap mailbox cleanup. Mostly to remove
broken legacy code for omap1 and move things towards
device tree.

These patches were posted a while back, but I did not
realize I was supposed to merge the driver related
parts too. So apologies for a late pull request on
these changes.

* tag 'omap-for-v3.17/mailbox-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  mailbox/omap: add a parent structure for every IP instance
  mailbox/omap: remove the private mailbox structure
  mailbox/omap: consolidate OMAP mailbox driver
  mailbox/omap: simplify the fifo assignment by using macros
  mailbox/omap: remove omap_mbox_type_t from mailbox ops
  mailbox/omap: remove OMAP1 mailbox driver
  mailbox/omap: use devm_* interfaces
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

This is a dependency for the mailbox driver code and gets
merged through the soc branch

* branch 'omap-for-v3.17/mailbox':
  ARM: AM33xx: hwmod_data: Remove legacy mailbox addrs
  ARM: OMAP4: hwmod_data: Remove legacy mailbox addrs
  ARM: OMAP2: hwmod_data: Remove legacy mailbox data and addrs
  ARM: OMAP2+: Avoid mailbox legacy device creation for DT-boot
  ARM: DRA7: hwmod_data: Add mailbox hwmod data
  ARM: dts: DRA7: Add mailbox nodes
  ARM: dts: AM4372: Correct mailbox node data
  ARM: dts: AM33xx: Add mailbox node
  ARM: dts: OMAP4: Add mailbox node
  ARM: dts: OMAP2+: Add mailbox fifo and user information
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

A new structure, omap_mbox_device, is added to contain
the global variables pertinent to a mailbox h/w IP block.
This enables the support for having multiple instances of
the same h/w IP block in the SoC. This is in preparation
to support the DRA7 SoC, which is the first SoC in the OMAP
family to have multiple mailbox IP instances.

The changes include enhancements to the sub-mailbox registration
logic and mbox startup sequencing, removing the usage of single
global configuration variables for all h/w instances, and storing
the registered sub-mailboxes with the parent mailbox device
structure.
Signed-off-by: NSuman Anna <s-anna@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

The structure omap_mbox_priv is used previously to store arch
specific (OMAP1 vs OMAP2+) data, and is no longer required to be
maintained separately. Instead, absorb its elements into either
the sub-mailbox device structure, omap_mbox, or the individual
fifo descriptor structure, omap_mbox_fifo.

The newmsg_bit and notfull_bit used on Rx and Tx fifos respectively
are represented by the new intr_bit field in the fifo descriptor
structure. The interrupt configuration registers are also moved
into the fifo descriptor structure to allow the Rx and Tx fifos
to use different interrupt lines/users.
Signed-off-by: NSuman Anna <s-anna@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

There is no need for a separate common OMAP mailbox module
now that the OMAP1 mailbox driver has been removed. So,
consolidate the two individual OMAP mailbox modules into a
single driver. This streamlines the driver for converting
to mailbox framework.

The following are the main changes:
- collapse mailbox-omap2.c into omap-mailbox.c
- remove omap_mbox_ops and replace the ops calls with
  the equivalent functionality.
- simplify the sub-mailbox startup/shutdown functionality,
  the one-time operations are moved into probe, and the
  pm_runtime_get_sync and pm_runtime_put_sync can be invoked
  without using a configuration counter.
- move all definitions from private omap_mbox.h into the
  source code, and eliminate this internal header.
- rename some variables that used the omap2_mbox prefix with
  a generic omap_mbox prefix.
Signed-off-by: NSuman Anna <s-anna@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

The OMAP mailbox IP has two different type of interrupt configuration
registers between OMAP4+ SoCs and OMAP2/3 SoCs. Simplify the current
interrupt configuration by using a single macro that translates the
two variants.
Signed-off-by: NSuman Anna <s-anna@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

The type definition omap_mbox_type_t used for distinguishing
OMAP1 from OMAP2+ mailboxes is no longer needed after the
removal of OMAP1 mailbox driver, and has therefore been
cleaned up. This cleanup also eliminates the need for the
polling logic used for checking the transmit readiness.
Signed-off-by: NSuman Anna <s-anna@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

There are no existing users for OMAP1 mailbox driver
in kernel. Commit ab6f7751 "Removing dead OMAP_DSP"
has cleaned up all the dead code related to the only
possible user, including the creation of the mailbox
platform device.

Remove this stale driver so that the OMAP mailbox
driver can be simplified and streamlined better for
converting to mailbox framework.
Signed-off-by: NSuman Anna <s-anna@ti.com>
Acked-by: NAaro Koskinen <aaro.koskinen@iki.fi>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Use the various devm_ interfaces to simplify the cleanup in
probe and remove functions in OMAP2+ mailbox driver.
Signed-off-by: NSuman Anna <s-anna@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

The CCN driver makes no sense without PERF_EVENTS, and trying to
build it when that option is disabled results in compile errors,
so it's best to just add a strong Kconfig dependency.
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

Driver providing perf backend for ARM Cache Coherent Network
interconnect. Supports counting all hardware events and crosspoint
watchpoints.

Currently works with CCN-504 only, although there should be
no changes required for CCN-508 (just impossible to test it now).
Signed-off-by: NPawel Moll <pawel.moll@arm.com>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

Following compilation warning occurs when compiled with:
CONFIG_DEBUG_SECTION_MISMATCH=y

 WARNING: vmlinux.o(.init.data+0x3338): Section mismatch in reference from the
 variable spear13xx_pcie_driver to the function
 .exit.text:spear13xx_pcie_remove()

This driver isn't allowed to unload, and so doesn't have a *_exit() routine. But
it still has spear13xx_pcie_remove() marked with __exit.

As this driver can't unload, .remove() would never be called, right? So get rid
of it.

Fixes: 51b66a6c (PCI: spear: Add PCIe driver for ST Microelectronics SPEAr13xx)
Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: NOlof Johansson <olof@lixom.net>

Following compilation warning occurs when compiled with:
CONFIG_DEBUG_SECTION_MISMATCH=y

 WARNING: drivers/pci/host/built-in.o(.data+0xc0): Section mismatch in
 reference from the variable spear13xx_pcie_driver to the function
 .init.text:spear13xx_pcie_probe()

Both .probe() and pcie_init() are marked with __init, but spear13xx_pcie_driver
isn't. And so section mismatch.

Fix it by marking spear13xx_pcie_driver with __initdata.

Fixes: 51b66a6c (PCI: spear: Add PCIe driver for ST Microelectronics SPEAr13xx)
Reported-by: NOlof Johansson <olof@lixom.net>
Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: NOlof Johansson <olof@lixom.net>

Merge tag 'tegra-for-3.17-pcie-regulators' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers

Merge "ARM: tegra: rework PCIe regulators" from Thierry Reding:

This branch reworks the set of regulators that the Tegra PCIe driver
uses, so that the driver and DT bindings more correctly model what's
really going on in HW. For backwards-compatibility the driver will
fallback to using the old set of regulators if the new ones can't be
found.

I've made this a separate branch in case it needs to be pulled into the
PCIe tree to resolve any conflicts.

* tag 'tegra-for-3.17-pcie-regulators' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  ARM: tegra: Remove legacy PCIe power supply properties
  PCI: tegra: Remove deprecated power supply properties
  PCI: tegra: Implement accurate power supply scheme
  ARM: tegra: Add new PCIe regulator properties
  PCI: tegra: Overhaul regulator usage
Signed-off-by: NOlof Johansson <olof@lixom.net>

Merge branch 'spear/pcie-support-v10' of git://git.kernel.org/pub/scm/linux/kernel/git/vireshk/linux into next/drivers

Merge "ARM: SPEAr13xx PCIe updates for v3.17" from Viresh Kumar:

This is another attempt to merge SPEAr PCIe updates after olof
pointed out *enough* issues with initial PULL request:

https://lkml.org/lkml/2014/7/9/641

Last version was sent here: http://patchwork.ozlabs.org/patch/368479/
and all the nits pointed out by Kishon & Bjorn are fixed in this pull
request.

Apart from ARM specific changes, this updates drivers/{pci|phy}. Bjorn
advised to get complete series via arm-soc tree earlier:

http://www.spinics.net/lists/linux-pci/msg30271.html

* 'spear/pcie-support-v10' of git://git.kernel.org/pub/scm/linux/kernel/git/vireshk/linux:
  ARM: SPEAr13xx: Update defconfigs
  ARM: SPEAr13xx: Add pcie and miphy DT nodes
  ARM: SPEAr13xx: Add bindings and dt node for misc block
  ARM: SPEAr13xx: Fix static mapping table
  phy: Add drivers for PCIe and SATA phy on SPEAr13xx
  PCI: spear: Add PCIe driver for ST Microelectronics SPEAr13xx
Signed-off-by: NOlof Johansson <olof@lixom.net>

These properties are deprecated and no longer of any use.
Signed-off-by: NThierry Reding <treding@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

These power supply properties are no longer needed since the binding now
contains the full set properties to accurately describe the power supply
inputs of the Tegra PCIe block.
Signed-off-by: NThierry Reding <treding@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

The current description of power supplies doesn't match the hardware.
Instead it's designed to support the needs of current designs, which
will break as soon as a new design appears that cannot be described
using the current assumptions.

In order to fully support all possible future designs, all power supply
inputs to the PCIe block need to be accurately described and separately
configurable.
Acked-by: NBjorn Helgaas <bhelgaas@google.com>
Signed-off-by: NThierry Reding <treding@nvidia.com>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

The legacy-style definition of the hwmod addr space is no longer
required as AM33xx/AM43xx are DT-boot only, and the minimal mailbox
DT nodes have been added, so clean up this data.
Acked-by: NPaul Walmsley <paul@pwsan.com>
Signed-off-by: NSuman Anna <s-anna@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

The legacy-style definition of the hwmod addr space is no longer
required after the addition of the OMAP4 mailbox DT node, so
clean up this data.

Cc: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <bcousson@baylibre.com>
Signed-off-by: NSuman Anna <s-anna@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

OMAP2 devices are devicetree boot only, and the legacy mode
of mailbox device creation should no longer be used, so remove
the mailbox attribute data and the hwmod addr space used for
creating mailboxes in legacy mode.
Acked-by: NPaul Walmsley <paul@pwsan.com>
Signed-off-by: NSuman Anna <s-anna@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

The legacy platform device for mailbox should not be created for
a DT boot, so adjust the platform device initialization logic
appropriately.
Signed-off-by: NSuman Anna <s-anna@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Add the hwmod data for the 13 instances of the system mailbox
IP in DRA7 SoC. The patch is needed for performing a soft-reset
while configuring the respective mailbox instance, otherwise is
a non-essential change for functionality. The modules are smart
idled on reset, and the IP module mode is hardware controlled.

Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: NSuman Anna <s-anna@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

DRA7xx has 13 system mailboxes, and is present on both the
DRA72x and DRA74x family of SoCs. Add the DT nodes for all
these 13 mailboxes. Except for mailbox 1, all other mailboxes
do not have interrupts mapped into the MPU GIC by default.

All the mailboxes have been disabled and the interrupts
property information is left out intentionally for now,
because of the dependencies against the crossbar driver.
These mailboxes can be enabled when a usecase arises
and the crossbar driver dependencies are met.

NOTE: The mailbox 1 has different number of mailbox fifos
and IP interrupts compared to the remaining 12 mailboxes.
Signed-off-by: NSuman Anna <s-anna@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

The mailbox DT node for AM4372 is enabled and is corrected to
remove some properties that have crept in by mistake.

Fixes: 9e3269b8 (ARM: dts: AM4372: Add L2, EDMA, mailbox, MMC and SHAM nodes)
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: NSuman Anna <s-anna@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

The mailbox DT node data has been added for AM33xx device.
The mailbox IP in AM33xx is similar to the version found in
OMAP4+ devices.
Signed-off-by: NSuman Anna <s-anna@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

The mailbox DT node data has been added for OMAP44xx
devices.
Signed-off-by: NSuman Anna <s-anna@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

The number of mailbox fifos and users (IP interrupts) are added
to the Mailbox DT nodes on OMAP2420, OMAP2430, OMAP3, and OMAP5
family of SoCs through the DT properties "ti,mbox-num-fifos" and
"ti,mbox-num-users" properties. This data represents the same data
that used to be represented in hwmod attribute data through the
.num_fifos and .num_users fields previously.
Signed-off-by: NSuman Anna <s-anna@ti.com>
Acked-by: NPavel Machek <pavel@ucw.cz>
Signed-off-by: NTony Lindgren <tony@atomide.com>

Enable PCIe, EABI, VFP and NFS configs in default configuration file for
SPEAr13xx.
Acked-by: NViresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: NMohit Kumar <mohit.kumar@st.com>
[viresh: fixed logs/cclist]
Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org>

This patch adds necessary DT nodes for pcie controllers and miphys for SPEAr13xx
SoCs.

SPEAr1310 has 3 PCIe ports and SPEAr1340 has 1, which are multiplexed with
ahci/sata pins. By default evaluation board of both controller works in ahci
mode. Because of this, these nodes are marked "disabled" by default.

In order to use pcie controller on evaluation boards do necessary modifications
on board and enable (By replacing "disabled" with "okay") pcie and miphy from
respective 'evb' dtsi file.

Phy specific initialization was previously done from spear1340.c, which isn't
required anymore as we have separate drivers for it. Remove it.
Acked-by: NArnd Bergmann <arnd@arndb.de>
Acked-by: NViresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: NPratyush Anand <pratyush.anand@st.com>
Signed-off-by: NMohit Kumar <mohit.kumar@st.com>
[viresh: fixed logs/cclist/checkpatch warnings, clubbed multiple patches into one]
Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org>

SPEAr SOCs have some miscellaneous registers which are used to configure
peripheral.

This patch adds dt node and binding information for this block.
Acked-by: NArnd Bergmann <arnd@arndb.de>
Signed-off-by: NPratyush Anand <pratyush.anand@st.com>
Cc: devicetree@vger.kernel.org
[viresh: fixed logs/cclist]
Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org>

SPEAr13xx was using virtual address space 0xFE000000 to map physical address
space 0xB3000000. But pci_remap_io uses 0xFEE00000 as virtual address and so
replace 0xFE000000 with 0xF9000000.
Acked-by: NViresh Kumar <viresh.kumar@linaro.org>
Acked-by: NArnd Bergmann <arnd@arndb.de>
Signed-off-by: NPratyush Anand <pratyush.anand@st.com>
Signed-off-by: NMohit Kumar <mohit.kumar@st.com>
[viresh: fixed logs/cclist]
Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org>

ARM based ST Microelectronics's SPEAr1310/40 platforms uses ST's phy (known as
'miphy') for PCIe and SATA. This patch adds drivers for these miphys.

This also adds proper bindings for miphys.
Acked-by: NArnd Bergmann <arnd@arndb.de>
Signed-off-by: NPratyush Anand <pratyush.anand@st.com>
Tested-by: NMohit Kumar <mohit.kumar@st.com>
Cc: Kishon Vijay Abraham I <kishon@ti.com>
[viresh: fixed logs/cclist/checkpatch warnings, broken into smaller patches]
Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org>

ARM based ST Microelectronics's SPEAr1310 and SPEAr1340 SOCs have onchip
designware PCIe controller. To make that usable, this patch adds a wrapper
driver based on existing designware driver.

Adds bindings for this new driver and update MAINTAINERS as well.

Cc: linux-pci@vger.kernel.org
Acked-by: NArnd Bergmann <arnd@arndb.de>
Acked-by: NBjorn Helgaas <bhelgaas@google.com>
Acked-by: NJingoo Han <jg1.han@samsung.com>
Signed-off-by: NPratyush Anand <pratyush.anand@st.com>
Signed-off-by: NMohit Kumar <mohit.kumar@st.com>
[viresh: fixed logs/cclist/checkpatch warnings, broken into smaller patches]
Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org>

Merge "at91: drivers for 3.17 #1" from Nicolas Ferre:

"This update delayed to 3.17, is about replacing the existing calls to the
older, non-standard drivers by the use of the newer "pwm-atmel" which takes
advantage of the PWM framework.
All concerned maintainer gave their acknowledgement to the relevant patches.
At the end, it removes three obsolete drivers and the diffstat looks pretty
nice as well."

Atmel PWM driver update for 3.17
- move to the new PWM driver which uses PWM framework
- remove 3 obsolete drivers (atmel-pwm-bl.c, leds-atmel-pwm.c and atmel_pwm.c)

* tag 'at91-drivers' of git://github.com/at91linux/linux-at91:
  misc: atmel_pwm: remove obsolete driver
  leds: atmel-pwm: remove obsolete driver
  backlight: atmel-pwm-bl: remove obsolete driver
  avr32: update defconfig to use the generic PWM framework
  avr32: favr-32: use generic pwm_bl driver
  avr32: merisc: use generic leds_pwm driver
  avr32: MRMT: use generic leds_pwm driver
  avr32/at32ap: switch to the generic PWM framework
  PWM: atmel: allow building for AVR32
  ARM: at91: remove useless at91_pwm_leds()
  ARM: at91: at91sam9rl: switch to generic PWM framework
  ARM: at91: sam9263ek: use generic leds_pwm driver
  ARM: at91: at91sam9263: switch to generic PWM framework
  ARM: at91: sam9m10g45ek: use generic leds_pwm driver
  ARM: at91: at91sam9g45: switch to generic PWM framework
Signed-off-by: NOlof Johansson <olof@lixom.net>

The misc/atmel_pwm is not used by any mainlined boards and has been replaced by
the pwm-driver using the generic PWM framework.
Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

The leds-atmel-pwm driver is now obsolete. It is not used by any mainlined
boards and is replaced by the generic leds_pwm with the pwm-atmel driver using
the generic PWM framework.
Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: NBryan Wu <cooloney@gmail.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

The atmel-pwm-bl driver is now obsolete. It is not used by any mainlined boards
and is replaced by the generic pwm_bl with the pawm-atmel driver using the
generic PWM framework.
Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: NHans-Christian Egtvedt <egtvedt@samfundet.no>
Acked-by: NJingoo Han <jg1.han@samsung.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

Now that all boards have switched to the generic PWM framework, update the
defconfigs to use it.
Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: NHans-Christian Egtvedt <egtvedt@samfundet.no>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>