- 27 2月, 2015 8 次提交
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由 Javier Martinez Canillas 提交于
Peach Pit and Pi boards have a WiFi module that is always powered but needs toggling an enable pin and ungating a 32kHz reference clock as part of their power sequencing. Add a dev node for the SDIO slot and a MMC power sequence provider. Signed-off-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: NKukjin Kim <kgene@kernel.org>
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由 Javier Martinez Canillas 提交于
The Exynos5420 SoC has 3 sets of 8 pads used as data lines for the 3 MMC/SD/SDIO slots. These needs to be muxed as SD_n_DATA instead of a GPIO or external interrupt to allow the MMC controller to communicate with the attached cards or SDIO devices. Which data lines needs to be muxed as SD_n_DATA depends on the bus width used for data transfer: * bus-width = <1> needs SD_n_DATA[0] * bus-width = <4> needs SD_n_DATA[0-3] * bus-width = <8> needs SD_n_DATA[0-7] The Exynos5250-pinctrl.dtsi file that defines the groups of pins has SD_n_DATA[0] muxed for both sdn_bus1 and sdn_bus4 so just one of them needs to be included in the device node's pinctrl property. But Exynos5420-pinctrl has a different definition and only includes SD_n_DATA[1-3] for sdn_bus4. So for a bus-width = <4>, both sdn_bus1 and sdn_bus4 have to be in the dev pinctrl to mux all the needed pads. It seems all Exynos5420 boards had just cargo cult the pinctrl lines assuming that sdn_bus4 also included SD_n_DATA[0] and it only works because the bootloader muxes the pads correctly. But that is not the case for the devices not used by the bootloader such as WiFi modules. Add sdn_bus1 too in the nodes pinctrl to not rely on the bootloader. Suggested-by: NDoug Anderson <dianders@chromium.org> Signed-off-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: NKukjin Kim <kgene@kernel.org>
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由 Marek Szyprowski 提交于
This patch adds reset-gpios property to the eMMC slot, so the MMC driver is able to properly reset eMMC card on system restart and thus fixes system hang on software reboot. Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: NKukjin Kim <kgene@kernel.org>
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由 Marek Szyprowski 提交于
This patch adds reset-gpios property to the eMMC slot, so the MMC driver is able to properly reset eMMC card on system restart and thus fixes system hang on software reboot. Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: NKukjin Kim <kgene@kernel.org>
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由 Ajay Kumar 提交于
Define videoports and use endpoints to describe the connection between the encoder, bridge and the panel, instead of using phandles. Signed-off-by: NAjay Kumar <ajaykumar.rs@samsung.com> Acked-by: NInki Dae <inki.dae@samsung.com> Tested-by: NRahul Sharma <rahul.sharma@samsung.com> Tested-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk> Tested-by: NGustavo Padovan <gustavo.padovan@collabora.co.uk> Tested-by: NSjoerd Simons <sjoerd.simons@collabora.co.uk> Signed-off-by: NKukjin Kim <kgene@kernel.org>
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由 Ajay Kumar 提交于
Define videoports and use endpoints to describe the connection between the encoder, bridge and the panel, instead of using phandles. Signed-off-by: NAjay Kumar <ajaykumar.rs@samsung.com> Acked-by: NInki Dae <inki.dae@samsung.com> Tested-by: NRahul Sharma <rahul.sharma@samsung.com> Tested-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk> Tested-by: NGustavo Padovan <gustavo.padovan@collabora.co.uk> Tested-by: NSjoerd Simons <sjoerd.simons@collabora.co.uk> Signed-off-by: NKukjin Kim <kgene@kernel.org>
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由 Javier Martinez Canillas 提交于
Enabling SDIO IRQ signalling for the wifi MMC/SDIO slot doubles the transmission transfer rate. Signed-off-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: NKukjin Kim <kgene@kernel.org>
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由 Javier Martinez Canillas 提交于
The Snow board has a MMC/SDIO wifi chip that is always powered but it needs a power sequence involving a reset (active low) and an enable (active high) pins. Both pins are marked as active low since the MMC simple power sequence driver asserts the pins prior to the card power up procedure and de-asserts the pins after the card has been powered. So the reset line will be left de-asserted and the enable pin will be left asserted. The chip also needs an external 32kHz reference clock to be operational that is by the MAX77686 PMIC clock. Add a simple MMC power sequence provider for the wifi MMC/SDIO slot. Signed-off-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: NKukjin Kim <kgene@kernel.org>
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- 23 2月, 2015 1 次提交
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由 David Howells 提交于
Convert the following where appropriate: (1) S_ISLNK(dentry->d_inode) to d_is_symlink(dentry). (2) S_ISREG(dentry->d_inode) to d_is_reg(dentry). (3) S_ISDIR(dentry->d_inode) to d_is_dir(dentry). This is actually more complicated than it appears as some calls should be converted to d_can_lookup() instead. The difference is whether the directory in question is a real dir with a ->lookup op or whether it's a fake dir with a ->d_automount op. In some circumstances, we can subsume checks for dentry->d_inode not being NULL into this, provided we the code isn't in a filesystem that expects d_inode to be NULL if the dirent really *is* negative (ie. if we're going to use d_inode() rather than d_backing_inode() to get the inode pointer). Note that the dentry type field may be set to something other than DCACHE_MISS_TYPE when d_inode is NULL in the case of unionmount, where the VFS manages the fall-through from a negative dentry to a lower layer. In such a case, the dentry type of the negative union dentry is set to the same as the type of the lower dentry. However, if you know d_inode is not NULL at the call site, then you can use the d_is_xxx() functions even in a filesystem. There is one further complication: a 0,0 chardev dentry may be labelled DCACHE_WHITEOUT_TYPE rather than DCACHE_SPECIAL_TYPE. Strictly, this was intended for special directory entry types that don't have attached inodes. The following perl+coccinelle script was used: use strict; my @callers; open($fd, 'git grep -l \'S_IS[A-Z].*->d_inode\' |') || die "Can't grep for S_ISDIR and co. callers"; @callers = <$fd>; close($fd); unless (@callers) { print "No matches\n"; exit(0); } my @cocci = ( '@@', 'expression E;', '@@', '', '- S_ISLNK(E->d_inode->i_mode)', '+ d_is_symlink(E)', '', '@@', 'expression E;', '@@', '', '- S_ISDIR(E->d_inode->i_mode)', '+ d_is_dir(E)', '', '@@', 'expression E;', '@@', '', '- S_ISREG(E->d_inode->i_mode)', '+ d_is_reg(E)' ); my $coccifile = "tmp.sp.cocci"; open($fd, ">$coccifile") || die $coccifile; print($fd "$_\n") || die $coccifile foreach (@cocci); close($fd); foreach my $file (@callers) { chomp $file; print "Processing ", $file, "\n"; system("spatch", "--sp-file", $coccifile, $file, "--in-place", "--no-show-diff") == 0 || die "spatch failed"; } [AV: overlayfs parts skipped] Signed-off-by: NDavid Howells <dhowells@redhat.com> Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk>
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- 21 2月, 2015 2 次提交
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由 Niklas Cassel 提交于
Commit e9de688d ("irqchip: mips-gic: Support local interrupts") updated several platforms. This is a copy paste error. Signed-off-by: NNiklas Cassel <niklass@axis.com> Reviewed-by: NAndrew Bresticker <abrestic@chromium.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/9245/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Andreas Ruprecht 提交于
In commit c441d4a5 ("MIPS: mm: Only build one microassembler that is suitable"), the Makefile at arch/mips/mm was rewritten to only build the "right" microassembler file, depending on whether CONFIG_CPU_MICROMIPS is set or not. In the files, however, there are still preprocessor definitions depending on CONFIG_CPU_MICROMIPS. The #ifdef around them can now never evaluate to true, so let's remove them altogether. This inconsistency was found using the undertaker-checkpatch tool. Signed-off-by: NAndreas Ruprecht <rupran@einserver.de> Reviewed-by: NMaciej W. Rozycki <macro@linux-mips.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: Valentin Rothberg <valentinrothberg@gmail.com> Cc: Paul Bolle <pebolle@tiscali.nl> Patchwork: https://patchwork.linux-mips.org/patch/9267/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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- 20 2月, 2015 29 次提交
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由 David Daney 提交于
- Use of_irq_init() to initialize interrupt controllers - Get rid of some unlikely() - Add CIB to support SATA and other interrupts - Add support for CIU SUM2 interrupt sources Signed-off-by: NDavid Daney <david.daney@cavium.com> Signed-off-by: NLeonid Rosenboim <lrosenboim@caviumnetworks.com> Signed-off-by: NAleksey Makarov <aleksey.makarov@auriga.com> Signed-off-by: NPeter Swain <peter.swain@cavium.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: Rob Herring <robh+dt@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8947/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 David Daney 提交于
The acknowledge bits don't exist for level triggered irqs, so setting them causes the simulator to terminate. Signed-off-by: NDavid Daney <david.daney@cavium.com> Signed-off-by: NLeonid Rosenboim <lrosenboim@caviumnetworks.com> Signed-off-by: NAleksey Makarov <aleksey.makarov@auriga.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8946/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Chandrakala Chavva 提交于
Read clock rate from the correct CSR. Don't clear COP0_DCACHE for OCTEONIII. Signed-off-by: NChandrakala Chavva <cchavva@caviumnetworks.com> Signed-off-by: NAleksey Makarov <aleksey.makarov@auriga.com> Signed-off-by: NDavid Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8945/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Chad Reese 提交于
CN38XX pass 1 required icache prefetching to be turned off. This chip never reached production and is long dead. Other processor specific icache settings are done by the bootloader. Remove these bits from the kernel. Signed-off-by: NChad Reese <kreese@caviumnetworks.com> Signed-off-by: NAleksey Makarov <aleksey.makarov@auriga.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: David Daney <david.daney@cavium.com> Patchwork: https://patchwork.linux-mips.org/patch/8944/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 David Daney 提交于
Signed-off-by: NDavid Daney <david.daney@cavium.com> Signed-off-by: NAleksey Makarov <aleksey.makarov@auriga.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8943/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 David Daney 提交于
Add coverage for OCTEON III models. Signed-off-by: NDavid Daney <david.daney@cavium.com> Signed-off-by: NAleksey Makarov <aleksey.makarov@auriga.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8942/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 David Daney 提交于
Make messages refer to all CN6XXX. Signed-off-by: NDavid Daney <david.daney@cavium.com> Signed-off-by: NAleksey Makarov <aleksey.makarov@auriga.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8941/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 David Daney 提交于
Also update union octeon_cvmemctl with new OCTEON II fields. [aleksey.makarov@auriga.com: use __BITFIELD_FIELD] Signed-off-by: NDavid Daney <david.daney@cavium.com> Signed-off-by: NAleksey Makarov <aleksey.makarov@auriga.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8940/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 David Daney 提交于
Disable ICache prefetch for certian Octeon II processors. Signed-off-by: NDavid Daney <david.daney@cavium.com> Signed-off-by: NAleksey Makarov <aleksey.makarov@auriga.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8938/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Aleksey Makarov 提交于
Commit 2c952e06 ("MIPS: Move cop2 save/restore to switch_to()") removes assembler code to store COP2 registers. Commit a36d8225 ("MIPS: OCTEON: Enable use of FPU") mistakenly restores it Fixes: a36d8225 ("MIPS: OCTEON: Enable use of FPU") Signed-off-by: NAleksey Makarov <aleksey.makarov@auriga.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: David Daney <david.daney@cavium.com> Patchwork: https://patchwork.linux-mips.org/patch/8937/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Chandrakala Chavva 提交于
Use dmfc0/dmtc0 instructions for reading CvmMemCtl COP0 register, its a 64-bit wide. Signed-off-by: NChandrakala Chavva <cchavva@caviumnetworks.com> Signed-off-by: NAleksey Makarov <aleksey.makarov@auriga.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: David Daney <david.daney@cavium.com> Patchwork: https://patchwork.linux-mips.org/patch/8936/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 David Daney 提交于
Allocate new save space, and then save/restore the registers if OCTEON III. Signed-off-by: NDavid Daney <david.daney@cavium.com> Signed-off-by: NAleksey Makarov <aleksey.makarov@auriga.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8935/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 David Daney 提交于
It wasn't being saved on task switch. Signed-off-by: NDavid Daney <david.daney@cavium.com> Signed-off-by: NAleksey Makarov <aleksey.makarov@auriga.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8934/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 David Daney 提交于
The wide multiplier is twice as wide, so we need to save twice as much state. Detect the multiplier type (CPU type) at start up and install model specific handlers. [aleksey.makarov@auriga.com: conflict resolution, support for old compilers] Signed-off-by: NDavid Daney <david.daney@cavium.com> Signed-off-by: NLeonid Rosenboim <lrosenboim@caviumnetworks.com> Signed-off-by: NAleksey Makarov <aleksey.makarov@auriga.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8933/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Markos Chandras 提交于
Allow more compression algorithms as well as uncompressed uImage.bin to be generated. An uncompressed image might be useful to rule out problems in the decompression code in the bootloader or even speed up the boot process at the expense of a bigger uImage file. Signed-off-by: NMarkos Chandras <markos.chandras@imgtec.com> Cc: James Hogan <james.hogan@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/9271/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 David Daney 提交于
Signed-off-by: NDavid Daney <david.daney@cavium.com> Signed-off-by: NAleksey Makarov <aleksey.makarov@auriga.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8737/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Lars-Peter Clausen 提交于
There are currently no gio device drivers that implement suspend/resume and this patch removes the bus specific legacy suspend and resume callbacks. This will allow us to eventually remove struct bus_type legacy suspend and resume support altogether. gio device drivers wanting to implement suspend and resume can use dev PM ops which will work out of the box without further modifications necessary. Signed-off-by: NLars-Peter Clausen <lars@metafoo.de> Acked-by: NThomas Bogendoerfer <tsbogend@alpha.franken.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/8920/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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Without these, there are multiple definitions of pci_proc_domain() and pci_domain_nr() if linux/pci.h and asm/pci.h are included. Add #ifdefs around them Signed-off-by: NZubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com> Reviewed-by: NMarkos Chandras <Markos.Chandras@imgtec.com> Cc: Markos.Chandras@imgtec.com Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8670/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Manuel Lauss 提交于
The current code uses bits 0-6 of the sys_cpupll register to calculate core clock speed. However this is only valid on Au1300, on all earlier models the hardware only uses bits 0-5 to generate core clock. This fixes clock calculation on the MTX1 (Au1500), where bit 6 of cpupll is set as well, which ultimately lead the code to calculate a bogus cpu core clock and also uart base clock down the line. Signed-off-by: NManuel Lauss <manuel.lauss@gmail.com> Reported-by: NJohn Crispin <blogic@openwrt.org> Tested-by: NBruno Randolf <br1@einfach.org> Cc: stable@vger.kernel.org [v3.17+] Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/9279/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Manuel Lauss 提交于
set_cpuspec() has been dropped with commit 074cf656 ("MIPS: Alchemy: remove cpu_table.") in late 2008. Signed-off-by: NManuel Lauss <manuel.lauss@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/9150/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Manuel Lauss 提交于
This was lost during the rewrite of clock framework support. Signed-off-by: NManuel Lauss <manuel.lauss@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/9149/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Manuel Lauss 提交于
The Au1000 and Au1500 calculate the LRCLK a bit differently than newer models: a single bit in MEM_STCFG0 selects if pclk is divided by 4 or 5. Signed-off-by: NManuel Lauss <manuel.lauss@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/9148/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Steven J. Hill 提交于
Build set and clear macros for the PageGrain register. Signed-off-by: NSteven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/9289/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Alexandre Courbot 提交于
There doesn't seem to be any valid reason to allocate the pages array with the same flags as the buffer itself. Doing so can eventually lead to the following safeguard in mm/slab.c's cache_grow() to be hit: if (unlikely(flags & GFP_SLAB_BUG_MASK)) { pr_emerg("gfp: %un", flags & GFP_SLAB_BUG_MASK); BUG(); } This happens when buffers are allocated with __GFP_DMA32 or __GFP_HIGHMEM. Fix this by allocating the pages array with GFP_KERNEL to follow what is done elsewhere in this file. Using GFP_KERNEL in __iommu_alloc_buffer() is safe because atomic allocations are handled by __iommu_alloc_atomic(). Signed-off-by: NAlexandre Courbot <acourbot@nvidia.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: NMarek Szyprowski <m.szyprowski@samsung.com> Acked-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Al Viro 提交于
Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk>
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由 Jiri Kosina 提交于
Commit f47233c2 ("x86/mm/ASLR: Propagate base load address calculation") causes PAGE_SIZE redefinition warnings for UML subarch builds. This is caused by added includes that were leftovers from previous patch versions are are not actually needed (especially page_types.h inlcude in module.c). Drop those stray includes. Reported-by: Nkbuild test robot <fengguang.wu@intel.com> Signed-off-by: NJiri Kosina <jkosina@suse.cz> Cc: Borislav Petkov <bp@suse.de> Cc: H. Peter Anvin <hpa@linux.intel.com> Cc: Kees Cook <keescook@chromium.org> Link: http://lkml.kernel.org/r/alpine.LNX.2.00.1502201017240.28769@pobox.suse.czSigned-off-by: NIngo Molnar <mingo@kernel.org>
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由 David Vrabel 提交于
Since _PAGE_PROTNONE aliases _PAGE_GLOBAL it is only valid if _PAGE_PRESENT is clear. Make pte_protnone() and pmd_protnone() check for this. This fixes a 64-bit Xen PV guest regression introduced by 8a0516ed ("mm: convert p[te|md]_numa users to p[te|md]_protnone_numa"). Any userspace process would endlessly fault. In a 64-bit PV guest, userspace page table entries have _PAGE_GLOBAL set by the hypervisor. This meant that any fault on a present userspace entry (e.g., a write to a read-only mapping) would be misinterpreted as a NUMA hinting fault and the fault would not be correctly handled, resulting in the access endlessly faulting. Signed-off-by: NDavid Vrabel <david.vrabel@citrix.com> Acked-by: NMel Gorman <mgorman@suse.de> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Steven J. Hill 提交于
* Clean up white spaces and tabs. * Get rid of remaining hardcoded values for calculating shifts and masks. * Get rid of redundant macro values. * Do not use page table bits directly in #ifdef's. Signed-off-by: NSteven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/9287/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
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由 Martin Schwidefsky 提交于
Until we have hard performance data about the effects of CAD in the spinlock loop disable the instruction by default. Signed-off-by: NMartin Schwidefsky <schwidefsky@de.ibm.com>
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