1. 09 7月, 2008 1 次提交
    • H
      dmaengine: Driver for the Synopsys DesignWare DMA controller · 3bfb1d20
      Haavard Skinnemoen 提交于
      This adds a driver for the Synopsys DesignWare DMA controller (aka
      DMACA on AVR32 systems.) This DMA controller can be found integrated
      on the AT32AP7000 chip and is primarily meant for peripheral DMA
      transfer, but can also be used for memory-to-memory transfers.
      
      This patch is based on a driver from David Brownell which was based on
      an older version of the DMA Engine framework. It also implements the
      proposed extensions to the DMA Engine API for slave DMA operations.
      
      The dmatest client shows no problems, but there may still be room for
      improvement performance-wise. DMA slave transfer performance is
      definitely "good enough"; reading 100 MiB from an SD card running at ~20
      MHz yields ~7.2 MiB/s average transfer rate.
      
      Full documentation for this controller can be found in the Synopsys
      DW AHB DMAC Databook:
      
      http://www.synopsys.com/designware/docs/iip/DW_ahb_dmac/latest/doc/dw_ahb_dmac_db.pdf
      
      The controller has lots of implementation options, so it's usually a
      good idea to check the data sheet of the chip it's intergrated on as
      well. The AT32AP7000 data sheet can be found here:
      
      http://www.atmel.com/dyn/products/datasheets.asp?family_id=682
      
      
      Changes since v4:
        * Use client_count instead of dma_chan_is_in_use()
        * Add missing include
        * Unmap buffers unless client told us not to
      
      Changes since v3:
        * Update to latest DMA engine and DMA slave APIs
        * Embed the hw descriptor into the sw descriptor
        * Clean up and update MODULE_DESCRIPTION, copyright date, etc.
      
      Changes since v2:
        * Dequeue all pending transfers in terminate_all()
        * Rename dw_dmac.h -> dw_dmac_regs.h
        * Define and use controller-specific dma_slave data
        * Fix up a few outdated comments
        * Define hardware registers as structs (doesn't generate better
          code, unfortunately, but it looks nicer.)
        * Get number of channels from platform_data instead of hardcoding it
          based on CONFIG_WHATEVER_CPU.
        * Give slave clients exclusive access to the channel
      
      Acked-by: Maciej Sosnowski <maciej.sosnowski@intel.com>,
      Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>
      Signed-off-by: NDan Williams <dan.j.williams@intel.com>
      3bfb1d20
  2. 20 4月, 2008 3 次提交
    • H
      avr32: Implement set_rate(), set_parent() and mode() for pll1 · 35bf50cc
      Hans-Christian Egtvedt 提交于
      This patch is a take two of adding full functionality to PLL1 on
      AT32AP7000.  This allows board-specific code and drivers to configure
      and enable PLL1. This is useful when precise control over the
      frequency of e.g. a genclock is needed and requested by users for the
      ABDAC device.
      
      The patch is based upon previous patches from both Haavard Skinnemoen
      and David Brownell.
      Signed-off-by: NHans-Christian Egtvedt <hcegtvedt@atmel.com>
      Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
      35bf50cc
    • D
      avr32: Generic clockevents support · e723ff66
      David Brownell 提交于
      This combines three patches from David Brownell:
        * avr32: tclib support
        * avr32: simplify clocksources
        * avr32: Turn count/compare into a oneshot clockevent device
      
      Register both TC blocks (instead of just the first one) so that
      the AT32/AT91 tclib code will pick them up (instead of just the
      avr32-only PIT-style clocksource).
      
      Rename the first one and its resources appropriately.
      
      More cleanups to the cycle counter clocksource code
      
       - Disable all the weak symbol magic; remove the AVR32-only TCB-based
         clocksource code (source and header).
      
       - Mark the __init code properly.
      
       - Don't forget to report IRQF_TIMER.
      
       - Make the system work properly with this clocksource, by preventing
         use of the CPU "idle" sleep state in the idle loop when it's used.
      
      Package the avr32 count/compare timekeeping support as a oneshot
      clockevent device, so it supports NO_HZ and high res timers.
      This means it also supports plugging in other clockevent devices
      and clocksources.
      Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
      Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
      e723ff66
    • B
      avr32: pass i2c board info through at32_add_device_twi · 040b28fc
      Ben Nizette 提交于
      New-style I2C drivers require that motherboard-mounted I2C devices are
      registered with the I2C core, typically at arch_initcall time.  This
      can be done nice and neat by passing the struct i2c_board_info[]
      through at32_add_device_twi just like we do for the SPI board info.
      
      While we've got the hood up, remove a duplicate declaration of
      at32_add_device_twi() in board.h.
      
      [hskinnemoen@atmel.com: add missing i2c_board_info forward-declaration]
      Signed-Off-By: NBen Nizette <bn@niasdigital.com>
      Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
      040b28fc
  3. 07 4月, 2008 1 次提交
  4. 09 2月, 2008 1 次提交
  5. 25 1月, 2008 2 次提交
  6. 15 11月, 2007 2 次提交
  7. 23 10月, 2007 3 次提交
  8. 11 10月, 2007 2 次提交
  9. 19 7月, 2007 3 次提交
  10. 23 6月, 2007 1 次提交
  11. 15 5月, 2007 1 次提交
  12. 27 4月, 2007 3 次提交
  13. 07 3月, 2007 1 次提交
  14. 16 2月, 2007 2 次提交
  15. 09 2月, 2007 4 次提交
  16. 08 12月, 2006 2 次提交
  17. 05 10月, 2006 4 次提交
  18. 26 9月, 2006 2 次提交
    • H
      [PATCH] AVR32 MTD: Static Memory Controller driver · bc157b75
      Haavard Skinnemoen 提交于
      This patchset adds the necessary drivers and infrastructure to access the
      external flash on the ATSTK1000 board through the MTD subsystem.  With this
      stuff in place, it will be possible to use a jffs2 filesystem stored in the
      external flash as a root filesystem.  It might also be possible to update the
      boot loader if you drop the write protection of partition 0.
      
      As suggested by David Woodhouse, I reworked the patches to use the physmap
      driver instead of introducing a separate mapping driver for the ATSTK1000.
      I've also cleaned up the hsmc header by removing useless comments and
      converting spaces to tabs (my headerfile generator needs some work.)
      
      Unfortunately, I couldn't unlock the flash in fixup_use_atmel_lock because the
      erase regions hadn't been set up yet, so I had to do it from cfi_amdstd_setup
      instead.
      
      This patch:
      
      This adds a simple API for configuring the static memory controller along with
      an implementation for the Atmel HSMC.
      Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
      Cc: David Woodhouse <dwmw2@infradead.org>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      bc157b75
    • H
      [PATCH] avr32 architecture · 5f97f7f9
      Haavard Skinnemoen 提交于
      This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
      CPU and the AT32STK1000 development board.
      
      AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
      cost-sensitive embedded applications, with particular emphasis on low power
      consumption and high code density.  The AVR32 architecture is not binary
      compatible with earlier 8-bit AVR architectures.
      
      The AVR32 architecture, including the instruction set, is described by the
      AVR32 Architecture Manual, available from
      
      http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
      
      The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture.  It
      features a 7-stage pipeline, 16KB instruction and data caches and a full
      Memory Management Unit.  It also comes with a large set of integrated
      peripherals, many of which are shared with the AT91 ARM-based controllers from
      Atmel.
      
      Full data sheet is available from
      
      http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
      
      while the CPU core implementation including caches and MMU is documented by
      the AVR32 AP Technical Reference, available from
      
      http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
      
      Information about the AT32STK1000 development board can be found at
      
      http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
      
      including a BSP CD image with an earlier version of this patch, development
      tools (binaries and source/patches) and a root filesystem image suitable for
      booting from SD card.
      
      Alternatively, there's a preliminary "getting started" guide available at
      http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
      to the sources and patches you will need in order to set up a cross-compiling
      environment for avr32-linux.
      
      This patch, as well as the other patches included with the BSP and the
      toolchain patches, is actively supported by Atmel Corporation.
      
      [dmccr@us.ibm.com: Fix more pxx_page macro locations]
      [bunk@stusta.de: fix `make defconfig']
      Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
      Signed-off-by: NAdrian Bunk <bunk@stusta.de>
      Signed-off-by: NDave McCracken <dmccr@us.ibm.com>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      5f97f7f9