Rework the hd64461 demuxer code to fix the HD64461 level-triggered
interrupts handling, using handle_level_irq() as needed.
Signed-off-by: NRafael Ignacio Zurita <rizurita@yahoo.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Older versions of kexec-tools has a zImage loader that
passes a virtual address as entry point. The elf loader
otoh it passes a physical address as entry point, and
pages are always passed as physical addresses as well.

Only allow physical addresses from now on.
Signed-off-by: NMagnus Damm <damm@igel.co.jp>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Save and restore ftrace state when returning from kexec jump in
machine_kexec(). Follows the x86 change.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

For the time being, this creates far more problems than it solves,
evident by the second local_irq_disable(). Kill all of this off
and rely on IRQ disabling to protect against the VBR reload.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Add kexec jump support to the SuperH architecture.

Similar to the x86 implementation, with the following
exceptions:

- Instead of separating the assembly code flow into
two parts for regular kexec and kexec jump we use a
single code path. In the assembly snippet regular
kexec is just kexec jump that never comes back.

- Instead of using a swap page when moving data between
pages the page copy assembly routine has been modified
to exchange the data between the pages using registers.

- We walk the page list twice in machine_kexec() to
do and undo physical to virtual address conversion.
Signed-off-by: NMagnus Damm <damm@igel.co.jp>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Rework the kexec code to avoid using P2SEG. Instead
we walk the page list in machine_kexec() and convert
the addresses from physical to virtual using C.
Signed-off-by: NMagnus Damm <damm@igel.co.jp>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Setup the vbr register in machine_kexec(). This
instead of passing values to the assembly snippet.
Signed-off-by: NMagnus Damm <damm@igel.co.jp>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This follows the ARM change from Aaro Koskinen:

	When unmapping N pages (e.g. shared memory) the amount of TLB
	flushes done can be (N*PAGE_SIZE/ZAP_BLOCK_SIZE)*N although it
	should be N at maximum. With PREEMPT kernel ZAP_BLOCK_SIZE is 8
	pages, so there is a noticeable performance penalty when
	unmapping a large VMA and the system is spending its time in
	flush_tlb_range().

	The problem is that tlb_end_vma() is always flushing the full VMA
	range. The subrange that needs to be flushed can be calculated by
	tlb_remove_tlb_entry(). This approach was suggested by Hugh
	Dickins, and is also used by other arches.

	The speed increase is roughly 3x for 8M mappings and for larger
	mappings even more.

Bits and peices are taken from the ARM patch as well as the existing
arch/um implementation that is quite similar.

The end result is a significant reduction in both partial and full TLB
flushes initiated through flush_tlb_range().

At the same time, the nommu implementation was broken, had a superfluous
cache flush, and subsequently would have triggered a BUG_ON() if a
code-path had triggered it. Tidy this up for correctness and provide a
nopped-out implementation there.

More background on the initial discussion can be found at:

	http://marc.info/?t=123609820900002&r=1&w=2
	http://marc.info/?t=123660375800003&r=1&w=2Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

While harmless, PTEA has different semantics on these parts, and is only
used in extended TLB mode. Kill off the legacy support.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This adds support for extended ASIDs (up to 16-bits) on newer SH-X3 cores
that implement the PTAEX register and respective functionality. Presently
only the 65nm SH7786 (90nm only supports legacy 8-bit ASIDs).

The main change is in how the PTE is written out when loading the entry
in to the TLB, as well as in how the TLB entry is selectively flushed.

While SH-X2 extended mode splits out the memory-mapped U and I-TLB data
arrays for extra bits, extended ASID mode splits out the address arrays.
While we don't use the memory-mapped data array access, the address
array accesses are necessary for selective TLB flushes, so these are
implemented newly and replace the generic SH-4 implementation.

With this, TLB flushes in switch_mm() are almost non-existent on newer
parts.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

IRQ for sh_eth of sh7763rdp became multi handling.
Therefore, the IRQ number of sh_eth is changed, too.
Signed-off-by: NNobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This adds support for the ESPT-Giga (Ethernet Serial Parallel
Translator) SH7763-based reference board.

Board support is relatively sparse, presently supporting serial,
gigabit ethernet, USB host, and MTD.

More information (in Japanese) available at:

	http://www.cente.jp/product/cente_hard/ESPT-Giga.htmlSigned-off-by: NNobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Follow the PVR2 DMAC change for G2 DMA.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

With arch/sh/drivers/dma/ always being built, the Dreamcast DMA engines
are being unconditionally built in, regardless of whether the DMA API is
enabled or not. This is a regression from previous behaviour, but there
is not much advantage in building them all in unconditionally regardless.
Add a new config option to make it optional, and update the only user of
it to reflect that.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

When SuperH CPU has IRQ multi of DMAC, SH_DMA_IRQ_MULTI becomes enable.
The following CPU's are Multi IRQ of DMAC now.
 - SH775X and SH7091
 - SH776X
 - SH7780
 - SH7785

If SH_DMA_IRQ_MULTI becomes enable, dma-sh api driver is optimized
for Multi IRQ.
Signed-off-by: NNobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This patch fixes a possible problem in the resume from
hibenration. It temporaneally saves the clk->rate on the
stack to avoid any possible change during the clk->set_parent(..)
call.
Signed-off-by: NFrancesco Virlinzi <francesco.virlinzi@st.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Improve the ap325 board code to allow the lcd panel
and backlight to be powered off.
Signed-off-by: NMagnus Damm <damm@igel.co.jp>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This patch contains CONFIG_SUSPEND support to the SuperH
architecture. If enabled, SuperH Mobile processors will
register their suspend callbacks during boot.

To suspend, use "echo mem > /sys/power/state". To allow
wakeup, make sure "/sys/device/platform/../power/wakeup"
contains "enabled". Additional per-device driver patches
are most likely needed.
Signed-off-by: NMagnus Damm <damm@igel.co.jp>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

-- log --
arch/sh/kernel/cpu/sh4/../sh3/entry.S:365: Error: invalid operands for opcode
make[4]: *** [arch/sh/kernel/cpu/sh4/../sh3/entry.o] Error 1
make[3]: *** [arch/sh/kernel/cpu/sh4] Error 2
-- log --
Signed-off-by: NNobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

dma-sh's get_dma_error_irq() is only used by SH4, as the SH3
doesn't have the DMA Error interrupt.

Disable it out for non-SH4 builds.
Signed-off-by: NNobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This implements preliminary suspend/resume support for the PMB.
Signed-off-by: NFrancesco Virlinzi <francesco.virlinzi@st.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Signed-off-by: NNobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Signed-off-by: NKuninori Morimoto <morimoto.kuninori@renesas.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Improve the sh7785lcr power off implementation to
never return. It takes some time before the board
is actually powered off, just hang after asking
the harware to power down.

This removes the serial port garbage printout.
Signed-off-by: NMagnus Damm <damm@igel.co.jp>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This patch adds PM support to the clock framework.
With this, resume from hibernation is properly supported.
Signed-off-by: NFrancesco Virlinzi <francesco.virlinzi@st.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This patch adds the clk_set_parent/clk_get_parent routines to the sh
clock framework.
Signed-off-by: NFrancesco Virlinzi <francesco.virlinzi@st.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This adds DMA support for newer SH-4A CPUs, particularly SH7763/64/80/85.

This also enables multi IRQ support for platforms that have multiple
vectors bound to the same IRQ source.
Signed-off-by: NNobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: NYoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Fix the problem that cannot work a PCI device when 32-bit physical
address mode.
Signed-off-by: NYoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Add a new defconfig for SH7785LCR in 32-bit mode, and update the power
off code to avoid 29-bit assumptions.
Signed-off-by: NYoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This provides a method for supporting fixed PMB mappings inherited from
the bootloader, as an alternative to the dynamic PMB mapping currently
used by the kernel. In the future these methods will be combined.

P1/P2 area is handled like a regular 29-bit physical address, and local
bus device are assigned P3 area addresses.
Signed-off-by: NYoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

If CONFIG_PM is set, let Migo-R LEDs show sleep states.
D11 will show STATUS0 and D12 PDSTATUS.
Signed-off-by: NMagnus Damm <damm@igel.co.jp>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Other compilation errors were revised by commit of
"sh: ap325rxa: Revert ov772x support"
(08c2f5b4) but other compilation
errors are given.
We revert this commit and need to add new header(media/soc_camera.h).
This change revises new compilation error.
Signed-off-by: NNobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Add Suspend-to-disk / swsusp / CONFIG_HIBERNATION support
to the SuperH architecture.

To suspend, use "swapon /dev/sda2; echo disk > /sys/power/state"
To resume, pass "resume=/dev/sda2" on the kernel command line.

The patch "pm: rework includes, remove arch ifdefs V2" is
needed to allow the generic swsusp code to build properly.

Hibernation is not enabled with this patch though, a patch
setting ARCH_HIBERNATION_POSSIBLE will be submitted later.
Signed-off-by: NMagnus Damm <damm@igel.co.jp>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

This reverts commit e088e4c9.

Removing the sysfs interface for p4-clockmod was flagged as a
regression in bug 12826.

Course of action:
 - Find out the remaining causes of overheating, and fix them
   if possible. ACPI should be doing the right thing automatically.
   If it isn't, we need to fix that.
 - mark p4-clockmod ui as deprecated
 - try again with the removal in six months.

It's not really feasible to printk about the deprecation, because
it needs to happen at all the sysfs entry points, which means adding
a lot of strcmp("p4-clockmod".. calls to the core, which.. bleuch.
Signed-off-by: NDave Jones <davej@redhat.com>

Impact: remove lots of lguest boot WARN_ON() when CONFIG_SPARSE_IRQ=y

We now need to call irq_to_desc_alloc_cpu() before
set_irq_chip_and_handler_name(), but we can't do that from init_IRQ (no
kmalloc available).

So do it as we use interrupts instead.  Also means we only alloc for
irqs we use, which was the intent of CONFIG_SPARSE_IRQ anyway.
Signed-off-by: NRusty Russell <rusty@rustcorp.com.au>
Cc: Ingo Molnar <mingo@redhat.com>

Impact: fix lguest boot crash on modern Intel machines

The code in early_init_intel does:

	if (c->x86 > 6 || (c->x86 == 6 && c->x86_model >= 0xd)) {
		u64 misc_enable;

		rdmsrl(MSR_IA32_MISC_ENABLE, misc_enable);

And that rdmsr faults (not allowed from non-0 PL).  We can get around
this by mugging the family ID part of the cpuid.  5 seems like a good
number.

Of course, this is a hack (how very lguest!).  We could just indicate
that we don't support MSRs, or implement lguest_rdmst.
Reported-by: NPatrick McHardy <kaber@trash.net>
Signed-off-by: NRusty Russell <rusty@rustcorp.com.au>
Tested-by: NPatrick McHardy <kaber@trash.net>