1. 12 3月, 2013 1 次提交
    • J
      ARM: tegra: don't unlock MMIO access to DBGLAR · b095ae2b
      Joseph Lo 提交于
      There is no need to unlock MMIO access to the DBGLAR all the time. Doing
      so may even cause problems if a SW bug causes writes to that MMIO region.
      
      Cortex-A15 processors do not support the CP14 register write the code
      currently uses to unlock the DBGLAR; the instruction throws an undefined
      instruction exceptions. This prevents tegra_secondary_startup() from
      executing on Tegra114, and hence prevents SMP.
      
      Remove the code that unlocks this access.
      Signed-off-by: NJoseph Lo <josephl@nvidia.com>
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      b095ae2b
  2. 12 2月, 2013 1 次提交
  3. 29 1月, 2013 2 次提交
    • J
      ARM: tegra: make device can run on UP · 9e32366f
      Joseph Lo 提交于
      The reset handler code is used for either UP or SMP. To make Tegra device
      can compile for UP. It needs to be moved to another file that is not SMP
      only. This is because the reset handler also be needed by CPU idle
      "powered-down" mode. So we also need to put the reset handler init function
      in non-SMP only and init them always.
      
      And currently the implementation of the reset handler to know which CPU is
      OK to bring up was identital with "cpu_present_mask". But the
      "cpu_present_mask" did not initialize yet when the reset handler init
      function was moved to init early function. We use the "cpu_possible_mask"
      to replace "cpu_present_mask". Then it can work on both UP and SMP case.
      Signed-off-by: NJoseph Lo <josephl@nvidia.com>
      [swarren: dropped the move of v7_invalidate_l1() from one file to another,
      to avoid conflicts with Pavel's cleanup of this function, adjust Makefile
      so each line only contains 1 file.]
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      9e32366f
    • J
      ARM: tegra: clean up the CPUINIT section · 8c627fa6
      Joseph Lo 提交于
      There are some redundant codes in the CPUINIT section that was caused by
      some codes not be organized well in "headsmp.S". Currently all the codes
      in "headsmp.S" were put into CPUINIT section. But actually it doesn't
      need to be loacted in CPUINIT section. There is no fuction access them
      in CPUINIT section and we will relocate them to IRAM.
      
      These codes also caused some unnecessary functions that access these
      codes been put into CPUINIT section too. This patch clean it up and put
      them into normal text section.
      Signed-off-by: NJoseph Lo <josephl@nvidia.com>
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      8c627fa6
  4. 16 11月, 2012 2 次提交
  5. 06 11月, 2012 1 次提交
    • S
      ARM: tegra: move iomap.h to mach-tegra · 2be39c07
      Stephen Warren 提交于
      Nothing outside mach-tegra uses this file, so there's no need for it to
      be in <mach/>.
      
      Since uncompress.h and debug-macro.S remain in include/mach, they need
      to include "../../iomap.h" becaue of this change. uncompress.h will soon
      be deleted in later multi-platform/single-zImage patches. debug-macro.S
      will need to continue to include this header using an explicit relative
      path, to avoid duplicating the physical->virtual address mapping that
      iomap.h dictates.
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      2be39c07
  6. 14 9月, 2012 1 次提交
  7. 27 2月, 2012 2 次提交
  8. 06 8月, 2010 1 次提交