- 12 3月, 2013 1 次提交
-
-
由 Joseph Lo 提交于
There is no need to unlock MMIO access to the DBGLAR all the time. Doing so may even cause problems if a SW bug causes writes to that MMIO region. Cortex-A15 processors do not support the CP14 register write the code currently uses to unlock the DBGLAR; the instruction throws an undefined instruction exceptions. This prevents tegra_secondary_startup() from executing on Tegra114, and hence prevents SMP. Remove the code that unlocks this access. Signed-off-by: NJoseph Lo <josephl@nvidia.com> Signed-off-by: NStephen Warren <swarren@nvidia.com>
-
- 12 2月, 2013 1 次提交
-
-
由 Dinh Nguyen 提交于
mach-socfpga is another platform that needs to use v7_invalidate_l1 to bringup additional cores. There was a comment that the ideal place for v7_invalidate_l1 should be in arm/mm/cache-v7.S Signed-off-by: NDinh Nguyen <dinguyen@altera.com> Acked-by: NSimon Horman <horms+renesas@verge.net.au> Acked-by: NStephen Warren <swarren@nvidia.com> Reviewed-by: NPavel Machek <pavel@denx.de> Reviewed-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: NPavel Machek <pavel@denx.de> Tested-by: NStephen Warren <swarren@nvidia.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Russell King <linux@arm.linux.org.uk> Cc: Olof Johansson <olof@lixom.net> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Rob Herring <rob.herring@calxeda.com> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Magnus Damm <magnus.damm@gmail.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
-
- 29 1月, 2013 2 次提交
-
-
由 Joseph Lo 提交于
The reset handler code is used for either UP or SMP. To make Tegra device can compile for UP. It needs to be moved to another file that is not SMP only. This is because the reset handler also be needed by CPU idle "powered-down" mode. So we also need to put the reset handler init function in non-SMP only and init them always. And currently the implementation of the reset handler to know which CPU is OK to bring up was identital with "cpu_present_mask". But the "cpu_present_mask" did not initialize yet when the reset handler init function was moved to init early function. We use the "cpu_possible_mask" to replace "cpu_present_mask". Then it can work on both UP and SMP case. Signed-off-by: NJoseph Lo <josephl@nvidia.com> [swarren: dropped the move of v7_invalidate_l1() from one file to another, to avoid conflicts with Pavel's cleanup of this function, adjust Makefile so each line only contains 1 file.] Signed-off-by: NStephen Warren <swarren@nvidia.com>
-
由 Joseph Lo 提交于
There are some redundant codes in the CPUINIT section that was caused by some codes not be organized well in "headsmp.S". Currently all the codes in "headsmp.S" were put into CPUINIT section. But actually it doesn't need to be loacted in CPUINIT section. There is no fuction access them in CPUINIT section and we will relocate them to IRAM. These codes also caused some unnecessary functions that access these codes been put into CPUINIT section too. This patch clean it up and put them into normal text section. Signed-off-by: NJoseph Lo <josephl@nvidia.com> Signed-off-by: NStephen Warren <swarren@nvidia.com>
-
- 16 11月, 2012 2 次提交
-
-
由 Joseph Lo 提交于
The L2 RAM is in different power domain from the CPU cluster. So the L2 content can be retained over CPU suspend/resume. To do that, we need to disable L2 after the MMU is disabled, and enable L2 before the MMU is enabled. But the L2 controller is in the same power domain with the CPU cluster. We need to restore it's settings and re-enable it after the power be resumed. Signed-off-by: NJoseph Lo <josephl@nvidia.com> Acked-by: NPeter De Schrijver <pdeschrijver@nvidia.com> Signed-off-by: NStephen Warren <swarren@nvidia.com>
-
由 Joseph Lo 提交于
The CPU suspending on Tegra means CPU power gating. We add a resume function for taking care the CPUs that resume from power gating status. This function was been hooked to the reset handler. We take care everything here before go into kernel. Be aware of that, you may see the legacy power status "LP2" in the code which is exactly the same meaning of "CPU power down". Based on the work by: Scott Williams <scwilliams@nvidia.com> Colin Cross <ccross@android.com> Gary King <gking@nvidia.com> Signed-off-by: NJoseph Lo <josephl@nvidia.com> Signed-off-by: NStephen Warren <swarren@nvidia.com>
-
- 06 11月, 2012 1 次提交
-
-
由 Stephen Warren 提交于
Nothing outside mach-tegra uses this file, so there's no need for it to be in <mach/>. Since uncompress.h and debug-macro.S remain in include/mach, they need to include "../../iomap.h" becaue of this change. uncompress.h will soon be deleted in later multi-platform/single-zImage patches. debug-macro.S will need to continue to include this header using an explicit relative path, to avoid duplicating the physical->virtual address mapping that iomap.h dictates. Signed-off-by: NStephen Warren <swarren@nvidia.com>
-
- 14 9月, 2012 1 次提交
-
-
由 Joseph Lo 提交于
There are some common macros for Tegra low-level assembly code. Clean up them into one header file and move the definitions that will be re-used into it as well. Signed-off-by: NJoseph Lo <josephl@nvidia.com> Signed-off-by: NStephen Warren <swarren@nvidia.com>
-
- 27 2月, 2012 2 次提交
-
-
由 Peter De Schrijver 提交于
Add support for bringing up secondary cores on Tegra30. On Tegra30 secondary CPU cores are powergated, so we need to turn on the domains before we can bring the CPU cores online. Bringing secondary cores online happens early during the sytem boot, so we call powergating initialization from platform early_init function. Based on work by: Scott Williams <scwilliams@nvidia.com> Colin Cross <ccross@android.com> Alex Frid <afrid@nvidia.com> Signed-off-by: NPeter De Schrijver <pdeschrijver@nvidia.com> Acked-by: NStephen Warren <swarren@nvidia.com> Tested-by: NStephen Warren <swarren@nvidia.com> Acked-by: NColin Cross <ccross@android.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
-
由 Peter De Schrijver 提交于
Prepare the Tegra secondary CPU core bringup code for other Tegra variants. The reset handler is also generalized to allow for future introduction of powersaving modes which turn off the CPU cores. Based on work by: Scott Williams <scwilliams@nvidia.com> Chris Johnson <cwj@nvidia.com> Colin Cross <ccross@android.com> Signed-off-by: NPeter De Schrijver <pdeschrijver@nvidia.com> Acked-by: NStephen Warren <swarren@nvidia.com> Tested-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
-
- 06 8月, 2010 1 次提交
-
-
由 Colin Cross 提交于
Signed-off-by: NColin Cross <ccross@android.com> Signed-off-by: NErik Gilling <konkers@android.com>
-