- 18 7月, 2015 1 次提交
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由 Viresh Kumar 提交于
Switch to my kernel.org alias instead of a badly named gmail address, which I rarely use. Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 22 11月, 2012 1 次提交
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由 Deepak Sikri 提交于
The patch corrects the case when the rate table is being scanned for a given frequency, and the search frequency is beyond the maximum frequency indexed in the table. By default, the system should be set at max frequency present in the rate table. This patch correctly returns the corresponding index value. Signed-off-by: NDeepak Sikri <deepak.sikri@st.com> Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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- 21 6月, 2012 1 次提交
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由 Viresh Kumar 提交于
viresh.kumar@st.com email-id doesn't exist anymore as I have left the company. Replace ST's id with viresh.linux@gmail.com. It also updates .mailmap file to fix address for 'git shortlog' Signed-off-by: NViresh Kumar <viresh.linux@gmail.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 13 5月, 2012 1 次提交
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由 Viresh Kumar 提交于
All SPEAr SoC's contain PLLs. Their Fout is derived based on following equations - In normal mode vco = (2 * M[15:8] * Fin)/N - In Dithered mode vco = (2 * M[15:0] * Fin)/(256 * N) pll_rate = vco/2^p vco and pll are very closely bound to each other, "vco needs to program: mode, m & n" and "pll needs to program p", both share common enable/disable logic and registers. This patch adds in support for this type of clock. Signed-off-by: NViresh Kumar <viresh.kumar@st.com> Reviewed-by: NMike Turquette <mturquette@linaro.org>
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