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  1. 30 1月, 2013 8 次提交
    • P
      ARM: OMAP2+: powerdomain/clockdomain: add a per-powerdomain spinlock · 3a090284
      由 Paul Walmsley 提交于 
      Add a per-powerdomain spinlock.  Use that instead of the clockdomain
spinlock.  Add pwrdm_lock()/pwrdm_unlock() functions to allow other
code to acquire or release the powerdomain spinlock without reaching
directly into the struct powerdomain.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Jean Pihet <jean.pihet@newoldbits.com>
      3a090284
    • P
      ARM: OMAP2+: PM/powerdomain: move omap_set_pwrdm_state() to powerdomain code · c4978fba
      由 Paul Walmsley 提交于 
      Move omap_set_pwrdm_state() from the PM code to the powerdomain code,
and refactor it to split it up into several functions.  A subsequent patch
will rename it to conform with the existing powerdomain function names.

This version includes some additional documentation, based on a
suggestion from Jean Pihet.  It also modifies omap_set_pwrdm_state()
to not bail out early unless both the powerdomain current power state
and the next power state are equal.  (Previously it would terminate
early if the next power state was equal to the target power state,
which was insufficiently rigorous.)
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Jean Pihet <jean.pihet@newoldbits.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Tero Kristo <t-kristo@ti.com>
      c4978fba
    • P
      ARM: OMAP2: PM/powerdomain: drop unnecessary pwrdm_wait_transition() · f8457c2d
      由 Paul Walmsley 提交于 
      Drop an unnecessary pwrdm_wait_transition() from mach-omap2/pm.c -
it's called by the subsequent pwrdm_state_switch().

Also get rid of pwrdm_wait_transition() in the powerdomain code - there's
no longer any need to export this function.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
      f8457c2d
    • P
      ARM: OMAP2xxx: PM: clean up some crufty powerstate programming code · f653b298
      由 Paul Walmsley 提交于 
      Don't attempt to put clockdomains to sleep; this should be handled by the
clock framework.  It should be enough to program the next-power-state,
and then let the code in omap_pm_clkdms_setup() deal with the rest.

Start out by programming the MPU and CORE powerdomains to stay ON.
Then control the MPU and CORE powerdomain states directly in
omap2_enter_full_retention() and omap2_enter_mpu_retention().  Not the
most optimal way to do it, but certainly is the most conservative until
OMAP2xxx PM is working again.

Get rid of the open-coded PM_PWSTCTRL_MPU writes in
omap2_enter_mpu_retention(); use the powerdomain code instead.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
      f653b298
    • P
      ARM: OMAP2+: clockdomain: add pwrdm_state_switch() call to clkdm_sleep() · 53e1cb46
      由 Paul Walmsley 提交于 
      In clkdm_sleep(), the powerdomain should be eligible to switch power
states right after the call to the low-level clockdomain sleep
function.  We should have been tracking that with the
pwrdm_state_switch() code, but we weren't, for whatever reason.  Fix that.

This resolves the "pwrdm state mismatch(cam_pwrdm) 3 != 0" that appears
during the OMAP4460 Pandaboard-ES PM test, e.g. here:

http://www.pwsan.com/omap/testlogs/test_v3.8-rc5/20130126003323/pm/4460pandaes/4460pandaes_log.txtSigned-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Tero Kristo <t-kristo@ti.com>
      53e1cb46
    • J
      ARM: OMAP2+: powerdomain: fix powerdomain trace integration · c165a140
      由 Jean Pihet 提交于 
      Fix the trace in the case a power domain did not hit the desired
state, as reported by Paul Walmsley.
Reported-by: NPaul Walmsley <paul@pwsan.com>
Signed-off-by: NJean Pihet <j-pihet@ti.com>
[paul@pwsan.com: split this fix off from the patch
 "ARM: OMAP2+: PM debug: trace the functional power domains states"]
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      c165a140
    • P
      ARM: OMAP4: MPUSS PM: remove unnecessary shim functions for powerdomain control · 32d174ed
      由 Paul Walmsley 提交于 
      The OMAP4 MPU subsystem power management code contains several unnecessary
shim functions for powerdomain control; remove them.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
      32d174ed
    • P
      ARM: OMAP3xxx: CPUIdle: optimize __omap3_enter_idle() · 1cd96478
      由 Paul Walmsley 提交于 
      Avoid programming the MPU and CORE powerdomain next-power-state
registers if those powerdomains will never enter low-power states
(e.g., the state that people refer to as "C1").

To avoid making assumptions about CPUIdle states based on their order
in the list, use a flag to mark CPUIdle states that don't enter
powerdomain low-power states.

Avoid a previous-power-state register read on the MPU powerdomain
unless we know that the MPU was supposed to go OFF during the last
state transition.  Previous-power-state register reads can be very
expensive, so it's worth avoiding these when possible.

Since the CORE_L3 clockdomain can't go inactive unless the MPU is active,
there's little point blocking autoidle on the CORE_L3 clockdomain in "C1"
state, since we've programmed the MPU clockdomain to stay active.
Remove the unnecessary code.
Signed-off-by: NPaul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
      1cd96478
  3. 26 1月, 2013 2 次提交
  5. 24 1月, 2013 2 次提交
  7. 23 1月, 2013 9 次提交
  9. 22 1月, 2013 4 次提交
  11. 19 1月, 2013 5 次提交
  13. 18 1月, 2013 2 次提交
  15. 17 1月, 2013 7 次提交
  17. 14 1月, 2013 1 次提交
    • S
      ARM: imx: correct low-power mode setting · 83ae2098
      由 Shawn Guo 提交于 
      The hardware reset value of bit CCM_CLPCR_LPM enables WAIT mode
(WAIT_UNCLOCKED) by default.  However this is undesirable because
WAIT mode should only be enabled when there is a driver managing
ARM clock gating.  Correct the initial power mode to WAIT_CLOCKED
(disable WAIT mode).  While at it, the power mode after resuming
is also set back to WAIT_CLOCKED from STOP_POWER_OFF.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
      83ae2098