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  1. 21 3月, 2012 3 次提交
  3. 03 3月, 2012 1 次提交
  5. 02 3月, 2012 1 次提交
    • R
      PCI / PCIe: Introduce command line option to disable ARI · 6748dcc2
      由 Rafael J. Wysocki 提交于 
      There are PCIe devices on the market that report ARI support but
then fail to initialize correctly when ARI is actually used.  This
leads to situations in which kernels 2.6.34 and newer fail to handle
systems where the previous kernels worked without any apparent
problems.  Unfortunately, it is currently unknown how many such
devices are there.

For this reason, introduce a new kernel command line option,
pci=noari, allowing users to disable PCIe ARI altogether if they
see problems with PCIe device initialization.
Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      6748dcc2
  7. 28 2月, 2012 4 次提交
  9. 25 2月, 2012 18 次提交
  11. 24 2月, 2012 13 次提交
    • B
      PCI: collapse pcibios_resource_to_bus · fb127cb9
      由 Bjorn Helgaas 提交于 
      Everybody uses the generic pcibios_resource_to_bus() supplied by the core
now, so remove the ARCH_HAS_GENERIC_PCI_OFFSETS used during conversion.
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      fb127cb9
    • B
      xtensa/PCI: get rid of device resource fixups · 4ba2aef3
      由 Bjorn Helgaas 提交于 
      Tell the PCI core about host bridge address translation so it can take
care of bus-to-resource conversion for us.

CC: Chris Zankel <chris@zankel.net>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      4ba2aef3
    • B
      sparc/PCI: get rid of device resource fixups · ac1edcc5
      由 Bjorn Helgaas 提交于 
      Tell the PCI core about host bridge address translation so it can take
care of bus-to-resource conversion for us.

N.B. Leon apparently never uses initial BAR values, so it didn't matter
that we never fixed up the I/O resources from bus address to CPU addresses.

Other sparc uses pci_of_scan_bus(), which sets device resources directly
to CPU addresses, not bus addresses, so it didn't need pcibios_fixup_bus()
either.  But by telling the core about the offsets, we can nuke
pcibios_resource_to_bus().

CC: "David S. Miller" <davem@davemloft.net>
CC: sparclinux@vger.kernel.org
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      ac1edcc5
    • B
      sh/PCI: get rid of device resource fixups · 7fa6a50e
      由 Bjorn Helgaas 提交于 
      Tell the PCI core about host bridge address translation so it can take
care of bus-to-resource conversion for us.

CC: Paul Mundt <lethal@linux-sh.org>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      7fa6a50e
    • B
      powerpc/PCI: get rid of device resource fixups · 6c5705fe
      由 Bjorn Helgaas 提交于 
      Tell the PCI core about host bridge address translation so it can take
care of bus-to-resource conversion for us.

CC: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      6c5705fe
    • B
      parisc/PCI: get rid of device resource fixups · 39c2462e
      由 Bjorn Helgaas 提交于 
      Tell the PCI core about host bridge address translation so it can take
care of bus-to-resource conversion for us.

CC: linux-parisc@vger.kernel.org
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      39c2462e
    • B
      mn10300/PCI: get rid of device resource fixups · 4b84b6e9
      由 Bjorn Helgaas 提交于 
      Tell the PCI core about host bridge address translation so it can take
care of bus-to-resource conversion for us.

CC: David Howells <dhowells@redhat.com>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      4b84b6e9
    • B
      mips/PCI: get rid of device resource fixups · 96a6b9ad
      由 Bjorn Helgaas 提交于 
      Tell the PCI core about host bridge address translation so it can take
care of bus-to-resource conversion for us.

Here's the wrinkle on Cobalt: we can't generate normal I/O port addresses
on PCI because the GT-64111 doesn't do any address translation, so we have
this:

  CPU I/O port addresses		[io 0x0000-0xffffff]
  PCI bus I/O port addresses	[io 0x10000000-0x10ffffff]

Legacy-mode IDE controllers start out with the legacy bus addresses, e.g.,
0x1f0, assigned by pci_setup_device().  These are outside the range of
addresses GT-64111 can generate on PCI, but pcibios_fixup_device_resources()
converted them to CPU addresses anyway by adding io_offset.  Therefore, we
had to pre-adjust them in cobalt_legacy_ide_fixup().

With io_offset = 0xf0000000, we had this:

  res->start = 0x1f0	initialized in pci_setup_device()
  res->start = 0x100001f0	-= io_offset in cobalt_legacy_ide_fixup()
  res->start = 0x1f0	+= io_offset in pcibios_fixup_device_resources()

The difference after this patch is that the generic pci_bus_to_resource()
only adds the offset if the bus address is inside a host bridge window.
Since 0x1f0 is not a valid bus address and is not inside any windows, it is
unaffected, so we now have this:

  region->start = 0x1f0	initialized in pci_setup_device()
  res->start = 0x1f0	no offset by pci_bus_to_resource()

That means we can remove both pcibios_fixup_device_resources() and
cobalt_legacy_ide_fixup().

I would *rather* set the host bridge offset to zero (which corresponds
to what the GT-64111 actually does), and have both CPU and PCI addresses
of [io 0x10000000-0x10ffffff].  However, that would require changes to
generic code that assumes legacy I/O addresses, such as pic1_io_resource
([io 0x0020-0x00021]), and we'd have to keep a Cobalt IDE fixup.

Of course, none of this changes the fact that references to I/O port
0x1f0 actually go to port 0x100001f0, not 0x1f0, on the Cobalt PCI bus.
Fortunately the VT82C586 IDE controller only decodes the low 24 address
bits, so it does work.

CC: Ralf Baechle <ralf@linux-mips.org>
CC: Yoichi Yuasa <yuasa@linux-mips.org>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      96a6b9ad
    • B
      microblaze/PCI: get rid of device resource fixups · aa23bdc0
      由 Bjorn Helgaas 提交于 
      Tell the PCI core about host bridge address translation so it can take
care of bus-to-resource conversion for us.

CC: Michal Simek <monstr@monstr.eu>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      aa23bdc0
    • B
      ia64/PCI: get rid of device resource fixups · 10d1cd2b
      由 Bjorn Helgaas 提交于 
      Tell the PCI core about host bridge address translation so it can take
care of bus-to-resource conversion for us.

CC: Tony Luck <tony.luck@intel.com>
CC: Jack Steiner <steiner@sgi.com>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      10d1cd2b
    • B
      ia64/PCI: SN: convert to pci_scan_root_bus() for correct root bus resources · f920b55d
      由 Bjorn Helgaas 提交于 
      Convert from pci_scan_bus() to pci_scan_root_bus().  Supply the root
bus resources from bussoft.  When we move the resource adjustment from
pcibios_fixup_resources() to the PCI core, it will be important to have
the root bus resources correct from the beginning.

CC: Tony Luck <tony.luck@intel.com>
CC: Jack Steiner <steiner@sgi.com>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      f920b55d
    • B
      arm/PCI: get rid of device resource fixups · 9f786d03
      由 Bjorn Helgaas 提交于 
      Tell the PCI core about host bridge address translation so it can take
care of bus-to-resource conversion for us.

CC: Russell King <linux@arm.linux.org.uk>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      9f786d03
    • B
      alpha/PCI: get rid of device resource fixups · c04d9e35
      由 Bjorn Helgaas 提交于 
      Tell the PCI core about host bridge address translation so it can take
care of bus-to-resource conversion for us.

CC: linux-alpha@vger.kernel.org
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      c04d9e35