1. 13 10月, 2016 1 次提交
  2. 04 10月, 2016 2 次提交
    • M
      drm/radeon: Prevent races on pre DCE4 between flip submission and completion. · 363926dc
      Mario Kleiner 提交于
      Pre DCE4 hw doesn't have reliable pageflip completion
      interrupts, so instead polling for flip completion is
      used from within the vblank irq handler to complete
      page flips.
      
      This causes a race if pageflip ioctl is called close to
      vblank:
      
      1. pageflip ioctl queues execution of radeon_flip_work_func.
      
      2. vblank irq fires, radeon_crtc_handle_vblank checks for
         flip_status == FLIP_SUBMITTED finds none, no-ops.
      
      3. radeon_flip_work_func runs inside vblank, decides to
         set flip_status == FLIP_SUBMITTED and programs the
         flip into hw.
      
      4. hw executes flip immediately (because in vblank), but
         as 2 already happened, the flip completion routine only
         emits the flip completion event one refresh later ->
         wrong vblank count/timestamp for completion and no
         performance gain, as instead of delaying the flip until
         next vblank, we now delay the next flip by 1 refresh
         while waiting for the delayed flip completion event.
      
      Given we often don't gain anything due to this race, but
      lose precision, prevent the programmed flip from executing
      in vblank on pre DCE4 asics to avoid this race.
      
      On pre-AVIVO hw we can't program the hw for edge-triggered
      flips, they always execute anywhere in vblank. Therefore delay
      the actual flip programming until after vblank on pre-AVIVO.
      Reviewed-by: NMichel Dänzer <michel.daenzer@amd.com>
      Signed-off-by: NMario Kleiner <mario.kleiner.de@gmail.com>
      Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
      363926dc
    • M
      drm/radeon: Slightly more robust flip completion handling for < DCE-4 · 73d4c23f
      Mario Kleiner 提交于
      Pre DCE4 hardware doesn't have (reliable) pageflip completion
      irqs, therefore we have to use the old polling method for flip
      completion handling in vblank irq.
      
      As vblank irqs fire a bit before start of vblank (when the
      linebuffer fifo read position reaches end of scanout), we
      have some fudge for flip completion handling in the last
      lines of active scanout. Old code assumed the threshold to
      be 99% of active scanout height, a ballpark estimate which
      worked ok. Since we know since a while how to calculate the
      actual threshold from linebuffer size, lets make use of it
      to get a more accurate threshold.
      
      This completion path is still prone to some races in corner
      cases, especially on pre-AVIVO hardware, so document them
      a bit better in the code comments.
      Acked-by: NMichel Dänzer <michel.daenzer@amd.com>
      Signed-off-by: NMario Kleiner <mario.kleiner.de@gmail.com>
      Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
      73d4c23f
  3. 11 8月, 2016 1 次提交
  4. 30 7月, 2016 2 次提交
  5. 24 6月, 2016 1 次提交
  6. 14 6月, 2016 1 次提交
  7. 07 6月, 2016 2 次提交
  8. 17 5月, 2016 1 次提交
  9. 05 5月, 2016 1 次提交
  10. 02 5月, 2016 1 次提交
  11. 17 3月, 2016 1 次提交
  12. 15 3月, 2016 1 次提交
  13. 06 3月, 2016 1 次提交
    • M
      drm/radeon: Fix error handling in radeon_flip_work_func. · 1e1490a3
      Mario Kleiner 提交于
      This is a port of the patch "drm/amdgpu: Fix error handling in amdgpu_flip_work_func."
      to fix the following problem for radeon as well which was
      reported against amdgpu:
      
      The patch e1d09dc0: "drm/amdgpu: Don't hang in
      amdgpu_flip_work_func on disabled crtc." from Feb 19, 2016, leads to
      the following static checker warning, as reported by Dan Carpenter in
      https://lists.freedesktop.org/archives/dri-devel/2016-February/101987.html
      
      drivers/gpu/drm/amd/amdgpu/amdgpu_display.c:127 amdgpu_flip_work_func()     warn: should this be 'repcnt == -1'
      drivers/gpu/drm/amd/amdgpu/amdgpu_display.c:136 amdgpu_flip_work_func() error: double unlock 'spin_lock:&crtc->dev->event_lock'
      drivers/gpu/drm/amd/amdgpu/amdgpu_display.c:136 amdgpu_flip_work_func() error: double unlock 'irqsave:flags'
      
      This patch fixes both reported problems:
      
      Change post-decrement of repcnt to pre-decrement, so
      it can't underflow anymore, but still performs up to
      three repetitions - three is the maximum one could
      expect in practice.
      
      Move the spin_unlock_irqrestore to where it actually
      belongs.
      Reviewed-by: NMichel Dänzer <michel.daenzer@amd.com>
      Reported-by: NDan Carpenter <dan.carpenter@oracle.com>
      Signed-off-by: NMario Kleiner <mario.kleiner.de@gmail.com>
      Cc: <stable@vger.kernel.org> # 4.4+
      Cc: Michel Dänzer <michel.daenzer@amd.com>
      Cc: Alex Deucher <alexander.deucher@amd.com>
      Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
      1e1490a3
  14. 20 2月, 2016 1 次提交
    • M
      drm/radeon: Don't hang in radeon_flip_work_func on disabled crtc. (v2) · 2b8341b3
      Mario Kleiner 提交于
      This fixes a regression introduced in Linux 4.4.
      
      Limit the amount of time radeon_flip_work_func can
      delay programming a page flip, by both limiting the
      maximum amount of time per wait cycle and the maximum
      number of wait cycles. Continue the flip if the limit
      is exceeded, even if that may result in a visual or
      timing glitch.
      
      This is to prevent a hang of page flips, as reported
      in fdo bug #93746: Disconnecting a DisplayPort display
      in parallel to a kms pageflip getting queued can cause
      the following hang of page flips and thereby an unusable
      desktop:
      
      1. kms pageflip ioctl() queues pageflip -> queues execution
         of radeon_flip_work_func.
      
      2. Hotunplug of display causes the driver to DPMS OFF
         the unplugged display. Display engine shuts down,
         scanout no longer moves, but stays at its resting
         position at start line of vblank.
      
      3. radeon_flip_work_func executes while crtc is off, and
         due to the non-moving scanout position, the new flip
         delay code introduced into Linux 4.4 by
         commit 5b5561b3 ("drm/radeon: Fixup hw vblank counter/ts..")
         enters an infinite wait loop.
      
      4. After reconnecting the display, the pageflip continues
         to hang in 3. and the display doesn't update its view
         of the desktop.
      
      This patch fixes the Linux 4.4 regression from fdo bug #93746
      
      <https://bugs.freedesktop.org/show_bug.cgi?id=93746>
      
      v2: Skip wait immediately if !radeon_crtc->enabled, as
          suggested by Michel.
      Reported-by: NBernd Steinhauser <linux@bernd-steinhauser.de>
      Signed-off-by: NMario Kleiner <mario.kleiner.de@gmail.com>
      Tested-by: NBernd Steinhauser <linux@bernd-steinhauser.de>
      
      Cc: <stable@vger.kernel.org> # 4.4+
      Cc: Michel Dänzer <michel.daenzer@amd.com>
      Cc: Alex Deucher <alexander.deucher@amd.com>
      Reviewed-by: NMichel Dänzer <michel.daenzer@amd.com>
      Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
      2b8341b3
  15. 13 2月, 2016 1 次提交
    • L
      drm/radeon: Fix WARN_ON if DRM_DP_AUX_CHARDEV is enabled · 477d9f0e
      Lukas Wunner 提交于
      Rafael Antognolli's new DRM_DP_AUX_CHARDEV feature causes a WARN_ON
      if drm_dp_aux->dev == drm_connector->kdev and drm_dp_aux_unregister()
      is called after drm_connector_unregister(). radeon is the only driver
      affected by this besides i915. (amdgpu calls drm_dp_aux_unregister()
      before drm_connector_unregister().)
      
      Cc: Rafael Antognolli <rafael.antognolli@intel.com>
      Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
      Cc: Alex Deucher <alexander.deucher@amd.com>
      Signed-off-by: NLukas Wunner <lukas@wunner.de>
      Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
      477d9f0e
  16. 26 1月, 2016 1 次提交
    • R
      drm/radeon: only init fbdev if we have connectors · f95429ec
      Rob Clark 提交于
      This fixes an issue that was noticed on an optimus/prime laptop with
      a kernel that was old enough to not support the integrated intel gfx
      (which was driving all the outputs), but did have support for the
      discrete radeon gpu.  The end result was not falling back to VESA and
      leaving the user with a black screen.
      
      (Plus it is kind of silly to create an framebuffer device if there
      are no outputs hooked up to the gpu.)
      Signed-off-by: NRob Clark <robdclark@gmail.com>
      Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
      f95429ec
  17. 19 12月, 2015 1 次提交
    • M
      drm/radeon: Fixup hw vblank counter/ts for new drm_update_vblank_count() (v2) · c55d21ea
      Mario Kleiner 提交于
      commit 4dfd6486 "drm: Use vblank timestamps to guesstimate how many
      vblanks were missed" introduced in Linux 4.4-rc1 makes the drm core
      more fragile to drivers which don't update hw vblank counters and
      vblank timestamps in sync with firing of the vblank irq and
      essentially at leading edge of vblank.
      
      This exposed a problem with radeon-kms/amdgpu-kms which do not
      satisfy above requirements:
      
      The vblank irq fires a few scanlines before start of vblank, but
      programmed pageflips complete at start of vblank and
      vblank timestamps update at start of vblank, whereas the
      hw vblank counter increments only later, at start of vsync.
      
      This leads to problems like off by one errors for vblank counter
      updates, vblank counters apparently going backwards or vblank
      timestamps apparently having time going backwards. The net result
      is stuttering of graphics in games, or little hangs, as well as
      total failure of timing sensitive applications.
      
      See bug #93147 for an example of the regression on Linux 4.4-rc:
      
      https://bugs.freedesktop.org/show_bug.cgi?id=93147
      
      This patch tries to align all above events better from the
      viewpoint of the drm core / of external callers to fix the problem:
      
      1. The apparent start of vblank is shifted a few scanlines earlier,
      so the vblank irq now always happens after start of this extended
      vblank interval and thereby drm_update_vblank_count() always samples
      the updated vblank count and timestamp of the new vblank interval.
      
      To achieve this, the reporting of scanout positions by
      radeon_get_crtc_scanoutpos() now operates as if the vblank starts
      radeon_crtc->lb_vblank_lead_lines before the real start of the hw
      vblank interval. This means that the vblank timestamps which are based
      on these scanout positions will now update at this earlier start of
      vblank.
      
      2. The driver->get_vblank_counter() function will bump the returned
      vblank count as read from the hw by +1 if the query happens after
      the shifted earlier start of the vblank, but before the real hw increment
      at start of vsync, so the counter appears to increment at start of vblank
      in sync with the timestamp update.
      
      3. Calls from vblank irq-context and regular non-irq calls are now
      treated identical, always simulating the shifted vblank start, to
      avoid inconsistent results for queries happening from vblank irq vs.
      happening from drm_vblank_enable() or vblank_disable_fn().
      
      4. The radeon_flip_work_func will delay mmio programming a pageflip until
      the start of the real vblank iff it happens to execute inside the shifted
      earlier start of the vblank, so pageflips now also appear to execute at
      start of the shifted vblank, in sync with vblank counter and timestamp
      updates. This to avoid some races between updates of vblank count and
      timestamps that are used for swap scheduling and pageflip execution which
      could cause pageflips to execute before the scheduled target vblank.
      
      The lb_vblank_lead_lines "fudge" value is calculated as the size of
      the display controllers line buffer in scanlines for the given video
      mode: Vblank irq's are triggered by the line buffer logic when the line
      buffer refill for a video frame ends, ie. when the line buffer source read
      position enters the hw vblank. This means that a vblank irq could fire at
      most as many scanlines before the current reported scanout position of the
      crtc timing generator as the number of scanlines the line buffer can
      maximally hold for a given video mode.
      
      This patch has been successfully tested on a RV730 card with DCE-3 display
      engine and on a evergreen card with DCE-4 display engine, in single-display
      and dual-display configuration, with different video modes.
      
      A similar patch is needed for amdgpu-kms to fix the same problem.
      
      Limitations:
      
      - Line buffer sizes in pixels are hard-coded on < DCE-4 to a value
        i just guessed to be high enough to work ok, lacking info on the true
        sizes atm.
      
      Fixes: fdo#93147
      Signed-off-by: NMario Kleiner <mario.kleiner.de@gmail.com>
      Cc: Alex Deucher <alexander.deucher@amd.com>
      Cc: Michel Dänzer <michel.daenzer@amd.com>
      Cc: Harry Wentland <Harry.Wentland@amd.com>
      Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
      
      (v1) Tested-by: Dave Witbrodt <dawitbro@sbcglobal.net>
      
      (v2) Refine radeon_flip_work_func() for better efficiency:
      
           In radeon_flip_work_func, replace the busy waiting udelay(5)
           with event lock held by a more performance and energy efficient
           usleep_range() until at least predicted true start of hw vblank,
           with some slack for scheduler happiness. Release the event lock
           during waits to not delay other outputs in doing their stuff, as
           the waiting can last up to 200 usecs in some cases.
      
           Retested on DCE-3 and DCE-4 to verify it still works nicely.
      
      (v2) Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
      Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
      c55d21ea
  18. 05 12月, 2015 1 次提交
    • M
      drm/radeon: Fixup hw vblank counter/ts for new drm_update_vblank_count() (v2) · 5b5561b3
      Mario Kleiner 提交于
      commit 4dfd6486 "drm: Use vblank timestamps to guesstimate how many
      vblanks were missed" introduced in Linux 4.4-rc1 makes the drm core
      more fragile to drivers which don't update hw vblank counters and
      vblank timestamps in sync with firing of the vblank irq and
      essentially at leading edge of vblank.
      
      This exposed a problem with radeon-kms/amdgpu-kms which do not
      satisfy above requirements:
      
      The vblank irq fires a few scanlines before start of vblank, but
      programmed pageflips complete at start of vblank and
      vblank timestamps update at start of vblank, whereas the
      hw vblank counter increments only later, at start of vsync.
      
      This leads to problems like off by one errors for vblank counter
      updates, vblank counters apparently going backwards or vblank
      timestamps apparently having time going backwards. The net result
      is stuttering of graphics in games, or little hangs, as well as
      total failure of timing sensitive applications.
      
      See bug #93147 for an example of the regression on Linux 4.4-rc:
      
      https://bugs.freedesktop.org/show_bug.cgi?id=93147
      
      This patch tries to align all above events better from the
      viewpoint of the drm core / of external callers to fix the problem:
      
      1. The apparent start of vblank is shifted a few scanlines earlier,
      so the vblank irq now always happens after start of this extended
      vblank interval and thereby drm_update_vblank_count() always samples
      the updated vblank count and timestamp of the new vblank interval.
      
      To achieve this, the reporting of scanout positions by
      radeon_get_crtc_scanoutpos() now operates as if the vblank starts
      radeon_crtc->lb_vblank_lead_lines before the real start of the hw
      vblank interval. This means that the vblank timestamps which are based
      on these scanout positions will now update at this earlier start of
      vblank.
      
      2. The driver->get_vblank_counter() function will bump the returned
      vblank count as read from the hw by +1 if the query happens after
      the shifted earlier start of the vblank, but before the real hw increment
      at start of vsync, so the counter appears to increment at start of vblank
      in sync with the timestamp update.
      
      3. Calls from vblank irq-context and regular non-irq calls are now
      treated identical, always simulating the shifted vblank start, to
      avoid inconsistent results for queries happening from vblank irq vs.
      happening from drm_vblank_enable() or vblank_disable_fn().
      
      4. The radeon_flip_work_func will delay mmio programming a pageflip until
      the start of the real vblank iff it happens to execute inside the shifted
      earlier start of the vblank, so pageflips now also appear to execute at
      start of the shifted vblank, in sync with vblank counter and timestamp
      updates. This to avoid some races between updates of vblank count and
      timestamps that are used for swap scheduling and pageflip execution which
      could cause pageflips to execute before the scheduled target vblank.
      
      The lb_vblank_lead_lines "fudge" value is calculated as the size of
      the display controllers line buffer in scanlines for the given video
      mode: Vblank irq's are triggered by the line buffer logic when the line
      buffer refill for a video frame ends, ie. when the line buffer source read
      position enters the hw vblank. This means that a vblank irq could fire at
      most as many scanlines before the current reported scanout position of the
      crtc timing generator as the number of scanlines the line buffer can
      maximally hold for a given video mode.
      
      This patch has been successfully tested on a RV730 card with DCE-3 display
      engine and on a evergreen card with DCE-4 display engine, in single-display
      and dual-display configuration, with different video modes.
      
      A similar patch is needed for amdgpu-kms to fix the same problem.
      
      Limitations:
      
      - Line buffer sizes in pixels are hard-coded on < DCE-4 to a value
        i just guessed to be high enough to work ok, lacking info on the true
        sizes atm.
      
      Fixes: fdo#93147
      Signed-off-by: NMario Kleiner <mario.kleiner.de@gmail.com>
      Cc: Alex Deucher <alexander.deucher@amd.com>
      Cc: Michel Dänzer <michel.daenzer@amd.com>
      Cc: Harry Wentland <Harry.Wentland@amd.com>
      Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
      
      (v1) Tested-by: Dave Witbrodt <dawitbro@sbcglobal.net>
      
      (v2) Refine radeon_flip_work_func() for better efficiency:
      
           In radeon_flip_work_func, replace the busy waiting udelay(5)
           with event lock held by a more performance and energy efficient
           usleep_range() until at least predicted true start of hw vblank,
           with some slack for scheduler happiness. Release the event lock
           during waits to not delay other outputs in doing their stuff, as
           the waiting can last up to 200 usecs in some cases.
      
           Retested on DCE-3 and DCE-4 to verify it still works nicely.
      
      (v2) Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
      Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
      5b5561b3
  19. 24 11月, 2015 1 次提交
  20. 06 10月, 2015 1 次提交
    • T
      drm/irq: Use unsigned int pipe in public API · 88e72717
      Thierry Reding 提交于
      This continues the pattern started in commit cc1ef118 ("drm/irq:
      Make pipe unsigned and name consistent"). This is applied to the public
      APIs and driver callbacks, so pretty much all drivers need to be updated
      to match the new prototypes.
      
      Cc: Christian König <christian.koenig@amd.com>
      Cc: Alex Deucher <alexander.deucher@amd.com>
      Cc: Russell King <rmk+kernel@arm.linux.org.uk>
      Cc: Inki Dae <inki.dae@samsung.com>
      Cc: Jianwei Wang <jianwei.wang.chn@gmail.com>
      Cc: Alison Wang <alison.wang@freescale.com>
      Cc: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
      Cc: Daniel Vetter <daniel.vetter@intel.com>
      Cc: Jani Nikula <jani.nikula@linux.intel.com>
      Cc: Philipp Zabel <p.zabel@pengutronix.de>
      Cc: David Airlie <airlied@linux.ie>
      Cc: Rob Clark <robdclark@gmail.com>
      Cc: Ben Skeggs <bskeggs@redhat.com>
      Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
      Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
      Cc: Mark Yao <mark.yao@rock-chips.com>
      Cc: Benjamin Gaignard <benjamin.gaignard@linaro.org>
      Cc: Vincent Abriou <vincent.abriou@st.com>
      Cc: Thomas Hellstrom <thellstrom@vmware.com>
      Signed-off-by: NThierry Reding <treding@nvidia.com>
      Reviewed-by: NVille Syrjälä <ville.syrjala@linux.intel.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      88e72717
  21. 03 10月, 2015 1 次提交
  22. 25 9月, 2015 1 次提交
  23. 20 3月, 2015 2 次提交
  24. 03 2月, 2015 1 次提交
  25. 21 11月, 2014 1 次提交
  26. 05 11月, 2014 1 次提交
  27. 03 10月, 2014 1 次提交
  28. 11 9月, 2014 1 次提交
  29. 02 9月, 2014 1 次提交
  30. 01 9月, 2014 1 次提交
  31. 28 8月, 2014 1 次提交
  32. 05 8月, 2014 3 次提交
    • M
      drm/radeon: Use pflip irqs for pageflip completion if possible. (v2) · 39dc5454
      Mario Kleiner 提交于
      Skip the "manual" pageflip completion checks via polling and
      guessing in the vblank handler radeon_crtc_handle_vblank() on
      asics which are known to reliably support hw pageflip completion
      irqs. Those pflip irqs are a more reliable and race-free method
      of handling pageflip completion detection, whereas the "classic"
      polling method has some small races in combination with dpm on,
      and with the reworked pageflip implementation since Linux 3.16.
      
      On old asics without pflip irqs, the classic method is used.
      
      On asics with known good pflip irqs, only pflip irqs are used
      by default, but a new module parameter "use_pflipirqs" allows to
      override this in case we encounter asics in the wild with
      unreliable or faulty pflip irqs. A module parameter of 0 allows
      to use the classic method only in such a case. A parameter of 1
      allows to use both classic method and pflip irqs as additional
      band-aid to avoid some small races which could happen with the
      classic method alone. The setting 1 gives Linux 3.16 behaviour.
      
      Hw pflip irqs are available since R600.
      
      Tested on DCE-4, AMD Cedar - FirePro 2270.
      
      v2:  agd5f: only enable pflip interrupts on DCE4+ as they are not
      reliable on older asics.
      Signed-off-by: NMario Kleiner <mario.kleiner.de@gmail.com>
      Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
      39dc5454
    • A
      drm/radeon: use a fetch function to get the edid · 377bd8a9
      Alex Deucher 提交于
      We keep a cached version of the edid in radeon_connector which
      we use for determining connectedness and when to enable certain
      features like hdmi audio, etc.  When the user uses the firmware
      interface to override the driver with some other edid the driver's
      copy is never updated.  The fetch function will check if there
      is a user supplied edid and update the driver's copy if there
      is.
      
      bug:
      https://bugs.freedesktop.org/show_bug.cgi?id=80691Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
      377bd8a9
    • A
      drm/radeon: restructure edid fetching · 72a5c970
      Alex Deucher 提交于
      Split radeon_ddc_get_modes() and move it into
      radeon_connectors.c since that is the only place
      that uses it.
      Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
      72a5c970
  33. 17 7月, 2014 2 次提交