The D9 LED controlled by gpio on the imx6qdl-sabreauto
CPU board is a debug LED according to the board design.
This patch adds the relevant device tree nodes to the
imx6qdl-sabreauto device tree file to support this LED.
Signed-off-by: NLiu Ying <Ying.Liu@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

mx6 sabreauto boards have Freescale PFUZE100 regulator, so add support for it.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Add LVDS support for mx6 sabreauto boards.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

This works around a hardware bug.
Signed-off-by: NTroy Kisky <troy.kisky@boundarydevices.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

This patch adds spdif support for imx6qdl-sabreauto by inserting the cpu dai
node with pinctrl group and its ASoC dai link node.
Signed-off-by: NNicolin Chen <Guangyu.Chen@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Currently, all pinctrl setting nodes are defined in <soc>.dtsi, so that
boards that share the same pinctrl setting do not have to define it time
and time again in <board>.dts.  However, along with the devices and use
cases being added continuously, the pinctrl setting nodes under iomuxc
becomes more than expected.  This bloats device tree blob for particular
board unnecessarily since only a small subset of those pinctrl setting
nodes will be used by the board.  It impacts not only the DTB file size
but also the run-time device tree lookup efficiency.

The patch moves all the pinctrl data into individual boards as needed.
With the changes, the pinctrl setting nodes becomes local to particular
board, and it makes no sense to continue numbering the setting for
given peripheral.  Thus, all the pinctrl phandler name gets updated to
have only peripheral name in there.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

This is needed for supporting ultra high speed cards like SD3.0 cards.
Signed-off-by: NDong Aisheng <b29396@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

The imx6q and imx6dl are two pin-to-pin compatible SoCs.  The same board
design can work with either chip plugged into the socket, e.g. sabresd
and sabreauto boards.

We currently define pin groups in imx6q.dtsi and imx6dl.dtsi
respectively because the pad macro names are different between two
chips.  This brings a maintenance burden on having the same label point
to the same pin group defined in two places.

The patch replaces prefix MX6Q_ and MX6DL_ with MX6QDL_ for both SoCs
pad macro names.  Then the pin groups becomes completely common between
imx6q and imx6dl and can just be moved into imx6qdl.dtsi, so that the
long term maintenance of imx6q/dt pin settings becomes easier.

Unfortunately, the change brings some dramatic diff stat, but it's all
about DTS file, and the ultimate net diff stat is good.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Enable the WEIM NOR for imx6q{dl}-sabreauto boards.

For the pin conflict with SPI NOR, its status is set to "disabled".
Signed-off-by: NHuang Shijie <b32955@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

In the imx6q-sabreauto and imx6dl-sabreauto boards,
the pin MX6Q{DL}_PAD_EIM_D19 is used as a GPIO for SPI NOR, but
it is used as a data pin for the WEIM NOR.

In order to fix the conflict, this patch removes the pin from the hog,
and adds a new board-level pinctrl: pinctrl_ecspi1_sabreauto.

The SPI NOR selects this pinctrl_ecspi1_sabreauto when it is enabled.
Signed-off-by: NHuang Shijie <b32955@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Since the SPI/NOR has pin conflict with the WEIM NOR,
we disable the spi/nor by default.
Signed-off-by: NHuang Shijie <b32955@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

enable the gpmi-nand for imx6q-sabreauto and imx6qdl-sabreauto boards.
Signed-off-by: NHuang Shijie <b32955@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

The sabreauto and sabresd boards are common for imx6q and imx6dl.
Create imx6qdl-sabreauto.dtsi and imx6qdl-sabresd.dtsi for those
common parts.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Currently, all imx pinctrl drivers maintain a big array of struct
imx_pin_reg which hard-codes data like register offset and mux mode
setting for each pin function.  Every time a new imx SoC support is
added, we need to add such a big mount of data.  With moving to single
kernel build, it's only matter of time to be blamed on memory consuming.

With DTC pre-processor support in place, the patch moves all these data
into device tree by redefining the PIN_FUNC_ID in imxXX-pinfunc.h and
changing the PIN_FUNC_ID parsing code a little bit.

The pin id gets re-numbered based on mux register offset, or config
register offset if the pin has no mux register, so that kernel can
identify the pin id from register offsets provided by device tree.

As a bonus point of the change, those arbitrary magic numbers standing
for particular PIN_FUNC_ID in device tree sources are now replaced by
macros to improve the readability of dts files.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
Acked-by: NDong Aisheng <dong.aisheng@linaro.org>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>

Replace /include/ (dtc) with #include (C pre-processor) for all imx DT
files, so that gcc -E handles the entire include tree, and hence any of
those files can #include some other file e.g. for constant definitions.

This allows future use of #defines and header files in order to define
names for various constants, such as pinctrl settings. Use of those
features will increase the readability of the device tree files.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Add dtsi for imx6q and imx6dl with non-common blocks moved into there.
Major differences between imx6dl and imx6q:

 * Dual vs. Quad cores
 * single vs. dual IPU
 * 128 vs. 256 KB OCRAM
 * imx6q: ECSPI5, OpenVG (GC355), SATA
 * imx6dl: I2C4, PXP, EPDC, LCDIF
 * iomuxc/pads definition
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

i.MX6 Quad and i.MX6 DualLite is similar enough to share one dtsi
file, so rename imx6q.dtsi to imx6qdl.dtsi preparing for the addition
of imx6dl support.

Another member of i.MX6 series i.MX6 SoloLite is different enough
from the other two, so it will stand as a separate dtsi.  That's why
we rename to imx6qdl.dtsi not imx6.dtsi.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Following omap3-evm.dts way, it changes all imx dts files to use label
in board dts to refer to nodes defined by soc dtsi.  Thus, the board
dts files become easier to read and edit with the least indentation
levels.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

mx6qsabreauto is a board based on mx6q SoC with the following features:
- 2GB of DDR3
- 2 USB ports
- 1 HDMI output port
- SPI NOR
- 2 LVDS LCD ports
- Gigabit Ethernet
- Camera
- eMMC and SD card slot
- Multichannel Audio
- CAN
- SATA
- NAND
- PCIE
- Video Input

Add very basic support for it.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Add pinctrl settings for existing devices in imx6q-sabresd.dts.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>

Add basic support for imx6q-sabresd.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>