1. 07 12月, 2012 12 次提交
  2. 29 11月, 2012 1 次提交
    • A
      OMAPDSS: Use only "omapdss_dss" platform device to get context lost count · bdb736ab
      Archit Taneja 提交于
      When enabling a hwmod, omap_hwmod refers to the register mentioned in the
      hwmod struct's member 'prcm.omap4.context_offs' to see whether context was
      lost or not. It increments the context lost count for the hwmod and then clears
      the register.
      
      All the DSS hwmods have the same register(RM_DSS_DSS_CONTEXT) as context_offs.
      When DSS is enabled, the first hwmod to be enabled is the "dss_core" hwmod since
      it's corresponding platform device is the parent platform device("omapdss_dss").
      The dss_core hwmod updates it's context lost count correctly and clears the
      register. When the hwmods corresponding to the children platform devices are
      enabled, they see that the register is clear, and don't increment their context
      lost count. Therefore, all the children platform devices never report a loss in
      context.
      
      The DISPC driver currently gets the context lost count for DSS power domain from
      it's corresponding platform device instance("omapdss_dispc"). The DISPC platform
      device is one of the child devices, and it's corresponding hwmod("dss_dispc")
      doesn't report the context lost count correctly.
      
      Modify dss_get_ctx_loss_count() such that it always takes the "omapdss_dss"
      platform device as it's input, move the function to dss.c so that it has access
      to that platform device.
      Signed-off-by: NArchit Taneja <archit@ti.com>
      Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
      bdb736ab
  3. 27 11月, 2012 4 次提交
  4. 05 11月, 2012 2 次提交
    • T
      OMAPDSS: hide dss_select_dispc_clk_source() · a5b8399f
      Tomi Valkeinen 提交于
      dss.c currently exposes functions to configure the dispc source clock
      and lcd source clock. There are configured separately from the output
      drivers.
      
      However, there is no safe way for the output drivers to handle dispc
      clock, as it's shared between the outputs. Thus, if, say, the DSI driver
      sets up DSI PLL and configures both the dispc and lcd clock sources to
      that DSI PLL, the resulting dispc clock could be too low for, say, HDMI.
      
      Thus the output drivers should really only be concerned about the lcd
      clock, which is what the output drivers actually use. There's lot to do
      to clean up the dss clock handling, but this patch takes one step
      forward and removes the use of dss_select_dispc_clk_source() from the
      output drivers.
      
      After this patch, the output drivers only configure the lcd source
      clock. On omap4+ the dispc src clock is never changed from the default
      PRCM source. On omap3, where the dispc and lcd clocks are actually the
      same, setting the lcd clock source sets the dispc clock source.
      Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
      a5b8399f
    • T
      OMAPDSS: add dss_calc_clock_rates() back · 930b027e
      Tomi Valkeinen 提交于
      dss_calc_clock_rates() was removed earlier as it was not used, but it is
      needed for DSI PLL calculations, so this patch adds it back.
      Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
      930b027e
  5. 29 10月, 2012 6 次提交
  6. 24 10月, 2012 1 次提交
  7. 18 10月, 2012 5 次提交
  8. 12 10月, 2012 4 次提交
  9. 26 9月, 2012 5 次提交
    • A
      OMAPDSS: DISPC: Add manager like functions for writeback · 0b23e5b8
      Archit Taneja 提交于
      Add functions to enable writeback, and set/check state of GO bit. These bits are
      identical in behaviour with the corresponding overlay manager bits. Configure
      them in a similar way to mgr_enable() and mgr_go_* functions. Add a helper to
      get the FRAMEDONE irq corresponding to writeback.
      Signed-off-by: NArchit Taneja <archit@ti.com>
      0b23e5b8
    • A
      OMAPDSS: DISPC: Configure writeback specific parameters in dispc_wb_setup() · 9e4a0fc7
      Archit Taneja 提交于
      Configure some of the writeback specific parameters in dispc_wb_setup(). The
      writeback parameters configured are:
      
      truncation: This needs to be set if the color depth input to writeback is more
      than the color depth of the color mode we want to store in memory.
      
      writeback mode: This configures whether we want to use writeback in mem to mem
      or capture mode. This information will be directly passed by APPLY later.
      Signed-off-by: NArchit Taneja <archit@ti.com>
      9e4a0fc7
    • A
      OMAPDSS: DISPC: Configure overlay-like parameters in dispc_wb_setup · 749feffa
      Archit Taneja 提交于
      Create struct omap_dss_writeback_info, this is similar to omap_overlay_info,
      the major difference is that there is no parameter which describes the input
      size to writeback, this is because this is always fixed, and decided by the
      connected overlay or overlay manager. One more difference is that screen_width
      is renamed to buf_width, to give the value of stride the writeback buffer has.
      
      Call dispc_ovl_setup_common() through dispc_wb_setup() to configure overlay-like
      parameters. The parameters in dispc_ovl_setup_common() which do not hold for
      writeback are filled passed as zeroes or false, the code takes care of not
      configuring them as they won't possess the needed overlay caps.
      Signed-off-by: NArchit Taneja <archit@ti.com>
      749feffa
    • A
      OMAPDSS: DISPC: Add function to set channel in for writeback · d9ac773c
      Archit Taneja 提交于
      Writeback can take input from either one of the overlays, or one of the overlay
      managers. Add an enum which represents the channel_in for writeback, and maps
      to the register field programming.
      
      Add a function to configure channel in for writeback. This will be used later in
      APPLY.
      Signed-off-by: NArchit Taneja <archit@ti.com>
      d9ac773c
    • A
      OMAPDSS: DIPSC: Relax scaling limitations when in memory to memory mode · 8ba85306
      Archit Taneja 提交于
      The scalers of overlays and writeback do not have any constraints on downscale
      ratio when operating in memory to memory mode.
      
      This is because in memory to memory mode, we aren't connected to a display which
      needs data output at the rate of pixel clock. The scalers can perform as much
      downscaling as needed, the rate at which the scaler outputs is adjusted
      accordingly.
      
      Relax constraints related to downscaling based on whether the input overlays are
      connected to writeback in memory to memory mode. We pass a mem_to_mem boolean
      parameter to dispc_ovl_setup() from APPLY. This is currently set to false, this
      will later be configured to the correct value based on whether the overlay is
      connected to writeback or not. Do the same later for writeback when writeback is
      configured.
      
      In the scaling calculation code, we calculate the minimum amount of core clock we
      need to achieve the required downscaling. If we are in memory to memory mode, we
      set this to a very small value(1 in this case), this value would always be
      lesser than the actual DISPC core clock value, and hence the scaling checks
      would succeed.
      
      We take care that pixel clock isn't calculated for writeback and the overlays
      connected to it when in memory to memory mode. A pixel clock in such cases
      doesn't make sense.
      Signed-off-by: NArchit Taneja <archit@ti.com>
      8ba85306