In some bootloader, IRQ is enabled. Writing nand triggers unexpected
interrupts. So disable nand irq in initialization. After nand
initialized and in working state, irq is controlled by nand driver.
Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Nand driver uses IRQ_NAND as hardcode irq number. In ARCH_MMP, the irq
number is different. So get irq resource from platform device structure
and use it in initialization and deinitialization code.
Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Although nand controller is same between PXA3xx and MMP, the register space
is different. Remove the hardcode register address setting in pxa3xx_nand.h.
Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Slow down the tRp of Micron NAND flash timing.
Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Initialize the read buffer content to 0xFF.
Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

When fetch nand data with non-DMA mode, we should align info->data_size to
32bit, not 8bit.
Signed-off-by: NHaojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: NEric Miao <eric.y.miao@gmail.com>

Fixed following htmldocs warnings:

  DOCPROC Documentation/DocBook/mtdnand.xml
  Warning(drivers/mtd/nand/nand_base.c:769): No description found for parameter 'page'
  Warning(drivers/mtd/nand/nand_base.c:785): No description found for parameter 'page'
  Warning(drivers/mtd/nand/nand_base.c:824): No description found for parameter 'page'
  Warning(drivers/mtd/nand/nand_base.c:947): No description found for parameter 'page'
  Warning(drivers/mtd/nand/nand_base.c:996): No description found for parameter 'page'
  Warning(drivers/mtd/nand/nand_base.c:1040): No description found for parameter 'page'
Signed-off-by: NJaswinder Singh Rajput <jaswinderrajput@gmail.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Trivial patch which adds the __init and __exit macros to the module_init /
module_exit functions to the following modules from drivers/mtd/
 devices/m25p80.c
 devices/slram.c
 linux version 2.6.30
 ftl.c
 nand/cafe_nand.c
 nand/cmx270_nand.c
Signed-off-by: NPeter Huewe <peterhuewe@gmx.de>
Signed-off-by: NJiri Kosina <jkosina@suse.cz>

Signed-off-by: NAlessandro Rubini <rubini@unipv.it>
Acked-by: NAndrea Gallo <andrea.gallo@stericsson.com>
Acked-by: NRussell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

As with orion_nand in commit f33dabbe
("register orion_nand using platform_driver_probe()"), avoid .init.text
problems by using platform_device_probe(). This isn't going to be
hotplugged anyway.
Reported-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Using __nand_correct_data() helper function, this driver can read 512
byte (with 6 byte ECC) at a time.  This results minor performance
improvement.
Signed-off-by: NAtsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This driver may be reading 512 bytes at a times, but still calculates
256-byte sector ECC.  So the nand_correct_data() is not appropriate
for this driver.  Implement its ecc.correct function calling
__nand_correct_data() twice.
Signed-off-by: NAtsushi Nemoto <anemo@mba.ocn.ne.jp>
Acked-by: NDmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Acked-by: NVimal Singh <vimalsingh@ti.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Split nand_correct_data() into two part, a pure calculation function
and a wrapper for mtd interface.

The tmio_nand driver can implement its ecc.correct function easily
using this __nand_correct_data helper.
Signed-off-by: NAtsushi Nemoto <anemo@mba.ocn.ne.jp>
Acked-by: NDmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Acked-by: NVimal Singh <vimalsingh@ti.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Fix ECC Correction bug where the byte offset location were double
fliped causing correction routine to toggle the wrong byte location
in the ECC segment. The ndfc_calculate_ecc routine change the order
of getting the ECC code.
        /* The NDFC uses Smart Media (SMC) bytes order */
        ecc_code[0] = p[2];
        ecc_code[1] = p[1];
        ecc_code[2] = p[3];
But in the Correction algorithm when calculating the byte offset
location, the b1 is used as the upper part of the address. Which
again reverse the order making the final byte offset address
location incorrect.
	byte_addr = (addressbits[b1] << 4) + addressbits[b0];
The order is change to read it in straight and let the correction
function to revert it to SMC order.

Cc: stable@kernel.org
Signed-off-by: NFeng Kan <fkan@amcc.com>
Acked-by: NVictor Gallardo <vgallardo@amcc.com>
Acked-by: NProdyut Hazarika <phazarika@amcc.com>
Acked-by: NStefan Roese <sr@denx.de>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This patch adds DMA mode support for nand prefetch/post-write engine.
Signed-off-by: NVimal Singh <vimalsingh@ti.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This patch adds prefetch support to access nand flash in mpu mode.
This patch also adds 8-bit nand support (omap_read/write_buf8).
Prefetch can be used for both 8- and 16-bit devices.
Signed-off-by: NVimal Singh <vimalsingh@ti.com>
Acked-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Add w90p910 NAND driver for w90p910 evaluation board
based on w90p910,there is a K8F1G08 NAND on my board.

[dwmw2: depend on MTD_PARTITIONS]
Signed-off-by: NWan ZongShun <mcuos.com@gmail.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Acked-by: NEric Miao <eric.y.miao@gmail.com>
Signed-off-by: NYeasah Pell <yeasah@comrex.com>
Signed-off-by: NMike Rapoport <mike@compulab.co.il>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This patch allows i.MX27 to support 2KiB pagesize NAND flash.
We are using a 1.8V NAND flash which datasheet (unfortunately only
available under NDA) says :
Page size: x8: 2,112 bytes (2,048 + 64 bytes).
Without this patch, all sectors are marked as bad eraseblock.
Signed-off-by: NEric Benard <ebenard@eukrea.com>
Acked-by : Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This patch adds 4-bit ECC support for large page NAND chips using the new
ECC mode NAND_ECC_HW_OOB_FIRST.  The platform data from board-dm355-evm
has been adjusted to use this mode.

The patches have been verified on DM355 device with 2KiB-page Micron
devices using mtd-tests and JFFS2.  Error correction up to 4 bits has
also been verified using nandwrite/nanddump utilities.
Reviewed-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: NSneha Narnakaje <nsnehaprabha@ti.com>
Signed-off-by: NSandeep Paulraj <s-paulraj@ti.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Troy Kisky <troy.kisky@boundarydevices.com>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This patch adds the new mode NAND_ECC_HW_OOB_FIRST in the nand code to
support 4-bit ECC on TI DaVinci devices with large page (up to 2KiB) NAND
chips.  This ECC mode is similar to NAND_ECC_HW, with the exception of
read_page API that first reads the OOB area, reads the data in chunks,
feeds the ECC from OOB area to the ECC hw engine and perform any
correction on the data as per the ECC status reported by the engine.

"ECC_HW_OOB_FIRST" name suggested by Thomas Gleixner
Reviewed-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: NSneha Narnakaje <nsnehaprabha@ti.com>
Signed-off-by: NSandeep Paulraj <s-paulraj@ti.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This patch adds a new "page" parameter to all NAND read_page/read_page_raw
APIs.  The read_page API for the new mode ECC_HW_OOB_FIRST requires the
page information to send the READOOB command and read the OOB area before
the data area.
Reviewed-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: NSneha Narnakaje <nsnehaprabha@ti.com>
Signed-off-by: NSandeep Paulraj <s-paulraj@ti.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

orion_nand_probe lives in .init.text, so using platform_driver_register to
register it is wrong because binding a device after the init memory is
discarded (e.g.  via sysfs) results in an oops.

As requested by Nicolas Pitre platform_driver_probe is used instead of
moving the probe function to .devinit.text as proposed initially.  This
saves some memory, but devices registered after the driver is probed are
not bound (probably there are none) and binding via sysfs isn't possible.
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: Lennert Buytenhek <buytenh@marvell.com>
Cc: Saeed Bishara <saeed@marvell.com>
Cc: Joern Engel <joern@logfs.org>
Acked-by: NNicolas Pitre <nico@marvell.com>
Cc: Greg Kroah-Hartman <gregkh@suse.de>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This patch allows core driver to choose ECC block size in
sw ecc case.
Signed-off-by: NVimal Singh <vimalsingh@ti.com>
Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

1. <linux/io.h> should be included not <asm/io.h>
2. add platform specific header <mach/ts72xx.h>
Signed-off-by: NH Hartley Sweeten <hsweeten@visionengravers.com>
Cc: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Correcting debug prints by removing function names from print messages
and using '__func__' macro instead.

Function names were wrong in few places.
Signed-off-by: NVimal Singh <vimalsingh@ti.com>
Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Singed-off-by: NVimal Singh <vimalsingh@ti.com>
Signed-off-by: NArtem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Rename OMAP_MPUIO_BASE to OMAP1_MPUIO_BASE
Signed-off-by: NTony Lindgren <tony@atomide.com>

GCC 4.3.3 and 4.4.1 happily moves the dword load instruction out of the
loop in orion_nand_read_buf. This patch makes the instruction volatile
to avoid the issue. I've discussed this at gcc-help, refer to the thread
at

  http://gcc.gnu.org/ml/gcc-help/2009-08/msg00187.html

The early clobber is added to avoid the destination registers and the
source register overlapping.
Signed-off-by: NSimon Kagstrom <simon.kagstrom@netinsight.net>
Signed-off-by: NNicolas Pitre <nico@marvell.com>

arch/arm/mach-ep93xx/include/mach/hardware.h
  1. Properly name the include files so that they are loaded
     from the <mach/*> directory and not the local directory.
  2. Remove including the ts72xx.h header.  This header is not
     generic to the ep93xx platform.  It should only be included
     by the ts72xx specific files that require it.  The only
     two users in the tree are arch/arm/mach-ep93xx/ts72xx.c
     and drivers/mtd/nand/ts7250.c.

arch/arm/mach-ep93xx/include/mach/ts72xx.h
  1. <linux/io.h> should already be included by any user of this
     header.  Doing the include here hides it from being needed
     by the calling source file.

arch/arm/mach-ep93xx/core.c
  1. Remove unnecessary headers.  They were probably included
     originally due to cut-and-paste from other files.
  2. <linux/io.h> should be included not <mach/gpio.h>

arch/arm/mach-ep93xx/adsphere.c
arch/arm/mach-ep93xx/edb93xx.c
arch/arm/mach-ep93xx/gesbc9312.c
arch/arm/mach-ep93xx/micro9.c
arch/arm/mach-ep93xx/ts72xx.c
  1. Remove unnecessary headers.

arch/arm/mach-ep93xx/ts72xx.c
  1. Remove unnecessary headers.
  2. Add platform specific header <mach/ts72xx.h>.

drivers/mtd/nand/ts7250.c
  1. <linux/io.h> should be included not <asm/io.h>.
  2. Add platform specific header <mach/ts72xx.h>.

Cc: Ryan Mallon <ryan@bluewatersys.com>
Signed-off-by: NH Hartley Sweeten <hsweeten@visionengravers.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

We need to include jiffies.h manually in some cases, and the status
returned from omap_wait() was broken in two separate ways.

Also add cond_resched() to the loop.
Signed-off-by: NVimal Singh <vimalsingh@ti.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Signed-off-by: NThadeu Lima de Souza Cascardo <cascardo@holoscopio.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

.ko is normally not included in Kconfig help, make it consistent.
Signed-off-by: NPavel Machek <pavel@ucw.cz>
Signed-off-by: NJiri Kosina <jkosina@suse.cz>

Commit 81933046 ('mtd: Fix handling of
mtdname in txx9ndfmc.c') introduced a potential memory leak. The
'mtdname' member of the private data structure is now allocated
separately, but was not freed on certain error paths.

Fix that, and make things simpler by _always_ allocating it separately
so that we don't need 'if (mtdname != dev_name()) kfree(mtdname);'...
which gets ugly now that we're doing it more than once, and more likely
that we'll get it wrong some time.
Signed-off-by: NAtsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

This is not 8 times faster than byte access, but still around 60% faster.
Signed-off-by: NNicolas Pitre <nico@marvell.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Add s3c6400 support to the s3c2410 driver. The nand controller in
the s3c64xx devices is compatible with the one in the s3c2412, so
simply reuse that code.
Signed-off-by: NPeter Korsgaard <jacmet@sunsite.dk>
Acked-by: NBen Dooks <ben-linux@fluff.org>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

Change to using DIV_ROUND_UP() in the timing calculation
instead of blindly doing result++
Signed-off-by: NBen Dooks <ben-linux@fluff.org>

Add code to deal with fractional lengths, as reported by
Werner Almesberger. Re-work of his original patch.
Signed-off-by: NBen Dooks <ben-linux@fluff.org>

Added a flag to allow the machine code to tell the NAND
subsystem that it should try to pickup a BBT from the flash,
and also skip the NAND full scan at startup.
Signed-off-by: NMichel Pollet <buserror@gmail.com>
Signed-off-by: NBen Dooks <ben-linux@fluff.org>

with `while (max_retries-- > 0)' max_retries reaches -1 after the loop.
Signed-off-by: NRoel Kluin <roel.kluin@gmail.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>