1. 26 4月, 2013 3 次提交
    • J
      drm/i915: move PCH pfit controls into pipe_config · b074cec8
      Jesse Barnes 提交于
      And put the pfit stuff into substructs while we're at it.
      Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      Reviewed-by: NMika Kuoppala <mika.kuoppala@intel.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      b074cec8
    • J
      drm/i915: factor out GMCH panel fitting code and use for eDP v3 · 2dd24552
      Jesse Barnes 提交于
      This gets the panel fitter working on eDP on VLV, and should also apply
      to eDP panels on G4x chipsets (if we ever detect and mark an all-in-one
      panel as eDP anyway).
      
      A few cleanups are still possible on top of this, for example the LVDS
      border control could be placed in the LVDS encoder structure and updated
      based on the result of the panel fitter calculation.
      
      Multi-pipe fitting isn't handled correctly either if we ever get a config
      that wants to try the panel fitter on more than one output at a time.
      
      v2: use pipe_config for storing pfit values (Daniel)
          add i9xx_pfit_enable function for use by 9xx and VLV (Daniel)
      v3: fixup conflicts and lvds_dither check
      Reviewed-by: NMika Kuoppala <mika.kuoppala@intel.com>
      Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      [danvet: fix up botched conflict resolution from Jesse:
      - border = LVDS_BORDER_ENABLE was lost for CENTER scaling
      - comment about gen2/3 panel fitter scaling was lost
      - dev_priv->lvds_dither reintroduced.]
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      2dd24552
    • D
      drm/i915: use pipe_config for lvds dithering · d8b32247
      Daniel Vetter 提交于
      Up to now we've relied on the bios to get this right for us. Let's try
      out whether our code has improved a bit, since we should dither
      always when the output bpp doesn't match the plane bpp.
      - gen5+ should be fine, since we only use the bios hint as an upgrade.
      - gen4 changes, since here dithering is still controlled in the lvds
        register.
      - gen2/3 has implicit dithering depeding upon whether you use 2 or 3
        lvds pairs (which makes sense, since it only supports 8bpc pipe
        outpu configurations).
      - hsw doesn't support lvds.
      
      v2: Remove redudant dither setting.
      
      v3: Completly drop reliance on dev_priv->lvds_dither.
      
      v4: Enable dithering on gen2/3 only when we have a 18bpp panel, since
      up-dithering to a 24bpp panel is not supported by the hw. Spotted by
      Ville.
      
      v5: Also only enable lvds port dithering on gen4 for 18bpp modes. In
      practice this only excludes dithering a 10bpc plane down for a 24bpp
      lvds panel. Not something we truly care about. Again noticed by Ville.
      
      v6: Actually git add.
      
      Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
      Reviewed-by: NVille Syrjälä <ville.syrjala@linux.intel.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      d8b32247
  2. 18 4月, 2013 2 次提交
  3. 06 4月, 2013 1 次提交
  4. 28 3月, 2013 3 次提交
    • D
      drm/i915: precompute pipe bpp before touching the hw · 4e53c2e0
      Daniel Vetter 提交于
      The procedure has now 3 steps:
      
      1. Compute the bpp that the plane will output, this is done in
         pipe_config_set_bpp and stored into pipe_config->pipe_bpp. Also,
         this function clamps the pipe_bpp to whatever limit the EDID of any
         connected output specifies.
      2. Adjust the pipe_bpp in the encoder and crtc functions, according to
         whatever constraints there are.
      3. Decide whether to use dither by comparing the stored plane bpp with
         computed pipe_bpp.
      
      There are a few slight functional changes in this patch:
      - LVDS connector are now also going through the EDID clamping. But in
        a 2nd change we now unconditionally force the lvds bpc value - this
        shouldn't matter in reality when the panel setup is consistent, but
        better safe than sorry.
      - HDMI now forces the pipe_bpp to the selected value - I think that's
        what we actually want, since otherwise at least the pixelclock
        computations are wrong (I'm not sure whether the port would accept
        e.g. 10 bpc when in 12bpc mode). Contrary to the old code, we pick
        the next higher bpc value, since otherwise there's no way to make
        use of the 12 bpc mode (since the next patch will remove the 12bpc
        plane format, it doesn't exist).
      
      Both of these changes are due to the removal of the
      
      	pipe_bpp = min(display_bpp, plane_bpp);
      
      statement.
      
      Another slight change is the reworking of the dp bpc code:
      - For the mode_valid callback it's sufficient to only check whether
        the mode would fit at the lowest bpc.
      - The bandwidth computation code is a bit restructured: It now walks
        all available bpp values in an outer loop and the codeblock that
        computes derived values (once a good configuration is found) has been
        moved out of the for loop maze. This is prep work to allow us to
        successively fall back on bpc values, and also correctly support bpc
        values != 8 or 6.
      
      v2: Rebased on top of Paulo Zanoni's little refactoring to use more
      drm dp helper functions.
      
      v3: Rebased on top of Jani's eDP bpp fix and Ville's limited color
      range work.
      
      v4: Remove the INTEL_MODE_DP_FORCE_6BPC #define, no longer needed.
      
      v5: Remove intel_crtc->bpp, too, and fix up the 12bpc check in the
      hdmi code. Also fixup the bpp check in intel_dp.c, it'll get reworked
      in a later patch though again.
      
      v6: Fix spelling in a comment.
      
      v7: Debug output improvements for the bpp computation.
      
      v8: Fixup 6bpc lvds check - dual-link and 8bpc mode are different
      things!
      
      v9: Reinstate the fix to properly ignore the firmware edp bpp ... this
      was lost in a rebase.
      
      v10: Both g4x and vlv lack 12bpc pipes, so don't enforce that we have
      that. Still unsure whether this is the way to go, but at least 6bpc
      for a 8bpc hdmi output seems to work.
      
      v11: And g4x/vlv also lack 12bpc hdmi support, so only support high
      depth on DP. Adjust the code.
      
      v12: Rebased.
      
      v13: Split out the introduction of pipe_config->dither|pipe_bpp, as
      requested from Jesse Barnes.
      
      v14: Split out the special 6BPC handling for DP, as requested by Jesse
      Barnes.
      Reviewed-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      4e53c2e0
    • D
      drm/i915: add pipe_config->has_pch_encoder · 5bfe2ac0
      Daniel Vetter 提交于
      This is used way too often in the enable/disable paths. And will
      be even more useful in the future.
      
      Note that correct semantics of this change highly depend upon
      correct updating of intel_crtc->config: Like with all other
      modeset state, we need to call ->disable with the old config,
      but ->mode_set and ->enable with the new config.
      
      v2: Do not yet use the flag in the ->disable callbacks - atm we don't
      yet have support for the information stored in the pipe_config in the
      hw state readout code, so this will be wrong at boot-up/resume.
      
      v3: Rebased on top of the hdmi/dp ddi encoder merging.
      
      v4: Fixup stupid rebase error which lead to a NULL vfunc deref.
      
      v5: On haswell the VGA port is on the PCH!
      
      v6: s/IS_HASWELL/HAS_DDI/, spotted by Paulo Zanoni. Also add a missing
      parameter name in a function declaration.
      
      v7: Don't forget to git add ...
      Reviewed-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      5bfe2ac0
    • D
      drm/i915: add pipe_config->timings_set · 7ae89233
      Daniel Vetter 提交于
      Only used by the lvds encoder. Note that we shouldn't do the same
      simple conversion with the FORCE_6BPC flag, since that's much better
      handled by moving all the pipe_bpc computation around.
      
      This requires that we pass the pipe config around to encoders, so
      that they can set special attributes and set constraints. To do so
      introduce a new ->compute_config encoder callback, which is called in
      stead of the drm crtc helper's ->mode_fixup.
      
      To avoid massive churn all over the codebase we don't want to convert
      all existing ->mode_fixup functions. Instead I've opted to convert
      them on an as-needed basis (mostly to cut down on rebase conflicts and
      to have more freedom to experiment around while developing the
      patches).
      Reviewed-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      7ae89233
  5. 18 3月, 2013 1 次提交
  6. 06 3月, 2013 1 次提交
  7. 20 2月, 2013 1 次提交
    • M
      drm/i915: clean up panel fitter handling in lvds · 9d6d9f19
      Mika Kuoppala 提交于
      With the previous patch "drm/i915: disable shared panel fitter for
      pipe" we now disable the panel fitter at the right spot in the modeset
      sequence in the crtc functions on all platforms. Hence the disabling
      in intel_disable_lvds is no longer required and potentially harmful
      (since the plane is still enabled at this point).
      
      Similarly on the enabling side we enable the panel fitter in the lvds
      callback only once the plane is enabled. Which is too late. Hence move
      this into a new intel_pre_enable_lvds callback.
      
      Finally we can ditch lvds_encoder->pfit_dirty - this was required to
      work around the crtc helper semantics, but with the new i915 modeset
      infrastructure we should enable/disable the pfit only when enabling or
      disabling the entire output pipeline. So separate state tracking for
      the pfit is no longer required.
      Signed-off-by: NMika Kuoppala <mika.kuoppala@intel.com>
      [danvet: Bikeshed the commit message a bit to stress that now we
      enable/disable the pfit on i9xx platforms at the right point of time
      compared to the old code.]
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      9d6d9f19
  8. 14 2月, 2013 2 次提交
    • Z
      i915: ignore lid open event when resuming · b8efb17b
      Zhang Rui 提交于
      i915 driver needs to do modeset when
      1. system resumes from sleep
      2. lid is opened
      
      In PM_SUSPEND_MEM state, all the GPEs are cleared when system resumes,
      thus it is the i915_resume code does the modeset rather than intel_lid_notify().
      
      But in PM_SUSPEND_FREEZE state, this will be broken because
      system is still responsive to the lid events.
      1. When we close the lid in Freeze state, intel_lid_notify() sets modeset_on_lid.
      2. When we reopen the lid, intel_lid_notify() will do a modeset,
         before the system is resumed.
      here is the error log,
      
      [92146.548074] WARNING: at drivers/gpu/drm/i915/intel_display.c:1028 intel_wait_for_pipe_off+0x184/0x190 [i915]()
      [92146.548076] Hardware name: VGN-Z540N
      [92146.548078] pipe_off wait timed out
      [92146.548167] Modules linked in: hid_generic usbhid hid snd_hda_codec_realtek snd_hda_intel snd_hda_codec parport_pc snd_hwdep ppdev snd_pcm_oss i915 snd_mixer_oss snd_pcm arc4 iwldvm snd_seq_dummy mac80211 snd_seq_oss snd_seq_midi fbcon tileblit font bitblit softcursor drm_kms_helper snd_rawmidi snd_seq_midi_event coretemp drm snd_seq kvm btusb bluetooth snd_timer iwlwifi pcmcia tpm_infineon i2c_algo_bit joydev snd_seq_device intel_agp cfg80211 snd intel_gtt yenta_socket pcmcia_rsrc sony_laptop agpgart microcode psmouse tpm_tis serio_raw mxm_wmi soundcore snd_page_alloc tpm acpi_cpufreq lpc_ich pcmcia_core tpm_bios mperf processor lp parport firewire_ohci firewire_core crc_itu_t sdhci_pci sdhci thermal e1000e
      [92146.548173] Pid: 4304, comm: kworker/0:0 Tainted: G        W    3.8.0-rc3-s0i3-v3-test+ #9
      [92146.548175] Call Trace:
      [92146.548189]  [<c10378e2>] warn_slowpath_common+0x72/0xa0
      [92146.548227]  [<f86398b4>] ? intel_wait_for_pipe_off+0x184/0x190 [i915]
      [92146.548263]  [<f86398b4>] ? intel_wait_for_pipe_off+0x184/0x190 [i915]
      [92146.548270]  [<c10379b3>] warn_slowpath_fmt+0x33/0x40
      [92146.548307]  [<f86398b4>] intel_wait_for_pipe_off+0x184/0x190 [i915]
      [92146.548344]  [<f86399c2>] intel_disable_pipe+0x102/0x190 [i915]
      [92146.548380]  [<f8639ea4>] ? intel_disable_plane+0x64/0x80 [i915]
      [92146.548417]  [<f8639f7c>] i9xx_crtc_disable+0xbc/0x150 [i915]
      [92146.548456]  [<f863ebee>] intel_crtc_update_dpms+0x5e/0x90 [i915]
      [92146.548493]  [<f86437cf>] intel_modeset_setup_hw_state+0x42f/0x8f0 [i915]
      [92146.548535]  [<f8645b0b>] intel_lid_notify+0x9b/0xc0 [i915]
      [92146.548543]  [<c15610d3>] notifier_call_chain+0x43/0x60
      [92146.548550]  [<c105d1e1>] __blocking_notifier_call_chain+0x41/0x80
      [92146.548556]  [<c105d23f>] blocking_notifier_call_chain+0x1f/0x30
      [92146.548563]  [<c131a684>] acpi_lid_send_state+0x78/0xa4
      [92146.548569]  [<c131aa9e>] acpi_button_notify+0x3b/0xf1
      [92146.548577]  [<c12df56a>] ? acpi_os_execute+0x17/0x19
      [92146.548582]  [<c12e591a>] ? acpi_ec_sync_query+0xa5/0xbc
      [92146.548589]  [<c12e2b82>] acpi_device_notify+0x16/0x18
      [92146.548595]  [<c12f4904>] acpi_ev_notify_dispatch+0x38/0x4f
      [92146.548600]  [<c12df0e8>] acpi_os_execute_deferred+0x20/0x2b
      [92146.548607]  [<c1051208>] process_one_work+0x128/0x3f0
      [92146.548613]  [<c1564f73>] ? common_interrupt+0x33/0x38
      [92146.548618]  [<c104f8c0>] ? wake_up_worker+0x30/0x30
      [92146.548624]  [<c12df0c8>] ? acpi_os_wait_events_complete+0x1e/0x1e
      [92146.548629]  [<c10524f9>] worker_thread+0x119/0x3b0
      [92146.548634]  [<c10523e0>] ? manage_workers+0x240/0x240
      [92146.548640]  [<c1056e84>] kthread+0x94/0xa0
      [92146.548647]  [<c1060000>] ? ftrace_raw_output_sched_stat_runtime+0x70/0xf0
      [92146.548652]  [<c15649b7>] ret_from_kernel_thread+0x1b/0x28
      [92146.548658]  [<c1056df0>] ? kthread_create_on_node+0xc0/0xc0
      
      three different modeset flags are introduced in this patch
      MODESET_ON_LID_OPEN: do modeset on next lid open event
      MODESET_DONE:  modeset already done
      MODESET_SUSPENDED:  suspended, only do modeset when system is resumed
      
      In this way,
      1. when lid is closed, MODESET_ON_LID_OPEN is set so that
         we'll do modeset on next lid open event.
      2. when lid is opened, MODESET_DONE is set
         so that duplicate lid open events will be ignored.
      3. when system suspends, MODESET_SUSPENDED is set.
         In this case, we will not do modeset on any lid events.
      
      Plus, locking mechanism is also introduced to avoid racing.
      Signed-off-by: NZhang Rui <rui.zhang@intel.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      b8efb17b
    • D
      drm/i915: rip out helper->disable noop functions · af5676f1
      Daniel Vetter 提交于
      Now that the driver is in control of whether it needs to disable
      everything at take-over or not, we can rip this all out.
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      af5676f1
  9. 21 1月, 2013 1 次提交
    • D
      drm/i915: use drm_modeset_lock_all · a0e99e68
      Daniel Vetter 提交于
      Two exceptions:
      - debugfs files only read information which is not related to crtc, so
        can stay on the modeset_config lock.
      - Same holds for the edp vdd work in intel_dp.c. Add a corresponding
        WARN_ON and a comment next to the intel_dp struct fields for
        documentation.
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      a0e99e68
  10. 07 1月, 2013 1 次提交
  11. 21 12月, 2012 1 次提交
  12. 29 11月, 2012 6 次提交
  13. 23 11月, 2012 2 次提交
  14. 22 11月, 2012 1 次提交
  15. 27 10月, 2012 1 次提交
  16. 23 10月, 2012 8 次提交
  17. 20 10月, 2012 1 次提交
  18. 03 10月, 2012 2 次提交
  19. 18 9月, 2012 1 次提交
    • D
      drm/i915: fix OOPS in lid_notify · 3b7a89fc
      Daniel Vetter 提交于
      This goes back to
      
      commit c1c7af60
      Author: Jesse Barnes <jbarnes@virtuousgeek.org>
      Date:   Thu Sep 10 15:28:03 2009 -0700
      
          drm/i915: force mode set at lid open time
      
      It was used to fix an issue on a i915GM based Thinkpad X41, which
      somehow clobbered the modeset state at lid close time. Since then
      massive amounts of things changed: Tons of fixes to the modeset
      sequence, OpRegion support, better integration with the acpi code.
      Especially OpRegion /should/ allow us to control the display hw
      cooperatively with the firmware, without the firmware clobbering the
      hw state behind our backs.
      
      So it's dubious whether we still need this.
      
      The second issue is that it's unclear who's responsibility it actually
      is to restore the mode - Chris Wilson suggests to just emit a hotplug
      event and let userspace figure things out.
      
      The real reason I've stumbled over this is that the new modeset code
      breaks drm_helper_resume_force_mode - it OOPSes derefing a NULL vfunc
      pointer. The reason this wasn't caught in testing earlier is that in
      
      commit c9354c85
      Author: Linus Torvalds <torvalds@linux-foundation.org>
      Date:   Mon Nov 2 09:29:55 2009 -0800
      
          i915: fix intel graphics suspend breakage due to resume/lid event
          confusion
      
      logic was added to _not_ restore the modeset state after a resume. And
      since most machines are configured to auto-suspend on lid-close, this
      neatly papered over the issue.
      
      Summarizing, this shouldn't be required on any platform supporting
      OpRegion. And none of the really old machines I have here seem to
      require it either. Hence I'm inclined to just rip it out.
      
      But in case that there are really firmwares out there that clobber the
      hw state, replace it with a call to intel_modset_check_state. This
      will ensure that we catch any issues as soon as they happen.
      
      Cc: Chris Wilson <chris@chris-wilson.co.uk>
      Acked-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      3b7a89fc
  20. 06 9月, 2012 1 次提交