1. 23 2月, 2010 27 次提交
  2. 05 2月, 2010 1 次提交
    • A
      CS5536: apply pci quirk for BIOS SMBUS bug · 73d2eaac
      Andres Salomon 提交于
      The new cs5535-* drivers use PCI header config info rather than MSRs to
      determine the memory region to use for things like GPIOs and MFGPTs.  As
      anticipated, we've run into a buggy BIOS:
      
      [    0.081818] pci 0000:00:14.0: reg 10: [io  0x6000-0x7fff]
      [    0.081906] pci 0000:00:14.0: reg 14: [io  0x6100-0x61ff]
      [    0.082015] pci 0000:00:14.0: reg 18: [io  0x6200-0x63ff]
      [    0.082917] pci 0000:00:14.2: reg 20: [io  0xe000-0xe00f]
      [    0.083551] pci 0000:00:15.0: reg 10: [mem 0xa0010000-0xa0010fff]
      [    0.084436] pci 0000:00:15.1: reg 10: [mem 0xa0011000-0xa0011fff]
      [    0.088816] PCI: pci_cache_line_size set to 32 bytes
      [    0.088938] pci 0000:00:14.0: address space collision: [io 0x6100-0x61ff] already in use
      [    0.089052] pci 0000:00:14.0: can't reserve [io  0x6100-0x61ff]
      
      This is a Soekris board, and its BIOS sets the size of the PCI ISA bridge
      device's BAR0 to 8k.  In reality, it should be 8 bytes (BAR0 is used for
      SMBus stuff).  This quirk checks for an incorrect size, and resets it
      accordingly.
      Signed-off-by: NAndres Salomon <dilinger@collabora.co.uk>
      Tested-by: NLeigh Porter <leigh@leighporter.org>
      Tested-by: NJens Rottmann <JRottmann@LiPPERTEmbedded.de>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      73d2eaac
  3. 01 2月, 2010 1 次提交
  4. 29 1月, 2010 1 次提交
  5. 26 1月, 2010 1 次提交
  6. 05 1月, 2010 5 次提交
    • Y
      PCIe AER: prevent AER injection if hardware masks error reporting · b49bfd32
      Youquan,Song 提交于
      The Correcteable/Uncorrectable Error Mask Registers are used by PCIe AER
      driver which will controls the reporting of individual errors to PCIe RC
      via PCIe error messages.
      
      If hardware masks special error reporting to RC, the aer_inject driver
      should not inject aer error.
      Acked-by: NAndi Kleen <ak@linux.intel.com>
      Signed-off-by: NYouquan, Song <youquan.song@intel.com>
      Acked-by: NYing, Huang <ying.huang@intel.com>
      Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      b49bfd32
    • R
      PCI/PM: Use per-device D3 delays · 1ae861e6
      Rafael J. Wysocki 提交于
      It turns out that some PCI devices require extra delays when changing
      power state from D3 to D0 (and the other way around).  Although this
      is against the PCI specification, we can handle it quite easily by
      allowing drivers to define arbitrary D3 delays for devices known to
      require extra time for switching power states.
      
      Introduce additional field d3_delay in struct pci_dev and use it to
      store the value of the device's D0->D3 delay, in miliseconds.  Make
      the PCI PM core code use the per-device d3_delay unless
      pci_pm_d3_delay is greater (in which case the latter is used).
      [This also allows the driver to specify d3_delay shorter than the
       10 ms required by the PCI standard if the device is known to be able
       to handle that.]
      
      Make the sky2 driver set d3_delay to 150 for devices handled by it.
      
      Fixes http://bugzilla.kernel.org/show_bug.cgi?id=14730 which is a
      listed regression from 2.6.30.
      Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
      Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      1ae861e6
    • D
      PCI: Check the node argument passed to cpumask_of_node · 6be954d1
      David John 提交于
      Commit e0cd5160 "PCI: derive nearby CPUs from device's instead of bus'
      NUMA information" causes an null pointer dereference when reading from
      the sysfs attributes local_cpu* on Intel machines with no ACPI NUMA
      proximity info, since dev->numa_node gets set to -1 for all PCI devices,
      which then gets passed to cpumask_of_node.
      
      Add a check to prevent this.
      Signed-off-by: NDavid John <davidjon@xenontk.org>
      Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      6be954d1
    • Y
      PCI: AER: fix aer inject result in kernel oops · 46256f83
      Youquan,Song 提交于
      If the BIOS does not export _OSC to allow OS take over the PCIe AER, the
      pcie aer driver will not initialize the aer service. However, the
      aer_inject driver does not check this scenario, which results in a kernel
      oops when injecting an aer error into OS.  For example:
      
      BUG: unable to handle kernel NULL pointer dereference at 0000000000000350
      IP: [<ffffffff812e08f7>] _spin_lock_irqsave+0xc/0x23
      PGD 155c41067 PUD 157fe0067 PMD 0
      Oops: 0002 [#1] SMP
      Pid: 5119, comm: aer-inject Not tainted 2.6.32-rc8-mce #2
      RIP: 0010:[<ffffffff812e08f7>]  [<ffffffff812e08f7>] _spin_lock_irqsave+0xc/0x23
      RSP: 0018:ffff880157f81e28  EFLAGS: 00010096
      RAX: 0000000000000296 RBX: 0000000000000000 RCX: 0000000000000100
      RDX: 0000000000010000 RSI: 0000000000000246 RDI: 0000000000000350
      RBP: ffff880157f81e28 R08: 0000000000000004 R09: ffff880157f81dac
      R10: ffff88015a666f60 R11: ffff88015a666f40 R12: ffff88015758cc00
      R13: 0000000000000350 R14: 0000000000000000 R15: 0000000000000100
      FS:  00007f4d4a66e6f0(0000) GS:ffff8800282e0000(0000) knlGS:0000000000000000
      CS:  0010 DS: 0000 ES: 0000 CR0: 000000008005003b
      CR2: 0000000000000350 CR3: 000000015661a000 CR4: 00000000000006e0
      DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000
      DR3: 0000000000000000 DR6: 00000000ffff0ff0 DR7: 0000000000000400
      Process aer-inject (pid: 5119, threadinfo ffff880157f80000, task ffff8801585f4340)
      Stack:
       ffff880157f81e78 ffffffff811b1615 ffff880157f81e78 ffffffff81222823
      Call Trace:
       [<ffffffff811b1615>] aer_irq+0x38/0x117
       [<ffffffff81222823>] ? device_for_each_child+0x5f/0x6f
       [<ffffffffa00967bf>] aer_inject_write+0x409/0x45e [aer_inject]
       [<ffffffff810eb80e>] vfs_write+0xae/0x16a
       [<ffffffff810eb98e>] sys_write+0x47/0x6e
       [<ffffffff8100ba2b>] system_call_fastpath+0x16/0x1b
      RIP  [<ffffffff812e08f7>] _spin_lock_irqsave+0xc/0x23
       RSP <ffff880157f81e28>
      CR2: 0000000000000350
      
      So check the _OSC before assuming that AER is available to the OS.
      Signed-off-by: NYouquan, Song <youquan.song@intel.com>
      Acked-by: NYing, Huang <ying.huang@intel.com>
      Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      46256f83
    • H
      PCI: pcie portdrv: style cleanup · 40da4186
      Hidetoshi Seto 提交于
      No change in logic.
      
      Before:
        drivers/pci/pcie/portdrv_core.c:
          total: 7 errors, 2 warnings, 508 lines checked
        drivers/pci/pcie/portdrv_pci.c:
          total: 4 errors, 2 warnings, 300 lines checked
      
      After:
        drivers/pci/pcie/portdrv_core.c:
          total: 0 errors, 0 warnings, 506 lines checked
        drivers/pci/pcie/portdrv_pci.c:
          total: 0 errors, 0 warnings, 299 lines checked
      Signed-off-by: NHidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
      Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      40da4186
  7. 01 1月, 2010 2 次提交
  8. 17 12月, 2009 2 次提交