1. 06 1月, 2006 1 次提交
  2. 05 1月, 2006 5 次提交
    • D
      [ARM] 3221/1: Update IXP4xx defconfig · b1ad3a57
      Deepak Saxena 提交于
      Patch from Deepak Saxena
      
      Add NAS 100d to machine build list and update to new 2.6.15 options.
      Signed-off-by: NDeepak Saxena <dsaxena@plexity.net>
      
      ---
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      b1ad3a57
    • R
      [ARM] 3218/1: PAGE_SHIFT undeclared in arch-ixp4xx/memory.h (adjust_zones moved out of line) · 313cbb55
      Rod Whitby 提交于
      Patch from Rod Whitby
      
      PAGE_SHIFT is undeclared in include/asm-arm/arch-ixp4xx/memory.h, identified by the following kernel compilation error:
      
      CC [M] sound/core/memory.o
      In file included from include/asm/memory.h:27,
      from include/asm/io.h:28,
      from sound/core/memory.c:24:
      include/asm/arch/memory.h: In function `__arch_adjust_zones':
      include/asm/arch/memory.h:28: error: `PAGE_SHIFT' undeclared (first use
      in this function)
      
      This patch replaces my previous attempt at fixing this problem (Patch 3214/1) and is based on the following feedback:
      
      Russell King wrote:
      > The error you see came up on SA1100.  The best solution was to move
      > the __arch_adjust_zones() function out of line.  I suggest ixp4xx
      > does the same.
      
      I have moved the function out of line into arch/arm/mach-ixp4xx/common-pci.c as suggested.
      Signed-off-by: NRod Whitby <rod@whitby.id.au>
      Signed-off-by: NDeepak Saxena <dsaxena@plexity.net>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      313cbb55
    • D
      [ARM] 3220/1: Remove gpio_isr_line_clear() from NAS 100d · 8d27e699
      Deepak Saxena 提交于
      Patch from Deepak Saxena
      
      This patch removes referneces to gpio_isr_line_clear() from the
      NAS 100d platform implementation.
      
      Depends on 3192/1 and 3215/1
      Signed-off-by: NDeepak Saxena <dsaxena@plexity.net>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      8d27e699
    • R
      [ARM] 3215/1: Iomega NAS 100d (MACH_NAS100D) machine support · 3145d8a6
      Rod Whitby 提交于
      Patch from Rod Whitby
      
      This patch adds support for a new arm/ixp4xx machine - the Iomega NAS 100d network attached storage product.  The NAS100D is a consumer device containing a 266MHz Intel IXP420 processor, 16MB of flash, 64MB of RAM, a 160Gb internal IDE hard disk, and 802.11b/g wireless on an Atheros mini-PCI card.
      
      Work on porting the latest 2.6.x kernel to this device is being done by
      the NSLU2-Linux project (the same team who maintains the port to the
      Linksys NSLU2 device).  In particular, the majority of this patch was
      authored by Alessandro Zummo, based on the work done for MACH_NSLU2
      support by the NSLU2-Linux core team of developers.
      
      MACH_NAS100D (as implemented by this patch) can be enabled in jumbo
      ixp4xx kernels without any affect on the other machines supported by
      that kernel.
      
      This patch applies cleanly against 2.6.15-rc7 and should be trivial to
      apply to later kernel versions. It does not depend upon any other
      patches.
      
      Modified files (and number of lines inserted):
       arch/arm/mach-ixp4xx/Kconfig           |    8
       arch/arm/mach-ixp4xx/Makefile          |    1
       include/asm-arm/arch-ixp4xx/hardware.h |    1
       include/asm-arm/arch-ixp4xx/irqs.h     |    9
       include/asm-arm/arch-ixp4xx/nas100d.h  |   75
       arch/arm/mach-ixp4xx/nas100d-pci.c     |   77
       arch/arm/mach-ixp4xx/nas100d-power.c   |   69
       arch/arm/mach-ixp4xx/nas100d-setup.c   |  133
      
      -- Rod Whitby (NSLU2-Linux project lead)
      Signed-off-by: NRod Whitby <rod@whitby.id.au>
      Signed-off-by: NAlessandro Zummo <a.zummo@towertech.it>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      3145d8a6
    • D
      [ARM] 3192/1: Remove gpio_isr_line_clear() API from IXP4xx · f7e8bbb8
      Deepak Saxena 提交于
      Patch from Deepak Saxena
      
      Other than interrupt masking purposes, this API is only used when
      configuring interrupt lines and this patch moves that functionality
      directly into the ixp4xx_set_irq_type() implementation as board level
      PCI code should not need to worry about those details.
      Signed-off-by: NDeepak Saxena <dsaxena@plexity.net>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      f7e8bbb8
  3. 04 1月, 2006 11 次提交
  4. 20 12月, 2005 1 次提交
  5. 17 12月, 2005 1 次提交
  6. 15 12月, 2005 1 次提交
  7. 13 12月, 2005 1 次提交
    • L
      [ARM] 3201/1: PXA27x: Prevent hangup during resume due to inadvertedly... · 1ee9530a
      Lothar Wassmann 提交于
      [ARM] 3201/1: PXA27x: Prevent hangup during resume due to inadvertedly enabling MBREQ (replaces: 3198/1)
      
      Patch from Lothar Wassmann
      
      The patch makes sure, that the ouptut functions of pins are restored
      before restoring the Alternat Function settings, preventing pins from
      being intermediately configured for undefined or unwanted alternate
      functions.
      
      Here is the original comment:
      I've got a PXA270 system that uses GPIO80 as nCS4. This system did
      hang on resume. Digging into the problem I found that the processor
      stalled immediately when restoring the GAFR2_U register which restored
      the alternate function for GPIO80. Since the GPDR registers were
      restored after the GAFR registers, the offending GPIO was configured
      as input at this point.
      Thus the alternate function that was in effect after restoring the
      GAFR was in fact the input function "MBREQ" instead of the output
      function "nCS4". The "PXA27x Processor Family Developer's Manual"
      (Footnote in Table 6-1 on page 6-3) states that:
      "The MBREQ alternate function must not be enabled until the PSSR[RDH]
      bit field is cleared. For more details, see Table 3-15, "PSSR Bit
      Definitions" on page 3-71."
      
      There is another note in the Developer's Manual (chapter 24.4.2
      "GPIO operation as Alternate Function" on page 24-4)
      stating that:
      "Configuring a GPIO for an alternate function that is not defined for
      it causes unpredictable results."
      
      Since some GPIOs have no input function defined, and to prevent
      inadvertedly programming the MBREQ function on some pin, the GAFR
      registers should be restored after the GPDR registers have been
      restored.
      
      Additional provisions have to be made when the MBREQ function is
      actually required. The corresponding GAFR bits should not be restored
      with the regular GAFR restore, but must be set only after the PSSR
      bits have been cleared.
      Signed-off-by: NLothar Wassmann <LW@KARO-electronics.de>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      1ee9530a
  8. 10 12月, 2005 1 次提交
    • N
      [ARM] 3200/1: Singlestep over ARM BX and BLX instructions using ptrace fix · 22f975f4
      Nikola Valerjev 提交于
      Patch from Nikola Valerjev
      
      Single stepping an application using ptrace() fails over ARM instructions BX and BLX.
      
      Steps to reproduce:
      
      Compile and link the following files
      
      main.c
      -----
      void foo();
      int main() {
          foo();
          return 0;
      }
      
      foo.s
      -----
      	.text
      	.globl foo
      foo:
      	BX LR
      
      Using ptrace() functionality, run to main(), and start singlestepping.
      Singlestep over \"BX LR\" instruction won\'t transfer the control back
      to main, but run the code to completion.
      
      This problems seems to be in the function get_branch_address() in
      arch/arm/kernel/ptrace.c. The function doesn\'t seem to recognize BX
      and BLX instructions as branches. BX and BLX instructions can be used
      to convert from ARM to Thumb mode if the target address has the low
      bit set. However, they are also perfectly legal in the ARM only mode.
      Although other things in the kernel seem to indicate that only ARM
      mode is accepted (and not Thumb), many compilers will generate BX
      and BLX instructions even when generating ARM only code.
      Signed-off-by: NNikola Valerjev <nikola@ghs.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      22f975f4
  9. 01 12月, 2005 3 次提交
  10. 29 11月, 2005 2 次提交
  11. 25 11月, 2005 4 次提交
  12. 22 11月, 2005 2 次提交
  13. 21 11月, 2005 1 次提交
  14. 19 11月, 2005 1 次提交
    • D
      [ARM] 3168/1: Update ARM signal delivery and masking · a6c61e9d
      Daniel Jacobowitz 提交于
      Patch from Daniel Jacobowitz
      
      After delivering a signal (creating its stack frame) we must check for
      additional pending unblocked signals before returning to userspace.
      Otherwise signals may be delayed past the next syscall or reschedule.
      
      Once that was fixed it became obvious that the ARM signal mask manipulation
      was broken.  It was a little bit broken before the recent SA_NODEFER
      changes, and then very broken after them.  We must block the requested
      signals before starting the handler or the same signal can be delivered
      again before the handler even gets a chance to run.
      Signed-off-by: NDaniel Jacobowitz <dan@codesourcery.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      a6c61e9d
  15. 18 11月, 2005 4 次提交
  16. 17 11月, 2005 1 次提交