- 15 11月, 2013 1 次提交
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由 Bjorn Helgaas 提交于
Fix whitespace, capitalization, and spelling errors. No functional change. I know "busses" is not an error, but "buses" was more common, so I used it consistently. Signed-off-by: Marta Rybczynska <rybczynska@gmail.com> (pci_reset_bridge_secondary_bus()) Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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- 08 11月, 2013 1 次提交
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由 Bjorn Helgaas 提交于
This adds a pci_upstream_bridge() interface to find the PCI-to-PCI bridge upstream from a device. This is typically just "dev->bus->self", but in the case of a VF on a virtual bus, we have to start from the corresponding PF. Returns NULL if there is no upstream PCI bridge, i.e., if the device is on a root bus. Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NYinghai Lu <yinghai@kernel.org>
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- 26 9月, 2013 3 次提交
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由 Bjorn Helgaas 提交于
Some code assumes "bus->self == NULL" means the bus is a root bus. This adds a comment explaining why this is incorrect ("virtual" buses added for SR-IOV have "bus->self == NULL" but are not root buses). No functional change. Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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由 Yijing Wang 提交于
No one uses "is_pcie" now; remove this obsolete member. Signed-off-by: NYijing Wang <wangyijing@huawei.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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由 Joe Perches 提交于
Use normal kernel-doc "Returns:" instead of "retrun" Assignment to bool is always 1 or 0 so the !! isn't necessary. Signed-off-by: NJoe Perches <joe@perches.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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- 23 8月, 2013 2 次提交
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由 Sebastian Ott 提交于
Platforms may want to provide architecture-specific functionality when a PCI device is doing a hibernate transition. Add a weak symbol pcibios_pm_ops that architectures can override to do so. [bhelgaas: fold in return value checks from v2 patch] Signed-off-by: NSebastian Ott <sebott@linux.vnet.ibm.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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由 Bjorn Helgaas 提交于
Based on a patch by Jon Mason (see URL below). All users of pcie_bus_configure_settings() pass arguments of the form "bus, bus->self->pcie_mpss". The "mpss" argument is redundant since we can easily look it up internally. In addition, all callers check "bus->self" for NULL, which we can also do internally. This patch simplifies the interface and the callers. No functional change. Reference: http://lkml.kernel.org/r/1317048850-30728-2-git-send-email-mason@myri.comSigned-off-by: NBjorn Helgaas <bhelgaas@google.com>
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- 16 8月, 2013 1 次提交
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由 Alex Williamson 提交于
Users of pci_reset_bus() and pci_reset_slot() need a way to probe whether the bus or slot supports reset. Add trivial helper functions and export them as vfio-pci will make use of these. Signed-off-by: NAlex Williamson <alex.williamson@redhat.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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- 15 8月, 2013 1 次提交
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由 Alex Williamson 提交于
Sometimes pci_reset_function() is not sufficient. We have cases where devices do not support any kind of reset, but there might be multiple functions on the bus preventing pci_reset_function() from doing a secondary bus reset. We also have cases where a device will advertise that it supports a PM reset, but really does nothing on D3hot->D0 (graphics cards are notorious for this). These devices often also have more than one function, so even blacklisting PM reset for them wouldn't allow a secondary bus reset through pci_reset_function(). If a driver supports multiple devices it should have the ability to induce a bus reset when it needs to. This patch provides that ability through pci_reset_slot() and pci_reset_bus(). It's the caller's responsibility when using these interfaces to understand that all of the devices in or below the slot (or on or below the bus) will be reset and therefore should be under control of the caller. PCI state of all the affected devices is saved and restored around these resets, but internal state of all of the affected devices is reset (which should be the intention). Signed-off-by: NAlex Williamson <alex.williamson@redhat.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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- 13 8月, 2013 1 次提交
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由 Casey Leedom 提交于
New routine to avoid duplication of code to wait for pending PCI transactions to complete. Signed-off-by: NCasey Leedom <leedom@chelsio.com> Signed-off-by: NVipul Pandya <vipul@chelsio.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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- 12 8月, 2013 1 次提交
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由 Thierry Reding 提交于
The new struct msi_chip is used to associated an MSI controller with a PCI bus. It is automatically handed down from the root to its children during bus enumeration. This patch provides default (weak) implementations for the architecture- specific MSI functions (arch_setup_msi_irq(), arch_teardown_msi_irq() and arch_msi_check_device()) which check if a PCI device's bus has an attached MSI chip and forward the call appropriately. Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de> Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: NBjorn Helgaas <bhelgaas@google.com> Tested-by: NDaniel Price <daniel.price@gmail.com> Tested-by: NThierry Reding <thierry.reding@gmail.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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- 10 8月, 2013 1 次提交
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由 Alex Williamson 提交于
Move the secondary bus reset code from pci_parent_bus_reset() into its own function. Export it as we'll later be calling it from hotplug controllers and elsewhere. Signed-off-by: NAlex Williamson <alex.williamson@redhat.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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- 31 7月, 2013 2 次提交
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由 Jacob Keller 提交于
A PCI Express device can potentially report a link width and speed which it will not properly fulfill due to being plugged into a slower link higher in the chain. This function walks up the PCI bus chain and calculates the minimum link width and speed of this entire chain. This can be useful to enable a device to determine if it has enough bandwidth for optimum functionality. Signed-off-by: NJacob Keller <jacob.e.keller@intel.com> Tested-by: NPhil Schmitt <phillip.j.schmitt@intel.com> Acked-by: NBjorn Helgaas <bhelgaas@google.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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由 Jacob Keller 提交于
pcie_link_width is the enum used to define the link width values for a pcie device. This enum should not be contained solely in pci_hotplug.h, and this patch moves it next to pci_bus_speed in pci.h Signed-off-by: NJacob Keller <jacob.e.keller@intel.com> Tested-by: NPhil Schmitt <phillip.j.schmitt@intel.com> Acked-by: NBjorn Helgaas <bhelgaas@google.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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- 26 7月, 2013 2 次提交
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由 Yinghai Lu 提交于
When hot-adding an ACPI host bridge, use pci_assign_unassigned_root_bus_resources() instead of pci_assign_unassigned_bus_resources(). The former is more aggressive and will release and reassign existing resources if necessary. This is safe at hot-add time because no drivers are bound to devices below the new host bridge yet. [bhelgaas: changelog, split __init changes out for reviewability] Signed-off-by: NYinghai Lu <yinghai@kernel.org> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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由 Yinghai Lu 提交于
We currently enable PCI bridges after scanning a bus and assigning resources. This is often done in arch code. This patch changes this so we don't enable a bridge until necessary, i.e., until we enable a PCI device behind the bridge. We do this in the generic pci_enable_device() path, so this also removes the arch-specific code to enable bridges. [bhelgaas: changelog] Signed-off-by: NYinghai Lu <yinghai@kernel.org> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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- 27 6月, 2013 1 次提交
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由 Sebastian Ott 提交于
Platforms may want to provide architecture-specific functionality when a pci device is released. Add a pcibios_release_device() call that architectures can override to do so. Signed-off-by: NSebastian Ott <sebott@linux.vnet.ibm.com> Signed-off-by: NMartin Schwidefsky <schwidefsky@de.ibm.com>
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- 05 6月, 2013 1 次提交
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由 Sebastian Ott 提交于
Platforms may want to provide architecture-specific functionality when a PCI device is released. Add a pcibios_release_device() call that architectures can override to do so. Signed-off-by: NSebastian Ott <sebott@linux.vnet.ibm.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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- 28 5月, 2013 2 次提交
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由 Gu Zheng 提交于
Here we introduce a new interface to replace alloc_pci_dev(): struct pci_dev *pci_alloc_dev(struct pci_bus *bus) It takes a "struct pci_bus *" argument, so we can alloc a PCI device on a target PCI bus, and it acquires a reference on the pci_bus. We use pci_alloc_dev(NULL) to simplify the old alloc_pci_dev(), and keep it for a while but mark it as __deprecated. Holding a reference to the pci_bus ensures that referencing pci_dev->bus is valid as long as the pci_dev is valid. [bhelgaas: keep existing "return error early" structure in pci_alloc_dev()] Signed-off-by: NGu Zheng <guz.fnst@cn.fujitsu.com> Signed-off-by: NJiang Liu <jiang.liu@huawei.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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由 Jiang Liu 提交于
Introduce helper functions pci_bus_{get|put}() to manage PCI bus reference count. Signed-off-by: NJiang Liu <jiang.liu@huawei.com> Signed-off-by: NYijing Wang <wangyijing@huawei.com> Signed-off-by: NGu Zheng <guz.fnst@cn.fujitsu.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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- 25 4月, 2013 1 次提交
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由 Alexander Duyck 提交于
This function is meant to add a helper function that will determine if a PF has any VFs that are currently assigned to a guest. We currently have been implementing this function per driver, and going forward I would like to avoid that by making this function generic and using this helper. v2: Removed extern from declaration of pci_vfs_assigned in pci.h and return 0 if SR-IOV is disabled with is inline with other PCI SRIOV functions. Signed-off-by: NAlexander Duyck <alexander.h.duyck@intel.com> Acked-by: NBjorn Helgaas <bhelgaas@google.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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- 23 4月, 2013 2 次提交
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由 Gavin Shan 提交于
The patch caches the MSI and MSI-X capability offset in PCI device (struct pci_dev) so that we needn't read it from the config space upon enabling or disabling MSI or MSI-X interrupts. [bhelgaas: moved pm_cap size change to separate patch] Signed-off-by: NGavin Shan <shangw@linux.vnet.ibm.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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由 Bjorn Helgaas 提交于
The Power Management Capability (PCI_CAP_ID_PM == 0x01) is defined by PCI and must appear in the 256-byte PCI Configuration Space from 0-0xff. It cannot be in the PCIe Extended Configuration space from 0x100-0xfff, so we only need a u8 to hold its offset. Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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- 18 4月, 2013 1 次提交
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由 Bjorn Helgaas 提交于
We had an inconsistent mix of using and omitting the "extern" keyword on function declarations in header files. This removes them all. Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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- 13 4月, 2013 1 次提交
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由 Jiang Liu 提交于
On ACPI-based platforms, the pci_slot driver creates PCI slot devices according to information from ACPI tables by registering an ACPI PCI subdriver. The ACPI PCI subdriver will only be called when creating/ destroying PCI root buses, and it won't be called when hot-plugging P2P bridges. It may cause stale PCI slot devices after hot-removing a P2P bridge if that bridge has associated PCI slots. And the acpiphp driver has the same issue too. This patch introduces two hook points into the PCI core, which will be invoked when creating/destroying PCI buses for PCI host and P2P bridges. They could be used to setup/destroy platform dependent stuff in a unified way, both at boot time and for PCI hotplug operations. Signed-off-by: NJiang Liu <jiang.liu@huawei.com> Signed-off-by: NYijing Wang <wangyijing@huawei.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Reviewed-by: NYinghai Lu <yinghai@kernel.org> Cc: "Rafael J. Wysocki" <rafael.j.wysocki@intel.com> Cc: Toshi Kani <toshi.kani@hp.com> Cc: Tony Luck <tony.luck@intel.com> Cc: Fenghua Yu <fenghua.yu@intel.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@redhat.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Myron Stowe <myron.stowe@redhat.com>
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- 10 4月, 2013 1 次提交
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由 Bjorn Helgaas 提交于
The __weak annotation on the pcibios_get_phb_of_node() declaration causes *every* definition to be marked "weak." The linker then selects one based on link order, which may be the wrong one. Gabor found that on MIPS, the linker selected the generic implementation from drivers/pci even though arch/mips supplied a definition without the __weak annotation: $ mipsel-openwrt-linux-readelf -s arch/mips/pci/built-in.o \ drivers/pci/built-in.o vmlinux.o | grep pcibios_get_phb_of_node 86: 0000046c 12 FUNC WEAK DEFAULT 2 pcibios_get_phb_of_node 1430: 00012e2c 104 FUNC WEAK DEFAULT 2 pcibios_get_phb_of_node 31898: 0017e4ec 104 FUNC WEAK DEFAULT 2 pcibios_get_phb_of_node This removes the __weak annotation from the pcibios_get_phb_of_node() declaration so arch-specific non-weak implementations work reliably. Suggested-by: NGabor Juhos <juhosg@openwrt.org> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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- 27 3月, 2013 2 次提交
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由 Matthew Garrett 提交于
It turns out that some UEFI systems provide apparently an apparently valid PCI ROM BAR that turns out to contain garbage, so the attempt in 547b5246 to prefer the ROM from the BAR actually breaks a different set of machines. As Linus pointed out, the graphics drivers are probably in the best position to make this judgement, so this basically reverts 547b5246 and f9a37be0 and adds a new helper function. Followup patches will add support to nouveau and radeon for probing this ROM source if they can't find a ROM from some other source. [bhelgaas: added reporter and bugzilla pointers, s/f4eb5ff05/547b5246] Reference: https://bugzilla.redhat.com/show_bug.cgi?id=927451 Reference: http://lkml.kernel.org/r/kg69ef$vdb$1@ger.gmane.orgReported-by: NMantas Mikulėnas <grawity@gmail.com> Reported-by: NChris Murphy <bugzilla@colorremedies.com> Signed-off-by: NMatthew Garrett <matthew.garrett@nebula.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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由 Shuah Khan 提交于
PCI defines PCI_DEVFN(), PCI_SLOT(), and PCI_FUNC() interfaces; however, it doesn't have interfaces to return PCI bus and PCI device id. Drivers (AMD IOMMU, and AER) implement module specific definitions for PCI_BUS() and AMD_IOMMU driver also has a module specific interface to calculate PCI device id from bus number and devfn. Add PCI_BUS_NUM and PCI_DEVID interfaces to return PCI bus number and PCI device id respectively to avoid the need for duplicate definitions in other modules. AER driver code and AMD IOMMU driver define PCI_BUS. AMD IOMMU driver defines an interface to calculate device id from bus number, and devfn pair. PCI_DEVFN(), PCI_SLOT(), and PCI_FUNC() interfaces are exported to user-space via uapi/linux/pci.h. However, in the interest to keep the new interfaces as kernel only and not export them to user-space unnecessarily, added them to linux/pci.h instead. Signed-off-by: NShuah Khan <shuah.khan@hp.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NJoerg Roedel <joro@8bytes.org>
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- 31 1月, 2013 2 次提交
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由 Myron Stowe 提交于
Use PCI Express Capability access functions to simplify device Capabilities Register usages. Signed-off-by: NMyron Stowe <myron.stowe@redhat.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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由 Myron Stowe 提交于
Provide an accessor to retrieve the PCI Express device's Capabilities Register. Signed-off-by: NMyron Stowe <myron.stowe@redhat.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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- 26 1月, 2013 1 次提交
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由 Yinghai Lu 提交于
We want to add PCI devices to the device tree as early as possible but delay attaching drivers. device_add() adds a device to the device hierarchy and (via device_attach()) attaches a matching driver and calls its .probe() method. We want to separate adding the device to the hierarchy from attaching the driver. This patch does that by adding "match_driver" in struct pci_dev. When false, we return failure from pci_bus_match(), which makes device_attach() believe there's no matching driver. Later, we set "match_driver = true" and call device_attach() again, which now attaches the driver and calls its .probe() method. [bhelgaas: changelog, explicitly init dev->match_driver, fold device_attach() call into pci_bus_add_device()] Signed-off-by: NYinghai Lu <yinghai@kernel.org> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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- 25 1月, 2013 1 次提交
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由 Alexander Gordeev 提交于
The new function pci_enable_msi_block_auto() tries to allocate maximum possible number of MSIs up to the number the device supports. It generalizes a pattern when pci_enable_msi_block() is contiguously called until it succeeds or fails. Opposite to pci_enable_msi_block() which takes the number of MSIs to allocate as a input parameter, pci_enable_msi_block_auto() could be used by device drivers to obtain the number of assigned MSIs and the number of MSIs the device supports. Signed-off-by: NAlexander Gordeev <agordeev@redhat.com> Acked-by: NBjorn Helgaas <bhelgaas@google.com> Cc: Suresh Siddha <suresh.b.siddha@intel.com> Cc: Yinghai Lu <yinghai@kernel.org> Cc: Matthew Wilcox <willy@linux.intel.com> Cc: Jeff Garzik <jgarzik@pobox.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Thomas Gleixner <tglx@linutronix.de> Link: http://lkml.kernel.org/r/c3de2419df94a0f95ca1a6f755afc421486455e6.1353324359.git.agordeev@redhat.comSigned-off-by: NIngo Molnar <mingo@kernel.org>
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- 14 1月, 2013 1 次提交
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由 Rafael J. Wysocki 提交于
The ACPI handles of PCI root bridges need to be known to acpi_bind_one(), so that it can create the appropriate "firmware_node" and "physical_node" files for them, but currently the way it gets to know those handles is not exactly straightforward (to put it lightly). This is how it works, roughly: 1. acpi_bus_scan() finds the handle of a PCI root bridge, creates a struct acpi_device object for it and passes that object to acpi_pci_root_add(). 2. acpi_pci_root_add() creates a struct acpi_pci_root object, populates its "device" field with its argument's address (device->handle is the ACPI handle found in step 1). 3. The struct acpi_pci_root object created in step 2 is passed to pci_acpi_scan_root() and used to get resources that are passed to pci_create_root_bus(). 4. pci_create_root_bus() creates a struct pci_host_bridge object and passes its "dev" member to device_register(). 5. platform_notify(), which for systems with ACPI is set to acpi_platform_notify(), is called. So far, so good. Now it starts to be "interesting". 6. acpi_find_bridge_device() is used to find the ACPI handle of the given device (which is the PCI root bridge) and executes acpi_pci_find_root_bridge(), among other things, for the given device object. 7. acpi_pci_find_root_bridge() uses the name (sic!) of the given device object to extract the segment and bus numbers of the PCI root bridge and passes them to acpi_get_pci_rootbridge_handle(). 8. acpi_get_pci_rootbridge_handle() browses the list of ACPI PCI root bridges and finds the one that matches the given segment and bus numbers. Its handle is then used to initialize the ACPI handle of the PCI root bridge's device object by acpi_bind_one(). However, this is *exactly* the ACPI handle we started with in step 1. Needless to say, this is quite embarassing, but it may be avoided thanks to commit f3fd0c8a (ACPI: Allow ACPI handles of devices to be initialized in advance), which makes it possible to initialize the ACPI handle of a device before passing it to device_register(). Accordingly, add a new __weak routine, pcibios_root_bridge_prepare(), defaulting to an empty implementation that can be replaced by the interested architecutres (x86 and ia64 at the moment) with functions that will set the root bridge's ACPI handle before its dev member is passed to device_register(). Make both x86 and ia64 provide such implementations of pcibios_root_bridge_prepare() and remove acpi_pci_find_root_bridge() and acpi_get_pci_rootbridge_handle() that aren't necessary any more. Included is a fix for breakage on systems with non-ACPI PCI host bridges from Bjorn Helgaas. Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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- 08 1月, 2013 1 次提交
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由 Yinghai Lu 提交于
Firmware may have assigned PCI BARs for hot-added devices, so reserve those resources before trying to allocate more. [bhelgaas: move empty weak definition here] Signed-off-by: NYinghai Lu <yinghai@kernel.org> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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- 11 12月, 2012 1 次提交
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由 Bjorn Helgaas 提交于
Use phys_addr_t rather than "void *" for physical memory address. This removes casts and fixes a "cast from pointer to integer of different size" warning on ppc44x_defconfig. Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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- 06 12月, 2012 2 次提交
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由 Matthew Garrett 提交于
Platforms may provide their own mechanisms for obtaining ROMs. Add support for using data provided by the platform in that case. Signed-off-by: NMatthew Garrett <mjg@redhat.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Tested-by: NSeth Forshee <seth.forshee@canonical.com>
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由 Matthew Garrett 提交于
Platforms may want to provide architecture-specific functionality during PCI enumeration. Add a pcibios_add_device() call that architectures can override to do so. Signed-off-by: NMatthew Garrett <mjg@redhat.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Tested-by: NSeth Forshee <seth.forshee@canonical.com>
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- 29 11月, 2012 2 次提交
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由 Bill Pemberton 提交于
CONFIG_HOTPLUG is going away as an option so __devexit_p, __devint, __devinitdata, __devinitconst, and _devexit are no longer needed. Signed-off-by: NBill Pemberton <wfp5p@virginia.edu> Acked-by: NBjorn Helgaas <bhelgaas@google.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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由 Bill Pemberton 提交于
Remove conditional code based on CONFIG_HOTPLUG being false. It's always on now in preparation of it going away as an option. Signed-off-by: NBill Pemberton <wfp5p@virginia.edu> Acked-by: NBjorn Helgaas <bhelgaas@google.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 27 11月, 2012 1 次提交
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由 Vijay Mohan Pandarathil 提交于
When an error is detected on a PCIe device which does not have an AER-aware driver, prevent AER infrastructure from reporting successful error recovery. This is because the report_error_detected() function that gets called in the first phase of recovery process allows forward progress even when the driver for the device does not have AER capabilities. It seems that all callbacks (in pci_error_handlers structure) registered by drivers that gets called during error recovery are not mandatory. So the intention of the infrastructure design seems to be to allow forward progress even when a specific callback has not been registered by a driver. However, if error handler structure itself has not been registered, it doesn't make sense to allow forward progress. As a result of the current design, in the case of a single device having an AER-unaware driver or in the case of any function in a multi-function card having an AER-unaware driver, a successful recovery is reported. Typical scenario this happens is when a PCI device is detached from a KVM host and the pci-stub driver on the host claims the device. The pci-stub driver does not have error handling capabilities but the AER infrastructure still reports that the device recovered successfully. The changes proposed here leaves the device(s)in an unrecovered state if the driver for the device or for any device in the subtree does not have error handler structure registered. This reflects the true state of the device and prevents any partial recovery (or no recovery at all) reported as successful. [bhelgaas: changelog] Signed-off-by: NVijay Mohan Pandarathil <vijaymohan.pandarathil@hp.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Reviewed-by: NLinas Vepstas <linasvepstas@gmail.com> Reviewed-by: NMyron Stowe <myron.stowe@redhat.com>
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