1. 29 1月, 2009 1 次提交
  2. 18 12月, 2008 1 次提交
    • M
      x86: fix cpu_mask_to_apicid_and to include cpu_online_mask · a775a38b
      Mike Travis 提交于
      Impact: fix potential APIC crash
      
      In determining the destination apicid, there are usually three cpumasks
      that are considered: the incoming cpumask arg, cfg->domain and the
      cpu_online_mask.  Since we are just introducing the cpu_mask_to_apicid_and
      function, make sure it includes the cpu_online_mask in it's evaluation.
      [Added with this patch.]
      
      There are two io_apic.c functions that did not previously use the
      cpu_online_mask:  setup_IO_APIC_irq and msi_compose_msg.  Both of these
      simply used cpu_mask_to_apicid(cfg->domain & TARGET_CPUS), and all but
      one arch (NUMAQ[*]) returns only online cpus in the TARGET_CPUS mask,
      so the behavior is identical for all cases.
      
      [*: NUMAQ bug?]
      
      Note that alloc_cpumask_var is only used for the 32-bit cases where
      it's highly likely that the cpumask set size will be small and therefore
      CPUMASK_OFFSTACK=n.  But if that's not the case, failing the allocate
      will cause the same return value as the default.
      Signed-off-by: NMike Travis <travis@sgi.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      a775a38b
  3. 17 12月, 2008 4 次提交
  4. 18 11月, 2008 1 次提交
  5. 23 10月, 2008 3 次提交
  6. 16 10月, 2008 1 次提交
    • Y
      x86: make 32bit support per_cpu vector · 497c9a19
      Yinghai Lu 提交于
      so we can merge io_apic_32.c and io_apic_64.c
      
      v2: Use cpu_online_map as target cpus for bigsmp, just like 64-bit is doing.
      
      Also remove some unused TARGET_CPUS macro.
      
      v3: need to check if desc is null in smp_irq_move_cleanup
      
      also migration needs to reset vector too, so copy __target_IO_APIC_irq
      from 64bit.
      
      (the duplication will go away once the two files are unified.)
      Signed-off-by: NYinghai Lu <yhlu.kernel@gmail.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      497c9a19
  7. 23 7月, 2008 1 次提交
    • V
      x86: consolidate header guards · 77ef50a5
      Vegard Nossum 提交于
      This patch is the result of an automatic script that consolidates the
      format of all the headers in include/asm-x86/.
      
      The format:
      
      1. No leading underscore. Names with leading underscores are reserved.
      2. Pathname components are separated by two underscores. So we can
         distinguish between mm_types.h and mm/types.h.
      3. Everything except letters and numbers are turned into single
         underscores.
      Signed-off-by: NVegard Nossum <vegard.nossum@gmail.com>
      77ef50a5
  8. 18 7月, 2008 1 次提交
    • M
      x86: APIC: remove apic_write_around(); use alternatives · 593f4a78
      Maciej W. Rozycki 提交于
      Use alternatives to select the workaround for the 11AP Pentium erratum
      for the affected steppings on the fly rather than build time.  Remove the
      X86_GOOD_APIC configuration option and replace all the calls to
      apic_write_around() with plain apic_write(), protecting accesses to the
      ESR as appropriate due to the 3AP Pentium erratum.  Remove
      apic_read_around() and all its invocations altogether as not needed.
      Remove apic_write_atomic() and all its implementing backends.  The use of
      ASM_OUTPUT2() is not strictly needed for input constraints, but I have
      used it for readability's sake.
      
      I had the feeling no one else was brave enough to do it, so I went ahead
      and here it is.  Verified by checking the generated assembly and tested
      with both a 32-bit and a 64-bit configuration, also with the 11AP
      "feature" forced on and verified with gdb on /proc/kcore to work as
      expected (as an 11AP machines are quite hard to get hands on these days).
      Some script complained about the use of "volatile", but apic_write() needs
      it for the same reason and is effectively a replacement for writel(), so I
      have disregarded it.
      
      I am not sure what the policy wrt defconfig files is, they are generated
      and there is risk of a conflict resulting from an unrelated change, so I
      have left changes to them out.  The option will get removed from them at
      the next run.
      
      Some testing with machines other than mine will be needed to avoid some
      stupid mistake, but despite its volume, the change is not really that
      intrusive, so I am fairly confident that because it works for me, it will
      everywhere.
      Signed-off-by: NMaciej W. Rozycki <macro@linux-mips.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      593f4a78
  9. 13 7月, 2008 1 次提交
    • Y
      x86: make 64bit have get_apic_id · f910a9dc
      Yinghai Lu 提交于
      generalize the x2apic code some more.
      
      let read_apic_id become a macro (later on a function/inline)
      GET_APIC_ID(apic_read(APIC_ID))
      
        +#define read_apic_id()  (GET_APIC_ID(apic_read(APIC_ID)))
      
      instead of this weird construct:
      
        -#define read_apic_id  (genapic->read_apic_id)
      Signed-off-by: NYinghai Lu <yhlu.kernel@gmail.com>
      Cc: Suresh Siddha <suresh.b.siddha@intel.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      f910a9dc
  10. 12 7月, 2008 3 次提交
  11. 08 7月, 2008 1 次提交
  12. 01 5月, 2008 1 次提交
    • H
      x86: fix HT cpu booting on 32-bit · 5f464707
      Hugh Dickins 提交于
      Since recent smpboot 32/64-bit merge, my dual Xeon with HT has been
      booting only 2 of its 4 cpus (when running an i386 kernel; but x86_64
      is okay).  J.A. Magallón reports the same.
      
       native_cpu_up: bad cpu 2
       native_cpu_up: bad cpu 3
      
      The mach-default cpu_present_to_apicid() was just returning cpu number
      (2, 3) instead of apicid (6, 7): looks like we now need the x86_64 code
      even for the i386 case.
      
      Comparing with other versions of cpu_present_to_apicid(), it seems a
      good idea to include an NR_CPUS test too, since cpu_present() doesn't
      include that; but that wasn't a problem here, and may no problem at all.
      
      Prior to that smpboot merge, my Xeon booted the two HT siblings on one
      physical first, then the two siblings on the other physical after - when
      i386, but alternated them when x86_64.  Since the merge, the x86_64
      sequence is unchanged, but the i386 sequence is now like x86_64.
      
      I prefer this consistency, and I prefer the new sequence: booting with
      maxcpus=2 then uses the independent physicals without HT sharing.
      Signed-off-by: NHugh Dickins <hugh@veritas.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      5f464707
  13. 17 4月, 2008 5 次提交
  14. 30 1月, 2008 1 次提交
  15. 11 10月, 2007 1 次提交
  16. 03 5月, 2007 1 次提交
  17. 24 6月, 2005 1 次提交
  18. 17 4月, 2005 1 次提交
    • L
      Linux-2.6.12-rc2 · 1da177e4
      Linus Torvalds 提交于
      Initial git repository build. I'm not bothering with the full history,
      even though we have it. We can create a separate "historical" git
      archive of that later if we want to, and in the meantime it's about
      3.2GB when imported into git - space that would just make the early
      git days unnecessarily complicated, when we don't have a lot of good
      infrastructure for it.
      
      Let it rip!
      1da177e4