1. 10 5月, 2012 13 次提交
  2. 09 5月, 2012 13 次提交
    • B
      ARM: OMAP4: hsmmc: check for null pointer · 1ee47b0a
      Balaji T K 提交于
      platform_device pdev can be NULL if CONFIG_MMC_OMAP_HS is not set.
      Add check for NULL pointer. while at it move the duplicated functions
      to omap4-common.c
      
      Fixes the following boot crash seen with omap4sdp and omap4panda
      when MMC is disabled.
      
      Unable to handle kernel NULL pointer dereference at virtual address 0000008c
      pgd = c0004000
      [0000008c] *pgd=00000000
      Internal error: Oops: 5 [#1] SMP ARM
      Modules linked in:
      CPU: 0    Not tainted  (3.4.0-rc1-05971-ga4dfa82 #4)
      PC is at omap_4430sdp_init+0x184/0x410
      LR is at device_add+0x1a0/0x664
      Signed-off-by: NBalaji T K <balajitk@ti.com>
      Reported-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      1ee47b0a
    • A
      ARM: OMAP1: fix compilation issue in board-sx1.c · e54bdc18
      Artem Bityutskiy 提交于
      SX1 board requirese i2c, so select it in Kconfig, otherwise I have the
      following build error:
      
      arch/arm/mach-omap1/board-sx1.c: In function 'sx1_i2c_write_byte':
      arch/arm/mach-omap1/board-sx1.c:58:2: error: implicit declaration of function 'i2c_get_adapter' [-Werror=implicit-function-declaration]
      arch/arm/mach-omap1/board-sx1.c:58:7: warning: assignment makes pointer from integer without a cast [enabled by default]
      arch/arm/mach-omap1/board-sx1.c:67:2: error: implicit declaration of function 'i2c_transfer' [-Werror=implicit-function-declaration]
      arch/arm/mach-omap1/board-sx1.c:68:2: error: implicit declaration of function 'i2c_put_adapter' [-Werror=implicit-function-declaration]
      arch/arm/mach-omap1/board-sx1.c: In function 'sx1_i2c_read_byte':
      arch/arm/mach-omap1/board-sx1.c:82:7: warning: assignment makes pointer from integer without a cast [enabled by default]
      cc1: some warnings being treated as errors
      make[1]: *** [arch/arm/mach-omap1/board-sx1.o] Error 1
      make: *** [arch/arm/mach-omap1] Error 2
      make: *** Waiting for unfinished jobs....
      Signed-off-by: NArtem Bityutskiy <artem.bityutskiy@linux.intel.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      e54bdc18
    • K
      ARM: OMAP2+: WDTIMER integration: fix !PM boot crash, disarm timer after hwmod reset · 414e4128
      Kevin Hilman 提交于
      Without runtime PM enabled, hwmod needs to leave all IP blocks in an
      enabled state by default so any driver access to the HW will succeed.
      This is accomplished by seting the postsetup_state to enabled for all
      hwmods during init when runtime PM is disabled.
      
      Currently, we have a special case for WDT in that its postsetup_state
      is always set to disabled.  This is done so that the WDT is disabled
      and the timer is disarmed at boot in case there is no WDT driver.
      This also means that when runtime PM is disabled, if a WDT driver *is*
      built in the kernel, the kernel will crash on the first access to the
      WDT hardware.
      
      We can't simply leave the WDT module enabled, because the timer is
      armed by default after reset. That means that if there is no WDT
      driver initialzed or loaded before the timer expires, the kernel will
      reboot.
      
      To fix this, a custom reset method is added to the watchdog class of
      omap_hwmod.  This method will *always* disarm the timer after hwmod
      reset.  The WDT timer then will only be rearmed when/if the driver is
      loaded for the WDT.  With the timer disarmed by default, we no longer
      need a special-case for the postsetup_state of WDT during init, so it
      is removed.
      
      Any platforms wishing to ensure the watchdog remains armed across the
      entire boot boot can simply disable the reset-on-init feature of the
      watchdog hwmod using omap_hwmod_no_setup_reset().
      
      Tested on 3530/Overo, 4430/Panda.
      
      NOTE: on 4430, the hwmod OCP reset does not seem to rearm the timer as
      documented in the TRM (and what happens on OMAP3.)  I noticed this
      because testing the HWMOD_INIT_NO_RESET feature with no driver loaded,
      I expected a reboot part way through the boot, but did not see a
      reboot.  Adding some debug to read the counter, I verified that right
      after OCP softreset, the counter is not firing.  After writing the
      magic start sequence, the timer starts counting.  This means that the
      timer disarm sequence added here does not seem to be needed for 4430,
      but is technically the correct way to ensure the timer is disarmed, so
      it is left in for OMAP4.
      
      Special thanks to Paul Walmsley for helping brainstorm ideas to fix
      this problem.
      
      Cc: Paul Walmsley <paul@pwsan.com>
      Signed-off-by: NKevin Hilman <khilman@ti.com>
      Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
      Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
      [paul@pwsan.com: updated the omap2_wd_timer_reset() function in the
       wake of commit 3c55c1ba ("ARM:
       OMAP2+: hwmod: Revert "ARM: OMAP2+: hwmod: Make omap_hwmod_softreset
       wait for reset status""); added kerneldoc; rolled in warning fix from Kevin]
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      414e4128
    • V
      ARM: OMAP2/3: hwmod data: Add 32k-sync timer data to hwmod database · c8d82ff6
      Vaibhav Hiremath 提交于
      Add 32k-sync timer hwmod-data and add ocp_if details to
      omap2 & 3 hwmod table.
      Signed-off-by: NVaibhav Hiremath <hvaibhav@ti.com>
      Signed-off-by: NFelipe Balbi <balbi@ti.com>
      Reviewed-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
      Cc: Benoit Cousson <b-cousson@ti.com>
      Cc: Tony Lindgren <tony@atomide.com>
      Cc: Paul Walmsley <paul@pwsan.com>
      Cc: Kevin Hilman <khilman@ti.com>
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      c8d82ff6
    • P
      ARM: OMAP4: hwmod_data: Name the common irq for McBSP ports · 437e8970
      Peter Ujfalusi 提交于
      Use 'common' as name for the common irq number in hwmod data for the McBSP
      ports. The same name already in use for OMAP2430, and OMAP3.
      Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      437e8970
    • S
      ARM: OMAP4: hwmod data: I2C: add flag for context restore · aa8f6cef
      Shubhrajyoti D 提交于
      Restore of context is not done for OMAP4. This patch
      adds the OMAP_I2C_FLAG_RESET_REGS_POSTIDLE in the OMAP4
      hwmod data which activates the restore for OMAP4.
      Currently the OMAP4 does not hit device off still the
      driver may have support for it.
      
      Cc: Benoit Cousson <b-cousson@ti.com>
      Cc: Paul Wamsley <paul@pwsan.com>
      Reviewed-by: NKevin Hilman <khilman@ti.com>
      Signed-off-by: NShubhrajyoti D <shubhrajyoti@ti.com>
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      aa8f6cef
    • P
      ARM: OMAP3: hwmod_data: Rename the common irq for McBSP ports · 1c2badc1
      Peter Ujfalusi 提交于
      Use 'common' as name for the common irq number in hwmod data for the McBSP
      ports. The same name already in use for OMAP2430, and the OMAP4 hwmod data
      will be using the same name.
      Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      1c2badc1
    • P
      ARM: OMAP2xxx: hwmod data: add HDQ/1-wire hwmod · f32bd778
      Paul Walmsley 提交于
      Add the HDQ1W hwmod for all OMAP2xxx devices.
      
      Assume that OMAP2xxx chips have the same HDQ idle handling bug
      as OMAP3:
      
         http://www.spinics.net/lists/linux-omap/msg63576.html
      
      and set the OCPIF_SWSUP_IDLE flag accordingly on the HDQ's OCP interface.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      f32bd778
    • P
      ARM: OMAP3: hwmod data: add HDQ/1-wire hwmod · 45a4bb06
      Paul Walmsley 提交于
      Add the HDQ1W hwmod for OMAP34xx, OMAP36xx, and AM3505/3517 devices.
      According to the respective TRMs, it doesn't appear to be available for the
      816x/814x or the AM335x.
      
      The OCPIF_SWSUP_IDLE flag is added to work around an apparent hardware
      bug: the hardware is not taking the CM_FCLKEN*_CORE.EN_HDQ bit into
      account when considering whether to go idle:
      
          http://www.spinics.net/lists/linux-omap/msg63576.html
      
      This causes HDQ transfers to fail or become corrupt.  Thanks to
      NeilBrown for his help diagnosing and testing fixes for this problem.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Cc: NeilBrown <neilb@suse.de>
      Tested-by: NNeilBrown <neilb@suse.de>
      45a4bb06
    • P
      ARM: OMAP2+: hwmod data: add HDQ/1-wire hwmod shared data · 03d830e8
      Paul Walmsley 提交于
      Much of the HDQ1W integration data is common between multiple generations
      of OMAP SoCs, so rather than make several copies, we add it once into
      files which are compiled for multiple SoCs.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Cc: NeilBrown <neilb@suse.de>
      Tested-by: NNeilBrown <neilb@suse.de>
      03d830e8
    • P
      ARM: OMAP2+: HDQ1W: add custom reset function · 9e1b7498
      Paul Walmsley 提交于
      Implement a custom reset function for the HDQ1W IP block.  This is
      because the HDQ1W IP block, like I2C, has an internal clock gating bit
      that needs to be toggled after setting the SOFTRESET bit to allow the
      reset to propagate.
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      Cc: NeilBrown <neilb@suse.de>
      Cc: Avinash.H.M <avinashhm@ti.com>
      Tested-by: NNeilBrown <neilb@suse.de>
      9e1b7498
    • T
      ARM: OMAP2420: hwmod data: Add MMC hwmod data for 2420 · ad1b6662
      Tony Lindgren 提交于
      Add MMC for 2420 so we can pass the DMA request lines the same
      way as we already do on omap2430 and later.
      
      Cc: Benoit Cousson <b-cousson@ti.com>
      Cc: Paul Walmsley <paul@pwsan.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      [paul@pwsan.com: updated to apply on top of the 3.5 hwmod cleanup;
       changed mmc hwmod name/class to "msdi" as documented in the 2420 TRM Rev X;
       added sysconfig register information; added 16 bit register width flag;
       added MSDI custom reset code]
      Signed-off-by: NPaul Walmsley <paul@pwsan.com>
      ad1b6662
    • T
      Merge tag 'omap-devel-b-for-3.5' of... · 743a6d92
      Tony Lindgren 提交于
      Merge tag 'omap-devel-b-for-3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into devel-prcm
      
      Some OMAP PRCM updates for 3.5.  Includes some clock, clockdomain,
      powerdomain, PRM, and CM changes.
      743a6d92
  3. 08 5月, 2012 12 次提交
  4. 07 5月, 2012 2 次提交