The MSM SOC's DMA controller contains several security domains.
On the MSM7x00, only security domain 3 is accessible to our CPU.
The 7x30, however, uses security domain 2.  Fix up the register
definition macros to select this appropriately, based on
configured target.
Signed-off-by: NDaniel Walker <dwalker@codeaurora.org>
Signed-off-by: NDavid Brown <davidb@codeaurora.org>
Signed-off-by: NGregory Bean <gbean@codeaurora.org>
Signed-off-by: NAbhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: NStepan Moskovchenko <stepanm@codeaurora.org>

San:
- Propagate DM errors to the originator of the request.
- Implement msm_dmov_stop_cmd()
- Add return value to init code
- Modify msm_dmov_stop_cmd() to support ungraceful flushing

Arve:
- Disable datamover interrupt when not in use.
  We turn off the interrrupt to allow power collapse from idle.
Signed-off-by: NSan Mehat <san@android.com>
Signed-off-by: NArve Hjønnevåg <arve@android.com>
Signed-off-by: NBrian Swetland <swetland@google.com>

This just leaves include/asm-arm/plat-* to deal with.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Signed-off-by: NBrian Swetland <swetland@google.com>

- core header files for arch-msm
- Kconfig and Makefiles to enable ARCH_MSM7X00A builds
- MSM7X00A specific arch_idle
- peripheral iomap and irq number definitions
Signed-off-by: NBrian Swetland <swetland@google.com>