1. 19 10月, 2013 1 次提交
  2. 11 10月, 2013 2 次提交
    • P
      powerpc: Put FP/VSX and VR state into structures · de79f7b9
      Paul Mackerras 提交于
      This creates new 'thread_fp_state' and 'thread_vr_state' structures
      to store FP/VSX state (including FPSCR) and Altivec/VSX state
      (including VSCR), and uses them in the thread_struct.  In the
      thread_fp_state, the FPRs and VSRs are represented as u64 rather
      than double, since we rarely perform floating-point computations
      on the values, and this will enable the structures to be used
      in KVM code as well.  Similarly FPSCR is now a u64 rather than
      a structure of two 32-bit values.
      
      This takes the offsets out of the macros such as SAVE_32FPRS,
      REST_32FPRS, etc.  This enables the same macros to be used for normal
      and transactional state, enabling us to delete the transactional
      versions of the macros.   This also removes the unused do_load_up_fpu
      and do_load_up_altivec, which were in fact buggy since they didn't
      create large enough stack frames to account for the fact that
      load_up_fpu and load_up_altivec are not designed to be called from C
      and assume that their caller's stack frame is an interrupt frame.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      de79f7b9
    • A
      powerpc: Reset MSR_LE on signal entry · e871c6bb
      Anton Blanchard 提交于
      We always take signals in big endian which is wrong. Signals
      should be taken in native endian.
      Signed-off-by: NAnton Blanchard <anton@samba.org>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      e871c6bb
  3. 14 8月, 2013 1 次提交
    • P
      powerpc: Fix VRSAVE handling · 408a7e08
      Paul Mackerras 提交于
      Since 2002, the kernel has not saved VRSAVE on exception entry and
      restored it on exit; rather, VRSAVE gets context-switched in _switch.
      This means that when executing in process context in the kernel, the
      userspace VRSAVE value is live in the VRSAVE register.
      
      However, the signal code assumes that current->thread.vrsave holds
      the current VRSAVE value, which is incorrect.  Therefore, this
      commit changes it to use the actual VRSAVE register instead.  (It
      still uses current->thread.vrsave as a temporary location to store
      it in, as __get_user and __put_user can only transfer to/from a
      variable, not an SPR.)
      
      This also modifies the transactional memory code to save and restore
      VRSAVE regardless of whether VMX is enabled in the MSR.  This is
      because accesses to VRSAVE are not controlled by the MSR.VEC bit,
      but can happen at any time.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      408a7e08
  4. 20 6月, 2013 4 次提交
    • M
      powerpc/tm: Fix return of 32bit rt signals to active transactions · 55e43418
      Michael Neuling 提交于
      Currently we only restore signals which are transactionally suspended but it's
      possible that the transaction can be restored even when it's active.  Most
      likely this will result in a transactional rollback by the hardware as the
      transaction will have been doomed by an earlier treclaim.
      
      The current code is a legacy of earlier kernel implementations which did
      software rollback of active transactions in the kernel.  That code has now gone
      but we didn't correctly fix up this part of the signals code which still makes
      assumptions based on having software rollback.
      
      This changes the signal return code to always restore both contexts on 32 bit
      rt signal return.
      Signed-off-by: NMichael Neuling <mikey@neuling.org>
      cc: stable@vger.kernel.org (v3.9+)
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      55e43418
    • M
      powerpc/tm: Fix restoration of MSR on 32bit signal return · 2c27a18f
      Michael Neuling 提交于
      Currently we clear out the MSR TM bits on signal return assuming that the
      signal should never return to an active transaction.
      
      This is bogus as the user may do this.  It's most likely the transaction will
      be doomed due to a treclaim but that's a problem for the HW not the kernel.
      
      The current code is a legacy of earlier kernel implementations which did
      software rollback of active transactions in the kernel.  That code has now gone
      but we didn't correctly fix up this part of the signals code which still makes
      the assumption that it must be returning to a suspended transaction.
      
      This pulls out both MSR TM bits from the user supplied context rather than just
      setting TM suspend.  We pull out only the bits needed to ensure the user can't
      do anything dangerous to the MSR.
      Signed-off-by: NMichael Neuling <mikey@neuling.org>
      cc: stable@vger.kernel.org (v3.9+)
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      2c27a18f
    • M
      powerpc/tm: Fix 32 bit non-rt signals · fee55450
      Michael Neuling 提交于
      Currently sys_sigreturn() is TM unaware.  Therefore, if we take a 32 bit signal
      without SIGINFO (non RT) inside a transaction, on signal return we don't
      restore the signal frame correctly.
      
      This checks if the signal frame being restoring is an active transaction, and
      if so, it copies the additional state to ptregs so it can be restored.
      Signed-off-by: NMichael Neuling <mikey@neuling.org>
      cc: stable@vger.kernel.org (v3.9+)
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      fee55450
    • M
      powerpc/tm: Fix writing top half of MSR on 32 bit signals · 1d25f11f
      Michael Neuling 提交于
      The MSR TM controls are in the top 32 bits of the MSR hence on 32 bit signals,
      we stick the top half of the MSR in the checkpointed signal context so that the
      user can access it.
      
      Unfortunately, we don't currently write anything to the checkpointed signal
      context when coming in a from a non transactional process and hence the top MSR
      bits can contain junk.
      
      This updates the 32 bit signal handling code to always write something to the
      top MSR bits so that users know if the process is transactional or not and the
      kernel can use it on signal return.
      Signed-off-by: NMichael Neuling <mikey@neuling.org>
      cc: stable@vger.kernel.org (v3.9+)
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      1d25f11f
  5. 01 6月, 2013 1 次提交
    • M
      powerpc/tm: Fix userspace stack corruption on signal delivery for active transactions · 2b3f8e87
      Michael Neuling 提交于
      When in an active transaction that takes a signal, we need to be careful with
      the stack.  It's possible that the stack has moved back up after the tbegin.
      The obvious case here is when the tbegin is called inside a function that
      returns before a tend.  In this case, the stack is part of the checkpointed
      transactional memory state.  If we write over this non transactionally or in
      suspend, we are in trouble because if we get a tm abort, the program counter
      and stack pointer will be back at the tbegin but our in memory stack won't be
      valid anymore.
      
      To avoid this, when taking a signal in an active transaction, we need to use
      the stack pointer from the checkpointed state, rather than the speculated
      state.  This ensures that the signal context (written tm suspended) will be
      written below the stack required for the rollback.  The transaction is aborted
      becuase of the treclaim, so any memory written between the tbegin and the
      signal will be rolled back anyway.
      
      For signals taken in non-TM or suspended mode, we use the
      normal/non-checkpointed stack pointer.
      
      Tested with 64 and 32 bit signals
      Signed-off-by: NMichael Neuling <mikey@neuling.org>
      Cc: <stable@vger.kernel.org> # v3.9
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      2b3f8e87
  6. 10 4月, 2013 1 次提交
  7. 15 2月, 2013 1 次提交
  8. 04 2月, 2013 8 次提交
  9. 01 10月, 2012 1 次提交
  10. 02 6月, 2012 1 次提交
  11. 22 5月, 2012 2 次提交
  12. 29 3月, 2012 1 次提交
  13. 07 3月, 2012 1 次提交
    • M
      powerpc: Use set_current_blocked() and block_sigmask() · a2007ce8
      Matt Fleming 提交于
      As described in e6fa16ab ("signal: sigprocmask() should do
      retarget_shared_pending()") the modification of current->blocked is
      incorrect as we need to check whether the signal we're about to block
      is pending in the shared queue.
      
      Also, use the new helper function introduced in commit 5e6292c0
      ("signal: add block_sigmask() for adding sigmask to current->blocked")
      which centralises the code for updating current->blocked after
      successfully delivering a signal and reduces the amount of duplicate
      code across architectures. In the past some architectures got this
      code wrong, so using this helper function should stop that from
      happening again.
      
      Cc: Oleg Nesterov <oleg@redhat.com>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Paul Mackerras <paulus@samba.org>
      Cc: linuxppc-dev@lists.ozlabs.org
      Signed-off-by: NMatt Fleming <matt.fleming@intel.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      a2007ce8
  14. 17 11月, 2011 1 次提交
  15. 29 6月, 2011 1 次提交
  16. 23 9月, 2010 1 次提交
  17. 17 2月, 2010 2 次提交
    • D
      powerpc/booke: Add support for advanced debug registers · 3bffb652
      Dave Kleikamp 提交于
      powerpc/booke: Add support for advanced debug registers
      
      From: Dave Kleikamp <shaggy@linux.vnet.ibm.com>
      
      Based on patches originally written by Torez Smith.
      
      This patch defines context switch and trap related functionality
      for BookE specific Debug Registers. It adds support to ptrace()
      for setting and getting BookE related Debug Registers
      Signed-off-by: NDave Kleikamp <shaggy@linux.vnet.ibm.com>
      Cc: Torez Smith  <lnxtorez@linux.vnet.ibm.com>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: David Gibson <dwg@au1.ibm.com>
      Cc: Josh Boyer <jwboyer@linux.vnet.ibm.com>
      Cc: Kumar Gala <galak@kernel.crashing.org>
      Cc: Sergio Durigan Junior <sergiodj@br.ibm.com>
      Cc: Thiago Jung Bauermann <bauerman@br.ibm.com>
      Cc: linuxppc-dev list <Linuxppc-dev@ozlabs.org>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      3bffb652
    • D
      powerpc/booke: Introduce new CONFIG options for advanced debug registers · 172ae2e7
      Dave Kleikamp 提交于
      powerpc/booke: Introduce new CONFIG options for advanced debug registers
      
      From: Dave Kleikamp <shaggy@linux.vnet.ibm.com>
      
      Introduce new config options to simplify the ifdefs pertaining to the
      advanced debug registers for booke and 40x processors:
      
      CONFIG_PPC_ADV_DEBUG_REGS - boolean: true for dac-based processors
      CONFIG_PPC_ADV_DEBUG_IACS - number of IAC registers
      CONFIG_PPC_ADV_DEBUG_DACS - number of DAC registers
      CONFIG_PPC_ADV_DEBUG_DVCS - number of DVC registers
      CONFIG_PPC_ADV_DEBUG_DAC_RANGE - DAC ranges supported
      
      Beginning conservatively, since I only have the facilities to test 440
      hardware.  I believe all 40x and booke platforms support at least 2 IAC
      and 2 DAC registers.  For 440, 4 IAC and 2 DVC registers are enabled, as
      well as the DAC ranges.
      Signed-off-by: NDave Kleikamp <shaggy@linux.vnet.ibm.com>
      Acked-by: NDavid Gibson <dwg@au1.ibm.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      172ae2e7
  18. 27 3月, 2009 1 次提交
    • J
      powerpc: Sanitize stack pointer in signal handling code · efbda860
      Josh Boyer 提交于
      On powerpc64 machines running 32-bit userspace, we can get garbage bits in the
      stack pointer passed into the kernel.  Most places handle this correctly, but
      the signal handling code uses the passed value directly for allocating signal
      stack frames.
      
      This fixes the issue by introducing a get_clean_sp function that returns a
      sanitized stack pointer.  For 32-bit tasks on a 64-bit kernel, the stack
      pointer is masked correctly.  In all other cases, the stack pointer is simply
      returned.
      
      Additionally, we pass an 'is_32' parameter to get_sigframe now in order to
      get the properly sanitized stack.  The callers are know to be 32 or 64-bit
      statically.
      Signed-off-by: NJosh Boyer <jwboyer@linux.vnet.ibm.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      efbda860
  19. 11 11月, 2008 1 次提交
  20. 31 10月, 2008 1 次提交
    • M
      powerpc: Fix swapcontext system for VSX + old ucontext size · 16c29d18
      Michael Neuling 提交于
      Since VSX support was added, we now have two sizes of ucontext_t;
      the older, smaller size without the extra VSX state, and the new
      larger size with the extra VSX state.  A program using the
      sys_swapcontext system call and supplying smaller ucontext_t
      structures will currently get an EINVAL error if the task has
      used VSX (e.g. because of calling library code that uses VSX) and
      the old_ctx argument is non-NULL (i.e. the program is asking for
      its current context to be saved).  Thus the program will start
      getting EINVAL errors on calls that previously worked.
      
      This commit changes this behaviour so that we don't send an EINVAL in
      this case.  It will now return the smaller context but the VSX MSR bit
      will always be cleared to indicate that the ucontext_t doesn't include
      the extra VSX state, even if the task has executed VSX instructions.
      
      Both 32 and 64 bit cases are updated.
      
      [paulus@samba.org - also fix some access_ok() and get_user() calls]
      
      Thanks to Ben Herrenschmidt for noticing this problem.
      Signed-off-by: NMichael Neuling <mikey@neuling.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      16c29d18
  21. 15 7月, 2008 1 次提交
  22. 09 7月, 2008 1 次提交
  23. 03 7月, 2008 1 次提交
  24. 01 7月, 2008 3 次提交
    • M
      powerpc: Add VSX context save/restore, ptrace and signal support · ce48b210
      Michael Neuling 提交于
      This patch extends the floating point save and restore code to use the
      VSX load/stores when VSX is available.  This will make FP context
      save/restore marginally slower on FP only code, when VSX is available,
      as it has to load/store 128bits rather than just 64bits.
      
      Mixing FP, VMX and VSX code will get constant architected state.
      
      The signals interface is extended to enable access to VSR 0-31
      doubleword 1 after discussions with tool chain maintainers.  Backward
      compatibility is maintained.
      
      The ptrace interface is also extended to allow access to VSR 0-31 full
      registers.
      Signed-off-by: NMichael Neuling <mikey@neuling.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      ce48b210
    • M
      powerpc: Introduce VSX thread_struct and CONFIG_VSX · c6e6771b
      Michael Neuling 提交于
      The layout of the new VSR registers and how they overlap on top of the
      legacy FPR and VR registers is:
      
                         VSR doubleword 0               VSR doubleword 1
                ----------------------------------------------------------------
        VSR[0]  |             FPR[0]            |                              |
                ----------------------------------------------------------------
        VSR[1]  |             FPR[1]            |                              |
                ----------------------------------------------------------------
                |              ...              |                              |
                |              ...              |                              |
                ----------------------------------------------------------------
        VSR[30] |             FPR[30]           |                              |
                ----------------------------------------------------------------
        VSR[31] |             FPR[31]           |                              |
                ----------------------------------------------------------------
        VSR[32] |                             VR[0]                            |
                ----------------------------------------------------------------
        VSR[33] |                             VR[1]                            |
                ----------------------------------------------------------------
                |                              ...                             |
                |                              ...                             |
                ----------------------------------------------------------------
        VSR[62] |                             VR[30]                           |
                ----------------------------------------------------------------
        VSR[63] |                             VR[31]                           |
                ----------------------------------------------------------------
      
      VSX has 64 128bit registers.  The first 32 regs overlap with the FP
      registers and hence extend them with and additional 64 bits.  The
      second 32 regs overlap with the VMX registers.
      
      This commit introduces the thread_struct changes required to reflect
      this register layout.  Ptrace and signals code is updated so that the
      floating point registers are correctly accessed from the thread_struct
      when CONFIG_VSX is enabled.
      Signed-off-by: NMichael Neuling <mikey@neuling.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      c6e6771b
    • M
      powerpc: Fix MSR setting in 32 bit signal code · 9e751186
      Michael Neuling 提交于
      If we set the SPE MSR bit in save_user_regs we can blow away the VEC
      bit.  This doesn't matter in reality as they are in fact the same bit
      but looks bad.
      
      Also, when we add VSX in a later patch, we need to be able to set two
      separate MSR bits here.
      Signed-off-by: NMichael Neuling <mikey@neuling.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      9e751186
  25. 14 5月, 2008 1 次提交