The states are defined in the driver. We can get rid of the
intermediate cpuidle states initialization and the memcpy by
directly initializing the driver states.
Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: NAmit Daniel Kachhap <amit.daniel@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Setting this bit to 0 causes the system to wait until suspended
to use the wakeup masks.  With it being set high previously,
masked interrupts were being received and processed before the
EINT_WAKEUP_MASK was configured.
Signed-off-by: NJonathan Kliegman <kliegs@chromium.org>
Signed-off-by: NDoug Anderson <dianders@chromium.org>
Reviewed-by: NDoug Anderson <dianders@chromium.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

For legacy reasons EINT_0 was being forced on for all
exynos systems as a wake interrupt.  For boards that need
EINT_0 they should probably enable it with enable_irq_wake
Signed-off-by: NJonathan Kliegman <kliegs@chromium.org>
Signed-off-by: NDoug Anderson <dianders@chromium.org>
Reviewed-by: NDoug Anderson <dianders@chromium.org>
Reviewed-by: NThomas Abraham <thomas.ab@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Set the gic arch extension callback to support rtc wakeup.
Signed-off-by: NInderpal Singh <inderpal.singh@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Exynos boot is broken with commit 0529e315 (ARM: use common irqchip_init
for GIC init). This commit split the irqchip initialization into 2 calls
to of_irq_init. This does not work because of_irq_init requires interrupt
parents to be in the match list.

Rather than reverting exynos changes, make it do the proper thing by using
IRQCHIP_DECLARE. This requires moving the combiner code to drivers/irqchip.
Reported-by: NDoug Anderson <dianders@chromium.org>
Signed-off-by: NRob Herring <rob.herring@calxeda.com>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-samsung-soc@vger.kernel.org
Signed-off-by: NOlof Johansson <olof@lixom.net>

Newer Exynos4 SoC are equipped with a local camera ISP that
controls external raw image sensor directly. Such sensors
can be connected through FIMC-LITEn (and MIPI-CSISn) IPs to
the ISP, which then feeds image data to the FIMCn IP. Thus
there can be two busses associated with an image source
(sensor). Rename struct s5p_fimc_isp_info describing external
image sensor (video decoder) to struct fimc_source_info to
avoid confusion. bus_type is split into fimc_bus_type and
sensor_bus_type. The bus type enumeration is extended to
include both FIMC Writeback input types.
The bus_type enumeration and the data structure name in the
board files are modified according to the above changes.
Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Acked-by: NKukjin Kim <kgene.kim@samsung.com>
Signed-off-by: NMauro Carvalho Chehab <mchehab@redhat.com>

Since pinctrl-exynos can support exynos4 and exynos5 so changed
the option name to PINCTRL_EXYNOS for more clarity.

Cc: Thomas Abraham <Thomas.abraham@linaro.org>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

As per the Exynos5250 User Manual:
When there are pending interrupt events, WFI/WFE instruction are
ignored. To cancel the power-down sequence follow these steps:
1) Disable system power-down using CENTRAL_SEQ_CONFIGURATION register
2) Clear WAKEUP_STAT register
3) Enable interrupt service routine for CPU

Code for early wakeup for exynos already exists. Remove the panic
on suspend failure, clear the wakeup state register and return 1
from cpu_suspend to indicate a failed suspend (to a user daemon).

Older Samsung SoCs have similar panics and I have removed them all.
Haven't touched the S3C2410 sleep code.
Signed-off-by: NAbhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Add AUXDATA entries for i2s controller driver so as to set the device
name for clock lookups
Signed-off-by: NPadmavathi Venna <padma.v@samsung.com>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

The soft-reset control register is located in the XMU controller space.
Map this controller space before writing to the soft-reset controller
register.
Signed-off-by: NThomas Abraham <thomas.ab@samsung.com>
Signed-off-by: NGirish K S <ks.giri@samsung.com>
Signed-off-by: NKukjin <kgene.kim@samsung.com>

Fix the incorrect compatible property value of pinctrl for EXYNOS4 SoCs.

Cc: Thomas Abraham <thomas.ab@samsung.com>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Since pinctrl-exynos can support exynos4 and exynos5 so changed
the option name to PINCTRL_EXYNOS for more clarity.

Cc: Thomas Abraham <Thomas.abraham@linaro.org>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The clockevent core is able to figure out the best mult and shift,
calculate min_delta_ns and max_delta_ns, with the necessary info passed
into clockevents_config_and_register().  Use this combined configure
and register function where possible to make the codes less error prone
and gain some positive diff stat.
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Reviewed-by: NAnton Vorontsov <cbouatmailru@gmail.com>
Acked-by: NKukjin Kim <kgene.kim@samsung.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Tested-by: NRoland Stigge <stigge@antcom.de>
Acked-by: NEric Miao <eric.y.miao@gmail.com>
Cc: Haojian Zhuang <haojian.zhuang@gmail.com>
Cc: David Brown <davidb@codeaurora.org>
Tested-by: NTony Lindgren <tony@atomide.com>
Acked-by: NBarry Song <baohua.song@csr.com>
Tested-by: NStephen Warren <swarren@nvidia.com>
Acked-by: NTony Prisk <linux@prisktech.co.nz>
Cc: Lennert Buytenhek <buytenh@wantstofly.org>
Cc: Wan ZongShun <mcuos.com@gmail.com>
Acked-by: NViresh Kumar <viresh.kumar@linaro.org>
Acked-by: NArnd Bergmann <arnd@arndb.de>
Acked-by: NJason Cooper <jason@lakedaemon.net>
Reviewed-by: NThomas Gleixner <tglx@linutronix.de>
Signed-off-by: NOlof Johansson <olof@lixom.net>

Now that we have GIC moved to drivers/irqchip and all GIC DT init for
platforms using irqchip_init, move gic.h and update the remaining
includes.
Signed-off-by: NRob Herring <rob.herring@calxeda.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Anton Vorontsov <avorontsov@mvista.com>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: David Brown <davidb@codeaurora.org>
Cc: Daniel Walker <dwalker@fifo99.com>
Cc: Bryan Huntsman <bryanh@codeaurora.org>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Viresh Kumar <viresh.linux@gmail.com>
Cc: Shiraz Hashim <shiraz.hashim@st.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Samuel Ortiz <sameo@linux.intel.com>

Convert all GIC DT initialization over to use common irqchip_init
function.
Signed-off-by: NRob Herring <rob.herring@calxeda.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Acked-by: NShawn Guo <shawn.guo@linaro.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: David Brown <davidb@codeaurora.org>
Cc: Daniel Walker <dwalker@fifo99.com>
Cc: Bryan Huntsman <bryanh@codeaurora.org>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Viresh Kumar <viresh.linux@gmail.com>
Cc: Shiraz Hashim <shiraz.hashim@st.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Cc: Linus Walleij <linus.walleij@linaro.org>

Now that the GIC initialization sets up the handle_arch_irq pointer, we
can remove it for all machines and make it static.
Signed-off-by: NRob Herring <rob.herring@calxeda.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Anton Vorontsov <avorontsov@mvista.com>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: David Brown <davidb@codeaurora.org>
Cc: Daniel Walker <dwalker@fifo99.com>
Cc: Bryan Huntsman <bryanh@codeaurora.org>
Acked-by: NTony Lindgren <tony@atomide.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Shiraz Hashim <shiraz.hashim@st.com>
Acked-by: NStephen Warren <swarren@nvidia.com>
Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Acked-by: NViresh Kumar <viresh.kumar@linaro.org>
Acked-by: NKukjin Kim <kgene.kim@samsung.com>
Acked-by: NShawn Guo <shawn.guo@linaro.org>
Acked-by: NOlof Johansson <olof@lixom.net>
Acked-by: NArnd Bergmann <arnd@arndb.de>

This removes System MMU initialization from arch/arm/mach-exynos/
to move them to DT and the exynos-iommu driver except gating clock
definitions.
Signed-off-by: NKyongHo Cho <pullip.cho@samsung.com>
Acked-by: NKukjin Kim <kgene.kim@samsung.com>
Signed-off-by: NJoerg Roedel <joro@8bytes.org>

Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Cc: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

In preparation of moving gic code to drivers/irqchip, remove the direct
platform dependencies on gic_raise_softirq. Move the setup of
smp_cross_call into the gic code and use arch_send_wakeup_ipi_mask
function to trigger wake-up IPIs.
Signed-off-by: NRob Herring <rob.herring@calxeda.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: David Brown <davidb@codeaurora.org>
Cc: Daniel Walker <dwalker@fifo99.com>
Cc: Bryan Huntsman <bryanh@codeaurora.org>
Acked-by: NTony Lindgren <tony@atomide.com>
Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Magnus Damm <magnus.damm@gmail.com>
Acked-by: NViresh Kumar <viresh.kumar@linaro.org>
Cc: Shiraz Hashim <shiraz.hashim@st.com>
Acked-by: NStephen Warren <swarren@nvidia.com>
Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Acked-by: NOlof Johansson <olof@lixom.net>

Since exynos5440 can support only common clk stuff, so this
patch skips legacy exynos5 clock initialization.
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch removes following warning in kernel boot log,
Because EXYNOS5440 can support only Pinctrl not GPIO.

WARNING: at drivers/gpio/gpio-samsung.c:3102 samsung_gpiolib_init+0x68/0x8c()
Unknown SoC in gpio-samsung, no GPIOs added

Cc: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Now that the only field in struct sys_timer is .init, delete the struct,
and replace the machine descriptor .timer field with the initialization
function itself.

This will enable moving timer drivers into drivers/clocksource without
having to place a public prototype of each struct sys_timer object into
include/linux; the intent is to create a single of_clocksource_init()
function that determines which timer driver to initialize by scanning
the device dtree, much like the proposed irqchip_init() at:
http://www.spinics.net/lists/arm-kernel/msg203686.html

Includes mach-omap2 fixes from Igor Grinberg.
Tested-by: NRobert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: NStephen Warren <swarren@nvidia.com>

Signed-off-by: NJonghwan Choi <jhbird.choi@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

The variable 'max_support_idx, min_support_idx, pm_lock_idx"
are never used, so remove the unused variable.
Signed-off-by: NJonghwan Choi <jhbird.choi@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

I2S controller has an internal mux for RCLK source clks. The list
of source clk names were passed through platform data in non-dt case.
The variable holding the list of RCLK source clk names is not
required, as the list of clks need to be registered with clkdev
using generic connection id. This is required as part of adding DT
support for I2S controller driver.
Signed-off-by: NPadmavathi Venna <padma.v@samsung.com>
Acked-by: NSangbeom Kim <sbkim73@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Replace clock instance name of MSHC controller for BIC and CIU of Exynos4412.
Signed-off-by: NDongjin Kim <tobetter@gmail.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

When DRM support for Samsung SoC and Samsung S3C framebuffer support
are selected, the kernel crashes as it does not get the required
platform data. Change the compile macro to CONFIG_DRM_EXYNOS_FIMD
to fix this.
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

When DRM support for Samsung SoC and Samsung S3C framebuffer support
are selected, the kernel crashes as it does not get the required
platform data. Change the compile macro to CONFIG_DRM_EXYNOS_FIMD
to fix this.

Fixes the following boot time crash:
Unable to handle kernel NULL pointer dereference at virtual address 00000000
PC is at 0x0
LR is at s3c_fb_probe+0x198/0x788
[<c0152270>] (s3c_fb_probe+0x198/0x788) from [<c019e52c>] (platform_drv_probe+0x18/0x1c)
[<c019e52c>] (platform_drv_probe+0x18/0x1c) from [<c019d2e4>] (driver_probe_device+0x70/0x1f0)
[<c019d2e4>] (driver_probe_device+0x70/0x1f0) from [<c019d4f0>] (__driver_attach+0x8c/0x90)
[<c019d4f0>] (__driver_attach+0x8c/0x90) from [<c019bc3c>] (bus_for_each_dev+0x50/0x7c)
[<c019bc3c>] (bus_for_each_dev+0x50/0x7c) from [<c019cb4c>] (bus_add_driver+0x170/0x23c)
[<c019cb4c>] (bus_add_driver+0x170/0x23c) from [<c019d9a4>] (driver_register+0x78/0x144)
[<c019d9a4>] (driver_register+0x78/0x144) from [<c000862c>] (do_one_initcall+0x34/0x174)
[<c000862c>] (do_one_initcall+0x34/0x174) from [<c020ed7c>] (kernel_init+0x100/0x2a0)
[<c020ed7c>] (kernel_init+0x100/0x2a0) from [<c000e118>] (ret_from_fork+0x14/0x3c)
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

When DRM support for Samsung SoC and Samsung S3C framebuffer support
are selected, the kernel crashes as it does not get the required
platform data. Change the compile macro to CONFIG_DRM_EXYNOS_FIMD
to fix this.

Without this patch the following crash occurs during bootup:

Unable to handle kernel NULL pointer dereference at virtual address 00000000
PC is at 0x0
LR is at s3c_fb_probe+0x198/0x788
[<c01520e8>] (s3c_fb_probe+0x198/0x788) from [<c01a3dd4>] (platform_drv_probe+0x18/0x1c)
[<c01a3dd4>] (platform_drv_probe+0x18/0x1c) from [<c01a2b8c>] (driver_probe_device+0x70/0x1f0)
[<c01a2b8c>] (driver_probe_device+0x70/0x1f0) from [<c01a2d98>] (__driver_attach+0x8c/0x90)
[<c01a2d98>] (__driver_attach+0x8c/0x90) from [<c01a14e4>] (bus_for_each_dev+0x50/0x7c)
[<c01a14e4>] (bus_for_each_dev+0x50/0x7c) from [<c01a23f4>] (bus_add_driver+0x170/0x23c)
[<c01a23f4>] (bus_add_driver+0x170/0x23c) from [<c01a324c>] (driver_register+0x78/0x144)
[<c01a324c>] (driver_register+0x78/0x144) from [<c000862c>] (do_one_initcall+0x34/0x174)
[<c000862c>] (do_one_initcall+0x34/0x174) from [<c01de210>] (kernel_init+0x100/0x2a0)
[<c01de210>] (kernel_init+0x100/0x2a0) from [<c000e118>] (ret_from_fork+0x14/0x3c)
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This fixes following:
arch/arm/mach-exynos/built-in.o: In function `exynos5_reserve':
arch/arm/mach-exynos/mach-exynos5-dt.c:177: undefined reference to `s5p_fdt_find_mfc_mem'
arch/arm/mach-exynos/mach-exynos5-dt.c:177: undefined reference to `s5p_fdt_find_mfc_mem'
arch/arm/mach-exynos/mach-exynos5-dt.c:178: undefined reference to `s5p_mfc_reserve_mem'
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

In file included from arch/arm/mach-exynos/clock-exynos5.c:29:0:
arch/arm/mach-exynos/common.h:28:12: warning: 'exynos_pm_late_initcall' defined but not used [-Wunused-function]
Signed-off-by: NOlof Johansson <olof@lixom.net>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Shawn Guo <shawn.guo@linaro.org>

Previously, the ASoC 'platform' (PCM/DMA) object was instantiated via a
platform_device. This didn't represent the hardware well, since there
was no separate hardware associated with this platform_device; it was a
virtual device with sole purpose to call snd_soc_register_platform().

This change removes the platform_device completely. Each Samsung DAI now
registers the ASoC 'platform' itself. Machine drivers are adjusted for
the new 'platform' name.
Signed-off-by: NPadmavathi Venna <padma.v@samsung.com>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

The recent commit "ARM: EXYNOS: add support for EXYNOS5440 SoC" broke
support for exynos5250 because of_machine_is_compatible() was used too
early in the boot process.  It also probably meant that the exynos5440
failed to use the proper iotable.  Switch to use
of_flat_dt_is_compatible() in both of these cases.

The failure I was seeing in exynos5250 because of this was:
  Division by zero in kernel.
  [<80015ed4>] (unwind_backtrace+0x0/0xec) from [<8045c7a4>] (dump_stack+0x20/0x24)
  [<8045c7a4>] (dump_stack+0x20/0x24) from [<80012990>] (__div0+0x20/0x28)
  [<80012990>] (__div0+0x20/0x28) from [<8021ab04>] (Ldiv0_64+0x8/0x18)
  [<8021ab04>] (Ldiv0_64+0x8/0x18) from [<80068560>] (__clocksource_updatefreq_scale+0x54/0x134)
  [<80068560>] (__clocksource_updatefreq_scale+0x54/0x134) from [<8006865c>] (__clocksource_register_scale+0x1c/0x54)
  [<8006865c>] (__clocksource_register_scale+0x1c/0x54) from [<80612a18>] (exynos_timer_init+0x100/0x1e8)
  [<80612a18>] (exynos_timer_init+0x100/0x1e8) from [<8060d184>] (time_init+0x28/0x38)
  [<8060d184>] (time_init+0x28/0x38) from [<8060a754>] (start_kernel+0x1e0/0x3c8)
  [<8060a754>] (start_kernel+0x1e0/0x3c8) from [<40008078>] (0x40008078)
Signed-off-by: NDoug Anderson <dianders@chromium.org>
Acked-by: NKukjin Kim <kgene.kim@samsung.com>
[olofj: fixed two build errors, one missing include and one !CONFIG_OF failure]
Signed-off-by: NOlof Johansson <olof@lixom.net>

Add missing PL330 MDMA1 controller node to the device tree (DT).

[ Currently there is no problem with using 'non-secure' mdma1 address
  instead of 'secure' one on revision 0 of Exynos4210 SOC (as used by
  Universal C210 board) as this SOC revision is unsupported by DT. ]
Reviewed-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Exynos4412 uses different information register for each core. This
patch adjusts the bring-up code to take that into account.
Signed-off-by: NTomasz Figa <t.figa@samsung.com>
Reviewed-by: NKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Remove the unused regs-mem.h file
Signed-off-by: NThomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>