Marvell's PXA/MMP silicon also match the behavior of pinctrl-single.
Each pin binds to one register. A lot of pins could be configured
as gpio.

GPIO range is defined as a child node of pinmux in .dtsi file. If those
pins are with the same gpio function configuration in the pinmux
register, they could be defined in the same GPIO range. For this new
child node, two properties are used.

reg = <the start of pinmux register in range, size of range>

pinctrl-single,gpio: <gpio base in range, the gpio function of the range
		in the pinmux register>
Signed-off-by: NHaojian Zhuang <haojian.zhuang@gmail.com>
Acked-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

In Marvell PXA/MMP silicons, input schmitt disable value is 0x40, not 0.
So append new config parameter -- input schmitt disable.
Signed-off-by: NHaojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Let's stop spawning the pinctrl driver from the GPIO driver,
we have these two mechanisms broken apart now, and they can
each probe in isolation. If the GPIO driver cannot find its
pin controller (pinctrl-u300), the pin controller core will
tell it to defer probing.
Reviewed-by: NStephen Warren <swarren@nvidia.com>
Reviewed-by: NViresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Instead of having the pinctrl driver register the GPIO range
for the gpio_chip, making it necessary to instantiate the
pin controller from the GPIO driver and pass the GPIO chip as
platform data, now let the GPIO chip driver register it's own
ranges and have the pinctrl driver look up the GPIO chip from
the pinctrl core as necessary.
Reviewed-by: NStephen Warren <swarren@nvidia.com>
Reviewed-by: NViresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This adds a function to the pinctrl core to retrieve the GPIO
range associated with a certain pin for a certain controller.
This is needed when a pinctrl driver want to look up the
corresponding struct gpio_chip for a certain pin. As the
GPIO drivers can now create these ranges themselves, the
pinctrl driver no longer knows about all its associated GPIO
chips.
Reviewed-by: NStephen Warren <swarren@nvidia.com>
Reviewed-by: NViresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

If we try to create a range for a certain GPIO chip and the
target pin controller is not yet available it may return
a probe deferral error code, so handle this all the way
our by checking the error code.
Reviewed-by: NStephen Warren <swarren@nvidia.com>
Reviewed-by: NViresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This makes the pinctrl_find_and_add_gpio_range() return
-EPROBE_DEFER if the range hosting pin controller cannot be
located. We may assume that the common case for why adding a
range fails is that the targe pin controller device has not
probed yet.
Reviewed-by: NStephen Warren <swarren@nvidia.com>
Reviewed-by: NViresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Rename the function find_pinctrl_and_add_gpio_range()
to pinctrl_find_and_add_gpio_range() so as to be consistent
with the rest of the functions.
Reviewed-by: NStephen Warren <swarren@nvidia.com>
Reviewed-by: NViresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Like with commit 3c739ad0
it is not always enough to specify all the pins of a gpio_chip
from offset zero to be added to a pin map range, since the
mapping from GPIO to pin controller may not be linear at all,
but need to be broken into a few consecutive sub-ranges or
1-pin entries for complicated cases. The ranges may also be
sparse.

This alters the signature of the function to accept offsets
into both the GPIO-chip local pinspace and the pin controller
local pinspace.
Reviewed-by: NStephen Warren <swarren@nvidia.com>
Reviewed-by: NViresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

They are not referenced outside of this file, make them static.
Signed-off-by: NAxel Lin <axel.lin@ingics.com>
Acked-by: NLee Jones <lee.jones@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

of_match_device() may return NULL.
Signed-off-by: NAxel Lin <axel.lin@ingics.com>
Acked-by: NLee Jones <lee.jones@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Dump pinmux register value, not only function part in the pinmux
register.

Also fix the issue on caluclating pin offset. The last parameter
should be pin number, not register offset.
Signed-off-by: NHaojian Zhuang <haojian.zhuang@gmail.com>
Acked-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

SPEAr SoC's don't do anything in clk_prepare() of plgpio driver,
so there is no need to call this routine multiple times. Just
call it once at probe.
Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This driver allows clk_get() failure, and still work without it.
This patch adds !IS_ERR(plgpio->clk) checking in plgpio_request() error path
so we only call clk_disable_unprepare() if clk_prepare_enable() is called.
Signed-off-by: NAxel Lin <axel.lin@ingics.com>
Acked-by: NViresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Currently get_gpio_pingroup() may return NULL or ERR_PTR(-EINVAL) when
no gpio_pingroup found. The caller in gpio_request_endisable() only
checks if the return value is NULL. Return ERR_PTR(-EINVAL) for
get_gpio_pingroup() causes problem and seems not necessary.
Signed-off-by: NAxel Lin <axel.lin@ingics.com>
Acked-by: NViresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Return -ENOMEM instead of 0 if irq_domain_add_linear fails.
Signed-off-by: NAxel Lin <axel.lin@ingics.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Current code does not work if count > 1, fix it.
Signed-off-by: NAxel Lin <axel.lin@ingics.com>
Acked-by: NViresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Current code sets "pin_reg = &info->pin_regs[i];" in each loop iteration,
so in the case of no-match, pin_reg is not NULL.
Signed-off-by: NAxel Lin <axel.lin@ingics.com>
Acked-by: NDong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

They are not referenced outside of this file, make them static.
Signed-off-by: NAxel Lin <axel.lin@ingics.com>
Acked-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The clkout group is split into groups clkout1 and clkout2
which allows pins cklkout1 and clkout2 to be muxed
separately.
Signed-off-by: NPatrice Chotard <patrice.chotard@stericsson.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The clkout group is split into groups clkout1 and clkout2
which allows pins cklkout1 and clkout2 to be muxed
separately.
Signed-off-by: NPatrice Chotard <patrice.chotard@stericsson.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

They are not used, remove them.
Signed-off-by: NAxel Lin <axel.lin@ingics.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Use managed resources API to simplify the code.
Also ensure we do request mem_region before ioremap.
Signed-off-by: NAxel Lin <axel.lin@ingics.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Then we can remove "select PINMUX && PINCONF" from PINCTRL_TEGRA{20,30}.
This simplifies the dependency.
Signed-off-by: NAxel Lin <axel.lin@ingics.com>
Acked-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Then we can remove "select PINMUX && PINCONF" from PINCTRL_IMX{23,28}.
This simplifies the dependency.
Signed-off-by: NAxel Lin <axel.lin@ingics.com>
Acked-by: NShawn Guo <shawn.guo@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

They are not referenced outside of this file, make them static.
Signed-off-by: NAxel Lin <axel.lin@ingics.com>
Acked-by: NViresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Currently pinmux_enable_setting does not release all taken pins if
ops->enable() returns error. This patch ensures all taken pins are
released in any error paths.
Signed-off-by: NAxel Lin <axel.lin@ingics.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Both ltq_pinctrl_dt_node_to_map() and ltq_pinctrl_dt_free_map() are not
referenced outside of this file. Make them static.
Signed-off-by: NAxel Lin <axel.lin@ingics.com>
Acked-by: NJohn Crispin <blogic@openwrt.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Current code adds empty ltq_pmx_disable() because pinmux_check_ops() requires
this callback to be defined.

This is not required since commit 02b50ce4
"pinctrl: make pinmux disable function optional".

Thus remove ltq_pmx_disable() function.
Signed-off-by: NAxel Lin <axel.lin@ingics.com>
Acked-by: NJohn Crispin <blogic@openwrt.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Different SPEAr SoCs have different approach to configure pins as gpios. Some
configure a group of gpios with single register bit and others have one bit per
gpio pin. Only earlier one is implemented till now, this patch adds support for
later one.

Here we add callbacks to SoC specific code to configure gpios in
gpio_request_enable(). That will do additional SoC specific configuration to
enable gpio pins.

We also implement this callback for SPEAr1340 in this patch.
Signed-off-by: NShiraz Hashim <shiraz.hashim@st.com>
Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

They are not referenced outside respective driver.
Signed-off-by: NAxel Lin <axel.lin@ingics.com>
Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Simon Arlott <simon@fire.lp0.eu>
Cc: John Crispin <blogic@openwrt.org>
Cc: Shawn Guo <shawn.guo@linaro.org>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: NDong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This patch adds plgpio nodes in SPEAr DT files.
Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Most of SPEAr SoCs, which support pinctrl, can configure & use pads as gpio.
This patch gpio enable support for SPEAr pinctrl drivers.
Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The <*/gpio.h> includes are updated again: now we need to account
for the problem introduced by commit:
595679a8038584df7b9398bf34f61db3c038bfea
"gpiolib: fix up function prototypes etc"

Actually we need static inlines in include/asm-generic/gpio.h
as well since we may have GPIOLIB but not PINCTRL.
Make sure to move all the CONFIG_PINCTRL business
to the end of the file so we are sure we have
declared struct gpio_chip.

And we need to keep the static inlines in <linux/gpio.h>
but here for the !CONFIG_GENERIC_GPIO case, and then we
may as well throw in a few warnings like the other
prototypes there, if someone would have the bad taste
of compiling without GENERIC_GPIO even.
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The fact that of_gpiochip_add_pin_range() and
gpiochip_add_pin_range() share too much code is fragile and
will invariably mean that bugs need to be fixed in two places
instead of one.

So separate the concerns of gpiolib.c and gpiolib-of.c and
have the latter call the former as back-end. This is necessary
also when going forward with other device descriptions such
as ACPI.

This is done by:

- Adding a return code to gpiochip_add_pin_range() so we can
  reliably check whether this succeeds.

- Get rid of the custom of_pinctrl_add_gpio_range() from
  pinctrl. Instead create of_pinctrl_get() to just retrive the
  pin controller per se from an OF node. This composite
  function was just begging to be deleted, it was way to
  purpose-specific.

- Use pinctrl_dev_get_name() to get the name of the retrieved
  pin controller and use that to call back into the generic
  gpiochip_add_pin_range().

Now the pin range is only allocated and tied to a pin
controller from the core implementation in gpiolib.c.
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This makes us call gpiochio_remove_pin_ranges() in the
gpiochip_remove() function, so we get rid of ranges when
freeing the chip.
Reviewed-by: NStephen Warren <swarren@nvidia.com>
Reviewed-by: NViresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Commit 69e1601bca88809dc118abd1becb02c15a02ec71
"gpiolib: provide provision to register pin ranges"

Introduced both of_gpiochip_remove_pin_range() and
gpiochip_remove_pin_ranges(). But the contents are exactly
the same so remove the OF one and rely on the range deletion
in the core.
Reviewed-by: NStephen Warren <swarren@nvidia.com>
Reviewed-by: NViresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Commit 69e1601bca88809dc118abd1becb02c15a02ec71
"gpiolib: provide provision to register pin ranges"

Declared the of_gpiochip_[add|remove]_pin_range() global
while they should be static as they are only ever used in
this file. Let's convert them to static.
Reviewed-by: NStephen Warren <swarren@nvidia.com>
Reviewed-by: NViresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>