1. 07 3月, 2013 1 次提交
  2. 06 3月, 2013 2 次提交
    • P
      drm/i915: Fix incorrect definition of ADPA HSYNC and VSYNC bits · 60222c0c
      Patrik Jakobsson 提交于
      Disable bits for ADPA HSYNC and VSYNC where mixed up resulting in suspend
      becoming standby and vice versa. Fixed by swapping their bit position.
      Reported-by: NVille Syrjälä <ville.syrjala@linux.intel.com>
      Signed-off-by: NPatrik Jakobsson <patrik.r.jakobsson@gmail.com>
      Reviewed-by: NEric Anholt <eric@anholt.net>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      60222c0c
    • P
      drm/i915: also disable south interrupts when handling them · 44498aea
      Paulo Zanoni 提交于
      From the docs:
      
        "IIR can queue up to two interrupt events. When the IIR is cleared,
        it will set itself again after one clock if a second event was
        stored."
      
        "Only the rising edge of the PCH Display interrupt will cause the
        North Display IIR (DEIIR) PCH Display Interrupt even bit to be set,
        so all PCH Display Interrupts, including back to back interrupts,
        must be cleared before a new PCH Display interrupt can cause DEIIR
        to be set".
      
      The current code works fine because we don't get many interrupts, but
      if we enable the PCH FIFO underrun interrupts we'll start getting so
      many interrupts that at some point new PCH interrupts won't cause
      DEIIR to be set.
      
      The initial implementation I tried was to turn the code that checks
      SDEIIR into a loop, but we can still get interrupts even after the
      loop is done (and before the irq handler finishes), so we have to
      either disable the interrupts or mask them. In the end I concluded
      that just disabling the PCH interrupts is enough, you don't even need
      the loop, so this is what this patch implements. I've tested it and it
      passes the 2 "PCH FIFO underrun interrupt storms" I can reproduce:
      the "ironlake_crtc_disable" case and the "wrong watermarks" case.
      
      In other words, here's how to reproduce the problem fixed by this
      patch:
        1 - Enable PCH FIFO underrun interrupts (SERR_INT on SNB+)
        2 - Boot the machine
        3 - While booting we'll get tons of PCH FIFO underrun interrupts
        4 - Plug a new monitor
        5 - Run xrandr, notice it won't detect the new monitor
        6 - Read SDEIIR and notice it's not 0 while DEIIR is 0
      
      Q: Can't we just clear DEIIR before SDEIIR?
      A: It doesn't work. SDEIIR has to be completely cleared (including the
      interrupts stored on its back queue) before it can flip DEIIR's bit to
      1 again, and even while you're clearing it you'll be getting more and
      more interrupts.
      
      Q: Why does it work by just disabling+enabling the south interrupts?
      A: Because when we re-enable them, if there's something on the SDEIIR
      register (maybe an interrupt stored on the queue), the re-enabling
      will make DEIIR's bit flip to 1, and since we'll already have
      interrupts enabled we'll get another interrupt, then run our irq
      handler again to process the "back" interrupts.
      
      v2: Even bigger commit message, added code comments.
      
      Note that this fixes missed dp aux irqs which have been reported for
      3.9-rc1. This regression has been introduced by switching to
      irq-driven dp aux transactions with
      
      commit 9ee32fea
      Author: Daniel Vetter <daniel.vetter@ffwll.ch>
      Date:   Sat Dec 1 13:53:48 2012 +0100
      
          drm/i915: irq-drive the dp aux communication
      
      References: http://www.mail-archive.com/intel-gfx@lists.freedesktop.org/msg18588.html
      References: https://lkml.org/lkml/2013/2/26/769Tested-by: NImre Deak <imre.deak@intel.com>
      Reported-by: NSedat Dilek <sedat.dilek@gmail.com>
      Reported-by: NLinus Torvalds <torvalds@linux-foundation.org>
      Signed-off-by: NPaulo Zanoni <paulo.r.zanoni@intel.com>
      [danvet: Pimp commit message with references for the dp aux irq
      timeout regression this fixes.]
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      44498aea
  3. 05 3月, 2013 3 次提交
  4. 04 3月, 2013 10 次提交
  5. 03 3月, 2013 4 次提交
    • J
      metag: Internal and external irqchips · 5698c50d
      James Hogan 提交于
      Meta core internal interrupts (from HWSTATMETA and friends) are vectored
      onto the TR1 core trigger for the current thread. This is demultiplexed
      in irq-metag.c to individual Linux IRQs for each internal interrupt.
      
      External SoC interrupts (from HWSTATEXT and friends) are vectored onto
      the TR2 core trigger for the current thread. This is demultiplexed in
      irq-metag-ext.c to individual Linux IRQs for each external SoC interrupt.
      The external irqchip has devicetree bindings for configuring the number
      of irq banks and the type of masking available.
      Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
      Cc: Arnd Bergmann <arnd@arndb.de>
      Cc: Grant Likely <grant.likely@secretlab.ca>
      Cc: Rob Herring <rob.herring@calxeda.com>
      Cc: Rob Landley <rob@landley.net>
      Cc: Dom Cobley <popcornmix@gmail.com>
      Cc: Simon Arlott <simon@fire.lp0.eu>
      Cc: Viresh Kumar <viresh.kumar@linaro.org>
      Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
      Cc: devicetree-discuss@lists.ozlabs.org
      Cc: linux-doc@vger.kernel.org
      5698c50d
    • J
      metag: Time keeping · a2c5d4ed
      James Hogan 提交于
      Add time keeping code for metag. Meta hardware threads have 2 timers.
      The background timer (TXTIMER) is used as a free-running time base, and
      the interrupt timer (TXTIMERI) is used for the timer interrupt. Both
      counters traditionally count at approximately 1MHz.
      Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
      Cc: John Stultz <johnstul@us.ibm.com>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      a2c5d4ed
    • H
      parisc: check return value of down_interruptible() in hp_sdc_rtc.c · 15fb9683
      Helge Deller 提交于
      additionally comment out unused code (which may be used later)
      Signed-off-by: NHelge Deller <deller@gmx.de>
      15fb9683
    • Y
      x86, ACPI, mm: Revert movablemem_map support · 20e6926d
      Yinghai Lu 提交于
      Tim found:
      
        WARNING: at arch/x86/kernel/smpboot.c:324 topology_sane.isra.2+0x6f/0x80()
        Hardware name: S2600CP
        sched: CPU #1's llc-sibling CPU #0 is not on the same node! [node: 1 != 0]. Ignoring dependency.
        smpboot: Booting Node   1, Processors  #1
        Modules linked in:
        Pid: 0, comm: swapper/1 Not tainted 3.9.0-0-generic #1
        Call Trace:
          set_cpu_sibling_map+0x279/0x449
          start_secondary+0x11d/0x1e5
      
      Don Morris reproduced on a HP z620 workstation, and bisected it to
      commit e8d19552 ("acpi, memory-hotplug: parse SRAT before memblock
      is ready")
      
      It turns out movable_map has some problems, and it breaks several things
      
      1. numa_init is called several times, NOT just for srat. so those
      	nodes_clear(numa_nodes_parsed)
      	memset(&numa_meminfo, 0, sizeof(numa_meminfo))
         can not be just removed.  Need to consider sequence is: numaq, srat, amd, dummy.
         and make fall back path working.
      
      2. simply split acpi_numa_init to early_parse_srat.
         a. that early_parse_srat is NOT called for ia64, so you break ia64.
         b.  for (i = 0; i < MAX_LOCAL_APIC; i++)
      	     set_apicid_to_node(i, NUMA_NO_NODE)
           still left in numa_init. So it will just clear result from early_parse_srat.
           it should be moved before that....
         c.  it breaks ACPI_TABLE_OVERIDE...as the acpi table scan is moved
             early before override from INITRD is settled.
      
      3. that patch TITLE is total misleading, there is NO x86 in the title,
         but it changes critical x86 code. It caused x86 guys did not
         pay attention to find the problem early. Those patches really should
         be routed via tip/x86/mm.
      
      4. after that commit, following range can not use movable ram:
        a. real_mode code.... well..funny, legacy Node0 [0,1M) could be hot-removed?
        b. initrd... it will be freed after booting, so it could be on movable...
        c. crashkernel for kdump...: looks like we can not put kdump kernel above 4G
      	anymore.
        d. init_mem_mapping: can not put page table high anymore.
        e. initmem_init: vmemmap can not be high local node anymore. That is
           not good.
      
      If node is hotplugable, the mem related range like page table and
      vmemmap could be on the that node without problem and should be on that
      node.
      
      We have workaround patch that could fix some problems, but some can not
      be fixed.
      
      So just remove that offending commit and related ones including:
      
       f7210e6c ("mm/memblock.c: use CONFIG_HAVE_MEMBLOCK_NODE_MAP to
          protect movablecore_map in memblock_overlaps_region().")
      
       01a178a9 ("acpi, memory-hotplug: support getting hotplug info from
          SRAT")
      
       27168d38 ("acpi, memory-hotplug: extend movablemem_map ranges to
          the end of node")
      
       e8d19552 ("acpi, memory-hotplug: parse SRAT before memblock is
          ready")
      
       fb06bc8e ("page_alloc: bootmem limit with movablecore_map")
      
       42f47e27 ("page_alloc: make movablemem_map have higher priority")
      
       6981ec31 ("page_alloc: introduce zone_movable_limit[] to keep
          movable limit for nodes")
      
       34b71f1e ("page_alloc: add movable_memmap kernel parameter")
      
       4d59a751 ("x86: get pg_data_t's memory from other node")
      
      Later we should have patches that will make sure kernel put page table
      and vmemmap on local node ram instead of push them down to node0.  Also
      need to find way to put other kernel used ram to local node ram.
      Reported-by: NTim Gardner <tim.gardner@canonical.com>
      Reported-by: NDon Morris <don.morris@hp.com>
      Bisected-by: NDon Morris <don.morris@hp.com>
      Tested-by: NDon Morris <don.morris@hp.com>
      Signed-off-by: NYinghai Lu <yinghai@kernel.org>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Thomas Renninger <trenn@suse.de>
      Cc: Tejun Heo <tj@kernel.org>
      Cc: Tang Chen <tangchen@cn.fujitsu.com>
      Cc: Yasuaki Ishimatsu <isimatu.yasuaki@jp.fujitsu.com>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      20e6926d
  6. 02 3月, 2013 20 次提交