This patch splits EXYNOS4 clock code to EXYNOS4 common,
EXYNOS4210 and EXYNOS4212 for supporting new EXYNOS4212
SoC with one kernel image. Of course, this patch adds
some clock codes for EXYNOS4212 SoC.
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds Samsung EXYNOS4212 SoC support.
The EXYNOS4212 integrates a ARM Cortex A9 multi-core.
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds plat-samsung/cpu.c for detecting of cpu id and
silicon revision.

This patch was originally from Changhwan Youn <chaos.youn@samsung.com>
Acked-by: NChanghwan Youn <chaos.youn@samsung.com>
Cc: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

The soc_is_[name]() can be used to distinguish cpu at runtime.

This patch was originally from Changhwan Youn <chaos.youn@samsung.com>
Acked-by: NChanghwan Youn <chaos.youn@samsung.com>
Cc: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Should be passing the parent clk object when
calling for parent rate.
Signed-off-by: NNaveen Krishna Chatradhi <ch.naveen@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds chained IRQ enter/exit functions to gpio interrupt
handler in order to function correctly on primary controllers with
different methods of flow control.
Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Add support for MFC device to plat-s5p, mach-exynos4, mach-s5pv210:
 - clock support
 - memory mapping and reserving
 - s5p_device_mfc platform device
Signed-off-by: NKamil Debski <k.debski@samsung.com>
Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds platform device s5p_device_fimd0 for EXYNOS4 FIMD0.
EXYNOS4 has two FIMDs(FIMD0, FIMD1). FIMD1 will be added later.
Some definitions used to enable EXYNOS4 FIMD0 are added.
Signed-off-by: NJonghun Han <jonghun.han@samsung.com>
Signed-off-by: NJingoo Han <jg1.han@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Convert the S5PV210/S5P64X0 32-bit down-counting clocksource to
the generic mmio clocksource infrastructure
Signed-off-by: NChanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Move the duplicated code for SPDIF ops from S5PV210 and S5PC100.
So, the same can be used in EXYNOS4.
Signed-off-by: NNaveen Krishna Chatradhi <ch.naveen@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds external GIC io memory mapping
to support external GIC on EXYNOS4.
Signed-off-by: NChanghwan Youn <chaos.youn@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Basically, the SAMSUNG_DEV_PWM is required to use s5p-time.c for HRT.

Reported-by: Marek Szyprowski<m.szyprowski@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Signed-off-by: NThomas Abraham <thomas.ab@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This fixes a regression introduced by e59347a1 "arm: orion:
Use generic irq chip".

Depending on the device, interrupts acknowledgement is done by setting
or by clearing a dedicated register. Replace irq_gc_ack() with some
{set,clr}_bit variants allows to handle both cases.

Note that this patch affects the following SoCs: Davinci, Samsung and
Orion. Except for this last, the change is minor: irq_gc_ack() is just
renamed into irq_gc_ack_set_bit().

For the Orion SoCs, the edge GPIO interrupts support is currently
broken. irq_gc_ack() try to acknowledge a such interrupt by setting
the corresponding cause register bit. The Orion GPIO device expect the
opposite. To fix this issue, the irq_gc_ack_clr_bit() variant is used.

Tested on Network Space v2.
Reported-by: NJoey Oravec <joravec@drewtech.com>
Signed-off-by: NSimon Guinot <sguinot@lacie.com>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

This patch fixes following.

<6>[    0.000000] sched_clock: 32 bits at 33MHz, ...
<6>[  128.651309] Calibrating delay loop...

There is a big jump. The reason is that PWM Timer which
is for HRTimer was used before its initialization.

So this patch changes its order and following is kernel
boot log message after this.

<6>[    0.000000] sched_clock: 32 bits at 33MHz, ...
<6>[    0.000088] Calibrating delay loop...
Signed-off-by: NSangbeom Kim <sbkim73@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Several fixes as well where the +1 was missing.

Done via coccinelle scripts like:

@@
struct resource *ptr;
@@

- ptr->end - ptr->start + 1
+ resource_size(ptr)

and some grep and typing.

Mostly uncompiled, no cross-compilers.
Signed-off-by: NJoe Perches <joe@perches.com>
Signed-off-by: NJiri Kosina <jkosina@suse.cz>

There's no place to use these functions.
and actually no need to set the platform data.
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Basically, other S3C SoCs and S5PC100 use 'S3C_VA_USB_HSPHY'
commonly. It should be changed to 'S3C_VA_USB_HSPHY' for common
usage and others. Now happens build error on S5PC100.

Cc: Greg Kroah-Hartman <gregkh@suse.de>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

s5p duplicates the runtime selection of the timer register three times.
Move this out into a separate function.

FIXME: It is unclear whether this code needs to support true runtime
selection of the timer register, or whether it can be selected once at
init time.
Acked-by: NKukjin Kim <kgene.kim@samsung.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
Acked-by: NKukjin Kim <kgene.kim@samsung.com>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
Acked-by: NKukjin Kim <kgene.kim@samsung.com>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>

Replace sysdev classes and struct sys_device objects used for "core"
power management by Samsung platforms with struct syscore_ops objects
that are simpler.

This generally reduces the code size and the kernel memory footprint.
It also is necessary for removing sysdevs entirely from the kernel in
the future.
Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
Acked-by: NGreg Kroah-Hartman <gregkh@suse.de>
Acked-by: NKukjin Kim <kgene.kim@samsung.com>

The s3c_pm_check_resume_pin() is not being used and can be safely
removed to fix the build warning.
Signed-off-by: NAbhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

EXYNOS4 has 2 phys for usb host and usb device. This patch supports to
control usb host phy of EXYNOS4.
Signed-off-by: NJoonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

This patch adds usb ehci device definition for samsung s5p cpus.
Signed-off-by: NJoonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

Fixes generated by 'codespell' and manually reviewed.
Signed-off-by: NLucas De Marchi <lucas.demarchi@profusion.mobi>

Use irq_set_chip_and_handler() instead. Converted with coccinelle.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

Convert to the new function names. Automated with coccinelle.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

This patch fixes CPU idmask of S5P64X0 and EXYNOS4210
and its comparison method because just want to use CPU
id for it.

Cc: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch includes the implementation of the clock gating
for System MMU. Initially, all System MMUs are not asserted
the system clock. Asserting the system clock to a System MMU
is enabled only when s5p_sysmmu_enable() is called. Likewise,
it is disabled only when s5p_sysmmu_disable() is called.
Therefore, clock gating on System MMUs are still invisible to
the outside of the System MMU driver.
Signed-off-by: NKyongHo Cho <pullip.cho@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch includes the following enhancements for System MMU:
- Enhanced readability
- Removal of unused data structures or their members
- Simplified function definitions
- Corrections of some logical errors
- Full compliance with Linux coding style
- Simpler way of registering callback functions of System MMU faults
Signed-off-by: NKyongHo Cho <pullip.cho@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch removes all global data from common s5p gpio interrupt
handler code. This enables to reuse this code on EXYNOS4 platform.
Instead of global data (IRQ_GPIOINT interrupt number,
S5P_GPIOINT_GROUP_MAXNR groups count), a s5p_register_gpioint_bank()
function is introduced. It is aimed to be called from gpiolib init.
Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch performs a global cleanup in s5p gpio interrupt support code.
The code is prepared for upcoming support for gpio interrupts on EXYNOS4
platform, which has 2 gpio banks (regions) instead of one (like on
S5PC110 and S5PC100).
Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Add support for fourth FIMC platform device definition and define
resources for FIMC modules on EXYNOS4 machines.
Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch updates s5pv210_defconfig and s5p64x0_defconfig for
HRT support and CONFIG_S5P_HRT is used for its configuration.
Signed-off-by: NSangbeom Kim <sbkim73@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds support HR-Timer(High Resolution Timer) and dynamic
tick system for S5P SoCs. There are many clock sources for HR-Timer
on S5P SoCs. The PWM timer, RTC, System Timer, and MCT can be used
for clock source.
This patch can only support PWM timer for clock source of S5P64X0
and S5PV210.
Signed-off-by: NSangbeom Kim <sbkim73@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Add common code for MIPI-CSIS and MIPI-DSIM drivers to support
their corresponding D-PHY's enable and reset control.
Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Extend MIPI-CSIS driver's platform data structure with a callback
for D-PHY enable and reset control. Also add a flag indicating
whether the external MIPI-CSI (VDD18_MIPI) power supply should
be managed in the driver through the "vdd" power supply. On some
boards this regulator may be a fixed voltage regulator without
an inhibit function.
Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Signed-off-by: NSylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>