Some SGPIO PICs don't follow the standard very well and expect a certain
number of clock cycles or port frames in each SGPIO pattern. Add two
optional parameters in the DTB that can provide the number of extra
clock cycles to be sent before and after SGPIO pattern. Read those
parameters from the DTB and send the extra clock cycles.
Signed-off-by: NMark Langsdorf <mark.langsdorf@calxeda.com>
Acked-by: NRob Herring <rob.herring@calxeda.com>
Signed-off-by: NTejun Heo <tj@kernel.org>

Some board designs do not drive the SATA transmit lines within the
specification. The ECME can provide override settings, on a per board
basis, to bring the transmit lines within spec. Read those settings
from the DTB and program them in.

At the time of submission, no production hardware requires this patch.
Signed-off-by: NMark Langsdorf <mark.langsdorf@calxeda.com>
Signed-off-by: NTejun Heo <tj@kernel.org>

The Calxeda sata_highbank driver has been adding its descriptions to the
ahci driver. Separate them properly. This patch only affects
documentation and has no functional component.
Signed-off-by: NMark Langsdorf <mark.langsdorf@calxeda.com>
Acked-by: NRob Herring <rob.herring@calxeda.com>
Signed-off-by: NTejun Heo <tj@kernel.org>

Highbank supports SGPIO by bit-banging out the SGPIO signals over
three GPIO pins defined in the DTB. Add support for this SGPIO
functionality.
Signed-off-by: NMark Langsdorf <mark.langsdorf@calxeda.com>
Signed-off-by: NTejun Heo <tj@kernel.org>

Some highbank DMA masters can support coherent (ACP) or non-coherent DMA.
This sets up dma_map_ops for masters which are configured for coherent DMA.
Signed-off-by: NRob Herring <rob.herring@calxeda.com>
Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com>

Calxeda highbank SATA phy has intermittent problems bringing up a link
with Gen3 drives. Retrying the phy hard reset can work-around this issue,
but each reset also disables spread spectrum support. The reset function
also needs to reprogram the phy to enable spread spectrum support.

Create a new driver based on ahci_platform to support the Calxeda Highbank
SATA controller.
Signed-off-by: NMark Langsdorf <mark.langsdorf@calxeda.com>
Signed-off-by: NRob Herring <rob.herring@calxeda.com>
Signed-off-by: NJeff Garzik <jgarzik@redhat.com>

SPEAr13xx series of SoCs contain Synopsys AHCI SATA Controller which shares
ahci_platform driver with other controller versions.

This patch updates DT compatible list for ahci_platform. It also updates and
renames binding documentation to more generic name.
Signed-off-by: NViresh Kumar <viresh.kumar@st.com>
Cc: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: NJeff Garzik <jgarzik@redhat.com>

Add devicetree match table to ahci platform driver for Calxeda Highbank
AHCI controller.
Signed-off-by: NRob Herring <rob.herring@calxeda.com>
Acked-by: NGrant Likely <grant.likely@secretlab.ca>
Cc: Jeff Garzik <jgarzik@pobox.com>
Cc: linux-ide@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: devicetree-discuss@lists.ozlabs.org