Add @timeout argument to ata_exec_internal[_sg]().  If 0, default
timeout ata_probe_timeout is used.
Signed-off-by: NTejun Heo <htejun@gmail.com>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

Asynchronous notification on ICH9 didn't work because it didn't write
AN FIS into the RX area - it only updates SNotification.  Also,
snooping SDB_FIS RX area is racy against further SDB FIS receptions.
Let sata_async_notification() determine using SNTF if it's available
and snoop RX area iff SNTF isn't available
Signed-off-by: NTejun Heo <htejun@gmail.com>
Cc: Kristen Carlson Accardi <kristen.c.accardi@intel.com>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

Now that we have pp->intr_mask, move PORT_IRQ_BAD_PMP enabling to
ahci_pmp_attach/detach() where it belongs.
Signed-off-by: NTejun Heo <htejun@gmail.com>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

ahci had problems with NCQ over PMP and NCQ used to be disabled while
PMP was attached.  After fixing the problem, the temporary NCQ
disabling code wasn't removed completely.  Kill the remaining piece.
Signed-off-by: NTejun Heo <htejun@gmail.com>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

Tasks in uninterruptible sleep might be woken up by unrelated events
and should check whether the condition it was waiting for has actually
triggered.  Wrap schedule_timeout_uninterruptible() in loop to achieve
it.
Signed-off-by: NTejun Heo <htejun@gmail.com>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

ATA_EHI_NO_AUTOPSY and ATA_EHI_QUIET are used during initial probing
to skip exception analysis and reporting.  Usually, there's nothing to
report but on some allowed but rare corner cases (e.g. phy status
changed interrupt when IRQ is enabled on frozen port - this happens if
IRQ pending status isn't cleared in the IRQ router or controller)
exception messages get printed.

Skip reporting if ATA_EHI_QUIET is set.
Signed-off-by: NTejun Heo <htejun@gmail.com>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

ehi description field is used to carry LLD specific controller
description.  Sometimes, it's used without clearing before and LLD
description gets printed with exception information one more time.
Clear after printing.
Signed-off-by: NTejun Heo <htejun@gmail.com>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

PATA part of all current JMB controllers behave the same way and
JMicron confirms that all future ones will stay compatible.  Drop
device matching and match only vendor and class.
Signed-off-by: NTejun Heo <htejun@gmail.com>
Cc: Ethan Hsiao <ethanhsiao@jmicron.com>
Cc: Justin Tsai <justin@jmicron.com>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

ST9160821AS / 3.ALD also does spurious NCQ completions.  Disable NCQ.
Signed-off-by: NTejun Heo <teheo@suse.de>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

	On a cable there may be
	eighty wires or perhaps forty
	and we learn about its type
	In the world of ACPI

	So we call the GTM
	And we find the the timing rate
	And we look through it to see
	If eighty wire it must be

	Timing lives in ACPI routines
	ACPI routines, ACPI routines
	Timing lives in ACPI routines
	ACPI routes ACPI routines

	And the drivers last you see
	Picking up unknown pci ids
	and the code begins to work

	Timing lives in ACPI routines
	ACPI routines, ACPI routines
	Timing lives in ACPI routines
	ACPI routes ACPI routines

	[Full speed ahead, Mr Hacker, full speed ahead]
	 Full speed over here sir!
	 Checking Cable, checking cable
	 Aye aye, 80 wire,
	 Heaven heaven]

	If we use ACPI (ACPI)
	Every box (every box) has all we need (has all we need)
	Cable type (cable type) and mode timing (mode timing)
	In our ATA (in our ATA) subroutines (subroutines, ha ha)

	Timing lives in ACPI routines
	ACPI routines, ACPI routines
	Timing lives in ACPI routines
	ACPI routes ACPI routines
	Timing lives in ACPI routines
	ACPI routines, ACPI routines
	Timing lives in ACPI routines
	ACPI routes ACPI routines
Signed-off-by: NAlan Cox <alan@redhat.com>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

Talk to the dark side our driver has to, yes. Much misleading is the
data. Store it in a structure we do so that it may be parsed.
Signed-off-by: NAlan Cox <alan@redhat.com>
--
Whats small, old and shouts phrases out of order across mountains ?
Yodla..
Signed-off-by: NJeff Garzik <jeff@garzik.org>

HDT722516DLA380 does spurious completion of NCQ commands.  Blacklist
it.
Signed-off-by: NTejun Heo <htejun@gmail.com>
Cc: Frans Pop <elendil@planet.nl>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

Seagate Barracuda ST380817AS has troubles with NCQ. For example,
unpacking a tarball on an XFS filesystem gives this:

ata1.00: exception Emask 0x0 SAct 0x1 SErr 0x0 action 0x2 frozen
ata1.00: cmd 61/40:00:29:a3:98/00:00:00:00:00/40 tag 0 cdb 0x0 data 32768 out
         res 40/00:00:00:00:00/00:00:00:00:00/00 Emask 0x4 (timeout)

More info here:
http://lkml.org/lkml/2007/1/21/76

Blacklist it!
Signed-off-by: NPaolo Ornati <ornati@fastwebnet.it>
Signed-off-by: NTejun Heo <htejun@gmail.com>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

Let's see what explodes.
Signed-off-by: NJeff Garzik <jgarzik@redhat.com>

Some controller variants snoop the ATAPI length value for Packet
transfers to do state machine and FIFO management. Thus we want to
set it properly, even for cases where it is otherwise meaningless.
Signed-off-by: NAlan Cox <alan@redhat.com>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

Correct handling of SRST reset sequences.  After an SRST it is undefined
whether the drive has gone back to PIO0.  In order to talk safely we should
talk slowly and carefully until we know.

Thus when we do the reset if the controller has a pio setup method we call it
to flip back to PIO 0 and a known state.  After the reset completes the
identify will then be done at the safe speed and the drive/controller will
pick suitable faster modes and reconfigure the controller to these timings.

As a side effect it means we force the controller to PIO 0 as we bring it up
which fixes funnies on a few systems where the BIOS firmware leaves us in an
interesting choice of modes, or embedded boxes with no firmware which come up
in random states.

For smart controllers there is nothing to do - they know about this
internally.
Signed-off-by: NAlan Cox <alan@redhat.com>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

Modern laptops with hotswap bays still tend to utilise a PATA interface
on a SATA bridge, generally with the host controller in some legacy
emulation mode rather than AHCI. This means that the existing hotplug
code in libata is unable to work. The ACPI specification states that
these devices can send notifications when hotswapped, which avoids the
need to obtain notification from the controller. This patch uses the
existing libata-acpi code and simply registers a notification in order
to trigger a rescan whenever the firmware signals an event.
Signed-off-by: NMatthew Garrett <mjg59@srcf.ucam.org>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

This is useful when debugging, handling problem systems, or for
distributions just to get the system installed so it can be sorted
out later.

This is a bit smarter than the old IDE one and lets you do

libata.dma=0	Disable all PATA DMA like old IDE
libata.dma=1	Disk DMA only
libata.dma=2	ATAPI DMA only
libata.dma=4	CF DMA only

(or combinations thereof - 0,1,3 being the useful ones I suspect)

(I've split CF as it seems to be a seperate case of pain and suffering
different to the others and caused by assorted PIO wired adapters etc)
Signed-off-by: NAlan Cox <alan@redhat.com>

[edited to work on SATA too, changing name from 'pata_dma' to 'dma']
Signed-off-by: NJeff Garzik <jgarzik@redhat.com>

Signed-off-by: NPeer Chen <peerchen@gmail.com>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

This adds human-readable decoding of the ATA status and error registers
(similar to what drivers/ide does) as well as the SATA Serror register
to libata error handling output.  This prevents the need to pore
through standards documents to figure out the meaning of the bits
in these registers when looking at error reports.  Some bits that
drivers/ide decoded are not decoded here, since the bits are either
command-dependent or obsolete, and properly parsing them would add
too much complexity.
Signed-off-by: NRobert Hancock <hancockr@shaw.ca>

[edited slightly to make output a bit more symmetric]
Signed-off-by: NJeff Garzik <jeff@garzik.org>

Of course some controllers lie about PMP support.  Black list them.
Signed-off-by: NTejun Heo <htejun@gmail.com>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

Private pi.flags area is full and we need more private flags.  Move
host private flags over to pi.private_data.  During initialization,
these flags are copied to hpriv->flags.
Signed-off-by: NTejun Heo <htejun@gmail.com>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

Implement AHCI PMP support.  ahci only supports command based
switching.  Also, for some reason, NCQ over PMP doesn't work now.
Other than that, everything works.

Tested on ICH9R, JMB360/363 + SIMG3726, 4726 and 5744.
Signed-off-by: NTejun Heo <htejun@gmail.com>
Cc: Forrest Zhao <forrest.zhao@gmail.com>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

As DEV_RST (hardreset) sometimes fail to recover the controller
(especially after PMP DMA CS errata).  In such cases, perform PORT_RST
prior to DEV_RST.
Signed-off-by: NTejun Heo <htejun@gmail.com>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

Implement PMP support.  sil24 supports full FIS-switching.  However,
it has a PMP DMA CS errata which requires port-wide resetting if
commands are outstanding to three or more devices when an error occurs
on one of them.

ATAPI commands often result in CHECK SENSE and it's crucial to not
reset them before fetching sense data.  Unfortunately, ATAPI CHECK
SENSE causes a lot of problem if command is outstanding to any other
device usually resulting in port-wide reset.  So, sata_sil24
implements sil24_qc_defer() which guarantees ATAPI command is run by
itself.
Signed-off-by: NTejun Heo <htejun@gmail.com>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

Implement sata_pmp_qc_defer_cmd_switch() - standard qc_defer for
command switching PMP support.
Signed-off-by: NTejun Heo <htejun@gmail.com>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

Extend ata_acpi_associate_sata_port() such that it can handle PMP and
call it when PMP is attached and detached.

Build breakage when !CONFIG_ATA_ACPI was spotted and fixed by Petr
Vandrovec.
Signed-off-by: NTejun Heo <htejun@gmail.com>
Cc: Petr Vandrovec <petr@vandrovec.name>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

Hook PMP support into libata and enable it.  Connect SCR and probing
functions, and update ata_dev_classify() to detect PMP.
Signed-off-by: NTejun Heo <htejun@gmail.com>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

Implement Port Multiplier support.  To support PMP, a LLDD has to
supply ops->pmp_read() and pmp_write().  If non-null, ->pmp_attach and
->pmp_detach are called on PMP attach and detach, respectively.

->pmp_read/write() can be called while the port is frozen, so they
must be implemented by polling.  This patch supplies several helpers
to ease ->pmp_read/write() implementation.

Also, irq_handler and error_handler must be PMP aware.  Most of PMP
aware EH can be done by calling ata_pmp_do_eh() with appropriate
methods.  PMP EH uses separate set of reset methods and this patch
implements standard prereset, hardreset and postreset methods.

This patch only implements PMP support.  The next patch will integrate
PMP into the reset of libata and thus enable PMP support.
Signed-off-by: NTejun Heo <htejun@gmail.com>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

PMP always requires SRST to be enabled.  Also, hardreset reports
classification code from the first device when PMP is attached, not
from the PMP.  Update ata_eh_reset() such that followup softreset is
performed if the controller is PMP capable and the host link is being
reset.
Signed-off-by: NTejun Heo <htejun@gmail.com>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

Restore the support for handling drives that report one sector too many
(ie SCSI not ATA style). This worked before the HPA update but was
removed in that process.
Signed-off-by: NAlan Cox <alan@redhat.com>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

Reported by Andreas Messer.
Signed-off-by: NJeff Garzik <jeff@garzik.org>

Signed-off-by: NAlan Cox <alan@redhat.com>
[plus SuperIO fixes by Kyle McMartin]
[plus a cleanup from me]
Signed-off-by: NJeff Garzik <jeff@garzik.org>

Blacklist HITACHI HDS7250SASUN500G and HITACHI HDS7225SBSUN250G
drives using wildcard matching.

Signed-off-by David Milburn <dmilburn@redhat.com>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

* The firmware version of ST3160812AS is "3.ADJ" no "3.AD".
* Add several entries from various sources.
Signed-off-by: NTejun Heo <htejun@gmail.com>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

'noacpi' isn't a standalone parameter, give it its prefix.
Signed-off-by: NDave Jones <davej@redhat.com>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

I've been doing an audit of this driver to try and find out why we have
problems with some Clevo boxes that use it. Didn't get anywhere other
than to discover all the bug reporters I have use vmware, which may or
may not be chance.

In the process however I did find out our MWDMA2 performance was a bit
low and code review showed the MWDMA0/2 timings are reversed due to a
thinko in the table ordering
Signed-off-by: NAlan Cox <alan@redhat.com>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

Signed-off-by: NAlan Cox <alan@redhat.com>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

AHCI spec says host-reset bit may only be set when the ahci-enable bit
is also set.

Noticed by Peer Chen <peerchen@gmail.com>
Signed-off-by: NJeff Garzik <jeff@garzik.org>

Little fixlets, that the build started erroring / warning about:

drivers/ata/pata_scc.c: In function 'scc_bmdma_status':
drivers/ata/pata_scc.c:734: error: structure has no member named 'active_tag'
drivers/ata/pata_scc.c: In function 'scc_pata_prereset':
drivers/ata/pata_scc.c:866: warning: passing arg 1 of 'ata_std_prereset' from incompatible pointer type
drivers/ata/pata_scc.c: In function 'scc_error_handler':
drivers/ata/pata_scc.c:908: warning: passing arg 2 of 'ata_bmdma_drive_eh' from incompatible pointer type
drivers/ata/pata_scc.c:908: warning: passing arg 3 of 'ata_bmdma_drive_eh' from incompatible pointer type
drivers/ata/pata_scc.c:908: warning: passing arg 5 of 'ata_bmdma_drive_eh' from incompatible pointer type
make[2]: *** [drivers/ata/pata_scc.o] Error 1
Signed-off-by: NSatyam Sharma <satyam@infradead.org>
Cc: Alan Cox <alan@redhat.com>
Cc: Mel Gorman <mel@skynet.ie>
Signed-off-by: NJeff Garzik <jeff@garzik.org>