- 16 11月, 2012 1 次提交
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由 Thierry Reding 提交于
Add the OF_DEV_AUXDATA table entries required to associate the proper names with host1x and its children. In turn, this allows the devices to find the required clocks. Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 06 11月, 2012 3 次提交
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由 Laxman Dewangan 提交于
Add OF_DEV_AUXDATA for slink driver for Tegra20 and Tegra30 board dt files. Set the parent clock of slink controller to PLLP and configure clock to 100MHz. Signed-off-by: NLaxman Dewangan <ldewangan@nvidia.com> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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由 Wei Ni 提交于
Set up the wlan clock tree for Tegra20 and Tegra30. Signed-off-by: NWei Ni <wni@nvidia.com> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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由 Stephen Warren 提交于
Nothing outside mach-tegra uses this file, so there's no need for it to be in <mach/>. Since uncompress.h and debug-macro.S remain in include/mach, they need to include "../../iomap.h" becaue of this change. uncompress.h will soon be deleted in later multi-platform/single-zImage patches. debug-macro.S will need to continue to include this header using an explicit relative path, to avoid duplicating the physical->virtual address mapping that iomap.h dictates. Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 17 10月, 2012 1 次提交
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由 Sivaram Nair 提交于
The timer variable is renamed to avoid confusion and symbol name clash with the tegra_timer clock. Signed-off-by: NSivaram Nair <sivaramn@nvidia.com> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 13 9月, 2012 1 次提交
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由 Marc Zyngier 提交于
Convert Tegra to use struct smp_operations to provide its SMP and CPU hotplug operations. Tested on Harmony. Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com> Acked-by: NStephen Warren <swarren@nvidia.com> Acked-by: NOlof Johansson <olof@lixom.net> Acked-by: NNicolas Pitre <nico@linaro.org> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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- 03 7月, 2012 1 次提交
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由 Thierry Reding 提交于
Add auxdata to instantiate the PWFM controller from a device tree, include the corresponding nodes in the dtsi files for Tegra 20 and Tegra 30 and add binding documentation. Acked-by: NStephen Warren <swarren@wwwdotorg.org> Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>
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- 30 6月, 2012 1 次提交
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由 Stephen Warren 提交于
of_default_bus_match_table is a table of default bus types supported by of_platform_populate(). Since Tegra has no need to support any specific custom list of bus types, modify the DT board files to use this default list. Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 27 6月, 2012 1 次提交
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由 Laxman Dewangan 提交于
Add DT AUXDATA for Tegra's APBDMA controller driver. Signed-off-by: NLaxman Dewangan <ldewangan@nvidia.com> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 08 5月, 2012 1 次提交
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由 Shawn Guo 提交于
Cc: Colin Cross <ccross@android.com> Cc: Olof Johansson <olof@lixom.net> Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Acked-by: NStephen Warren <swarren@wwwdotorg.org>
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- 26 4月, 2012 2 次提交
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由 Stephen Warren 提交于
Both the Tegra30 I2S and AHUB modules used clocks, and hence currently require AUXDATA in order to get specific device names so that clock lookups work. Signed-off-by: NStephen Warren <swarren@nvidia.com> Acked-by: NOlof Johansson <olof@lixom.net>
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由 Stephen Warren 提交于
Set up the audio clock tree for Tegra30 in an equivalent fashion to the existing setup for Tegra20. Signed-off-by: NStephen Warren <swarren@nvidia.com> Acked-by: NOlof Johansson <olof@lixom.net>
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- 05 3月, 2012 2 次提交
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由 Stephen Warren 提交于
The ports are used as follows: UART1/A: Routed to debug dongle UART2/B: GPS UART3/C: Bluetooth UART4/D: Routed to debug dongle UART5/E: Not connected The debug dongle has jumpers to connect either UART1/A or UART4/D to the DB-9 connector. UART1/A is typically used on Cardhu, and is the option we assume here. For now, only enable UART1/A, and explicitly disable all other ports. The explicit disable prevents the message "of_serial 70006040.serial: no clock-frequency property set" being printed during boot. Enabling the other ports requires their clocks to be enabled, or accesses to the registers will hang. At present, this requires adding entries into board-dt-tegra30.c's tegra_dt_clk_init_table[]. Lets punt on that and wait for the common clock bindings to set this all up, although that will also requiring adding clock support to 8250.c. While we're at it, fix board-dt-tegra30.c to enable the correct clock for the debug UART. We got away with this before, because the bootloader already enabled it. Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Stephen Warren 提交于
board-dt-tegra*.c should support any board using Tegra when booted using device tree. Instead of explicitly listing all the supported boards, which requires a kernel change for each new board, list the supported SoC model instead. Note that the board files do currently have explicit support for setting up each board's pinmux. However, it's fairly likely that at least the basic devices on any new board will work just fine as set up by the boot- loader, and the pinmux data should be moving into device tree soon anyway. Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 07 2月, 2012 1 次提交
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由 Peter De Schrijver 提交于
Initialize basic system clocks and provide a auxdata table to allow some peripheral drivers to find their clocks. Signed-off-by: NPeter De Schrijver <pdeschrijver@nvidia.com> Tested-by: NStephen Warren <swarren@nvidia.com> Acked-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 18 12月, 2011 2 次提交
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由 Peter De Schrijver 提交于
Add support for the tegra30 based cardhu development board. Cardhu is a tablet formfactor reference design for tegra30. The patch provides a device tree for the board, updates Makefile.boot to build the dtb, includes the platform in Kconfig and updates board-dt.c. Signed-off-by: NPeter De Schrijver <pdeschrijver@nvidia.com> Acked-by: NStephen Warren <swarren@nvidia.com> Acked-by: NColin Cross <ccross@android.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Peter De Schrijver 提交于
Add support for tegra30 SoC. This includes a device tree compatible type for this SoC ("nvidia,tegra30") and adds L2 cache initialization for this new SoC. The clock framework is still missing, which prevents most drivers from working. The basic IRQs are the same, so remove the dependency on CONFIG_ARCH_TEGRA_2x_SOC. Signed-off-by: NPeter De Schrijver <pdeschrijver@nvidia.com> Acked-by: NStephen Warren <swarren@nvidia.com> Acked-by: NColin Cross <ccross@android.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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