1. 24 12月, 2013 4 次提交
  2. 10 10月, 2013 1 次提交
    • H
      spi/rspi: Fix 8bit data access, clear buffer · cb52c673
      Hiep Cao Minh 提交于
      The R8A7790 has QSPI module which added into RSPI together.
      The transmit or receive data should be read from or written to
      with the longword-, word-, or byte-access width. Modify word-
      access to byte-access. In 16-bit data register, QSPI send or
      receive datas access from high 8-bit while RSPI send or receive
      datas access from low 8-bit on single mode.
      Modify to reset transmit-receive buffer data and reading dummy
      after data are transmited. RSPI has a TXMD bit on control
      register(SPCR) to set transmit-only mode when transmit data or
      Full-duplex synchronous mode when receive data. In QSPI the TXMD
      bit is not supported, so after transmit data, dummy should be
      read and before transmit or receive data the bufer register
      should be reset.
      This driver is the implementation of send and receive pio only,
      DMA is not supported at this time.
      Without this patch, it will occur error when transmit and receive
      Signed-off-by: NHiep Cao Minh <cm-hiep@jinso.co.jp>
      Signed-off-by: NMark Brown <broonie@linaro.org>
      cb52c673
  3. 17 9月, 2013 1 次提交
  4. 31 8月, 2013 1 次提交
  5. 29 8月, 2013 1 次提交
  6. 27 8月, 2013 1 次提交
  7. 03 8月, 2013 1 次提交
  8. 23 5月, 2013 1 次提交
  9. 08 12月, 2012 1 次提交
  10. 17 10月, 2012 1 次提交
  11. 20 5月, 2012 1 次提交
  12. 08 3月, 2012 1 次提交