- 07 1月, 2017 2 次提交
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由 Geert Uytterhoeven 提交于
If NO_DMA=y: ERROR: "bad_dma_ops" [drivers/ata/sata_highbank.ko] undefined! Add a dependency on HAS_DMA to fix this. Signed-off-by: NGeert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: NTejun Heo <tj@kernel.org>
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由 Geert Uytterhoeven 提交于
If NO_DMA=y: ERROR: "dma_pool_alloc" [drivers/ata/sata_mv.ko] undefined! ERROR: "dmam_pool_create" [drivers/ata/sata_mv.ko] undefined! ERROR: "dma_pool_free" [drivers/ata/sata_mv.ko] undefined! Add a dependency on HAS_DMA to fix this. Signed-off-by: NGeert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: NTejun Heo <tj@kernel.org>
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- 14 12月, 2016 1 次提交
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由 Adam Manzanares 提交于
Previously, when the ata device was being initialized we were probing for NCQ prio support by checking the identify information and also checking the log page that holds information about ncq prio support. This caused an error on an Intel HBA so the code is now updated to only probe for NCQ prio support when the sysfs variable controlling NCQ prio support is enabled. tj: Update formatting, switch to spin_[un]lock_irq() and update locking a bit, use REVALIDATE instead of RESET, and return -EIO instead of -EINVAL on config failure. Signed-off-by: NAdam Manzanares <adam.manzanares@wdc.com> Signed-off-by: NTejun Heo <tj@kernel.org>
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- 08 12月, 2016 1 次提交
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由 Nicolai Stange 提交于
SCT Write Same support had been introduced with commit 7b203094 ("libata: Add support for SCT Write Same") Some problems, namely excessive userspace segfaults, had been reported at http://lkml.kernel.org/r/20160908192736.GA4356@gmail.com This lead to commit 0ce1b18c ("libata: Some drives failing on SCT Write Same") which strived to disable SCT Write Same on !ZAC devices. Due to the way this was done and to the logic in sd_config_write_same(), this didn't work for those devices that have ->max_ws_blocks > SD_MAX_WS10_BLOCKS: for these, ->no_write_same and ->max_write_same_sectors would still be non-zero, but ->ws10 == ->ws16 == 0. This would cause sd_setup_write_same_cmnd() to demultiplex REQ_OP_WRITE_SAME requests to WRITE_SAME, and these in turn aren't supported by libata-scsi: EXT4-fs (dm-1): Delayed block allocation failed for inode 2625094 at logical offset 2032 with max blocks 2 with error 121 EXT4-fs (dm-1): This should not happen!! Data will be lost 121 == EREMOTEIO is what scsi_io_completion() asserts in case of invalid opcodes. Back to the original problem of userspace segfaults: this can be tracked down to ata_format_sct_write_same() overwriting the input page. Sometimes, this page is ZERO_PAGE(0) which ceases to be filled with zeros from that point on. Since ZERO_PAGE(0) is used for userspace .bss mappings, code of the following is doomed: static char *a = NULL; /* .bss */ ... if (a) *a = 'a'; This problem is not solved by disabling SCT Write Same for !ZAC devices only. It can certainly be fixed, but the final release is quite close -- so disable SCT Write Same for all ATA devices rather than introducing some SCT key buffer allocation schemes at this point. Fixes: 7b203094 ("libata: Add support for SCT Write Same") Signed-off-by: NNicolai Stange <nicstange@gmail.com> Signed-off-by: NTejun Heo <tj@kernel.org>
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- 06 12月, 2016 1 次提交
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由 Christoph Hellwig 提交于
Some Intel ahci implementations have a completely broken remapping mode where they hide one or more NVMe devices behind the bar of an AHCI device. Intel refuses to let the OS reprogram the BIOS to switch out of this mode at runtime, and so far we're not come up with another good way to undo the mess that the Chipset people created. So for now the only thing we can do is to alert users about this situation and switch to the faster and much saner so called "AHCI" mode insted of the RAID mode in the BIOS so that the BIOS does not hide the NVMe devices from us. The sitation is even worse as at least one vendor (thanks a lot Lenovo..) has started hardcoding their BIOS into the "RAID" mode even for laptops that don't use AHCI _at all_ and just have a single NVMe device. For now there is an unspported Linux-only BIOS that undoes this braindamage, but we'll have to see if things are getting better or worse from here. Based on an earlier patch from Dan Williams <dan.j.williams@intel.com>. Signed-off-by: NChristoph Hellwig <hch@lst.de> Signed-off-by: NTejun Heo <tj@kernel.org>
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- 30 11月, 2016 1 次提交
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由 Uwe Kleine-König 提交于
If the nr-ports property is missing ata_host_alloc_pinfo is called with n_ports = 0. This results in host->ports[0] = NULL which later makes mv_init_host() oops when dereferencing this pointer. Instead be a bit more cooperative and fail the probing with an error message. Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: NTejun Heo <tj@kernel.org>
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- 22 11月, 2016 1 次提交
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由 Christoph Hellwig 提交于
Don't try to guess what the errors from pci_irq_alloc_vectors mean, as that's too fragile. Instead always try allocating a single vector when multi-MSI mode fails. This makes various intel Desktop and Laptop CPUs use MSI again. Signed-off-by: NChristoph Hellwig <hch@lst.de> Reported-by: NMichael Marley <michael@michaelmarley.com> Tested-by: NMichael Marley <michael@michaelmarley.com> Fixes: 0b9e2988 ("ahci: use pci_alloc_irq_vectors") Signed-off-by: NTejun Heo <tj@kernel.org>
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- 10 11月, 2016 4 次提交
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由 Vladimir Zapolskiy 提交于
Having timing settings for all supported by the controller PIO modes now it is possible to expand its PIO mask. Signed-off-by: NVladimir Zapolskiy <vz@mleia.com> Signed-off-by: NTejun Heo <tj@kernel.org>
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由 Vladimir Zapolskiy 提交于
The controller is capable to operate in up to PIO4 mode, however before the change the driver relies on timing settings done by a bootloader for PIO0 mode only. The change adds more flexibility in PIO mode selection at runtime and makes the driver to work even if bootloader does not preset ATA timings. Signed-off-by: NVladimir Zapolskiy <vz@mleia.com> Signed-off-by: NTejun Heo <tj@kernel.org>
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由 Vladimir Zapolskiy 提交于
Convert .set_mode callback function to more specific .set_piomode, the driver does not have support of DMA modes, thus a simpler version of the callback is preferred. Signed-off-by: NVladimir Zapolskiy <vz@mleia.com> Signed-off-by: NTejun Heo <tj@kernel.org>
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由 Vladimir Zapolskiy 提交于
Put headers in alphabetic order and remove redundant ones. Signed-off-by: NVladimir Zapolskiy <vz@mleia.com> Signed-off-by: NTejun Heo <tj@kernel.org>
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- 02 11月, 2016 1 次提交
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由 Hannes Reinecke 提交于
There's a typo in ata_gen_passthru_sense(), where the first byte would be overwritten incorrectly later on. Reported-by: NCharles Machalow <csm10495@gmail.com> Signed-off-by: NHannes Reinecke <hare@suse.com> Fixes: 11093cb1 ("libata-scsi: generate correct ATA pass-through sense") Cc: stable@vger.kernel.org # v4.7+ Signed-off-by: NTejun Heo <tj@kernel.org>
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- 25 10月, 2016 1 次提交
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由 Christoph Hellwig 提交于
We need to make sure hpriv->irq is set properly if we don't use per-port vectors, so switch from blindly assigning pdev->irq to using pci_irq_vector, which handles all interrupt types correctly. Signed-off-by: NChristoph Hellwig <hch@lst.de> Reported-by: NRobert Richter <robert.richter@cavium.com> Tested-by: NRobert Richter <robert.richter@cavium.com> Tested-by: NDavid Daney <ddaney.cavm@gmail.com> Fixes: 0b9e2988 ("ahci: use pci_alloc_irq_vectors") Signed-off-by: NTejun Heo <tj@kernel.org>
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- 24 10月, 2016 1 次提交
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由 Mauro Carvalho Chehab 提交于
The previous patch renamed several files that are cross-referenced along the Kernel documentation. Adjust the links to point to the right places. Signed-off-by: NMauro Carvalho Chehab <mchehab@s-opensource.com>
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- 21 10月, 2016 1 次提交
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由 Christoph Hellwig 提交于
commit 17a51f12 ("ahci: only try to use multi-MSI mode if there is more than 1 port") lead to a case where nvec isn't initialized before it's used. Fix this by moving the check into the n_ports conditional. Reported-and-reviewed-by Colin Ian King <colin.king@canonical.com> Signed-off-by: NChristoph Hellwig <hch@lst.de> Signed-off-by: NTejun Heo <tj@kernel.org>
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- 20 10月, 2016 5 次提交
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由 Adam Manzanares 提交于
We previously had a check to see if the device has support for prioritized ncq commands and a check to see if a device flag is set, through a sysfs variable, in order to send a prioritized command. This patch only allows the sysfs variable to be set if the device supports prioritized commands enabling one check in ata_build_rw_tf in order to determine whether or not to send a prioritized command. This patch depends on ata: ATA Command Priority Disabled By Default tj: Minor subject and formatting updates. Signed-off-by: NAdam Manzanares <adam.manzanares@wdc.com> Signed-off-by: NTejun Heo <tj@kernel.org>
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由 Adam Manzanares 提交于
Add a sysfs entry to turn on priority information being passed to a ATA device. By default this feature is turned off. This patch depends on ata: Enabling ATA Command Priorities tj: Renamed ncq_prio_on to ncq_prio_enable and removed trivial ata_ncq_prio_on() and open-coded the test. Signed-off-by: NAdam Manzanares <adam.manzanares@hgst.com> Signed-off-by: NTejun Heo <tj@kernel.org>
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由 Adam Manzanares 提交于
This patch checks to see if an ATA device supports NCQ command priorities. If so and the user has specified an iocontext that indicates IO_PRIO_CLASS_RT then we build a tf with a high priority command. This is done to improve the tail latency of commands that are high priority by passing priority to the device. tj: Removed trivial ata_ncq_prio_enabled() and open-coded the test. Signed-off-by: NAdam Manzanares <adam.manzanares@hgst.com> Signed-off-by: NTejun Heo <tj@kernel.org>
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由 Tang Yuantian 提交于
Ls1046a is a new introduced soc which supports ATA3.0. Signed-off-by: NTang Yuantian <yuantian.tang@nxp.com> Signed-off-by: NTejun Heo <tj@kernel.org>
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由 Christoph Hellwig 提交于
We should only try to allocate multiple MSI or MSI-X vectors if the device actually has multiple ports. Otherwise pci_alloc_irq_vectors will return a single vector due to n_ports = 1, in which case we shouldn't set the AHCI_HFLAG_MULTI_MSI flag. Signed-off-by: NChristoph Hellwig <hch@lst.de> Fixes: 0b9e2988 ("ahci: use pci_alloc_irq_vectors") Reported-by: NEmmanuel Benisty <benisty.e@gmail.com> Tested-by: NEmmanuel Benisty <benisty.e@gmail.com> Signed-off-by: NTejun Heo <tj@kernel.org>
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- 30 9月, 2016 1 次提交
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由 Tang Yuantian 提交于
This reverts commit 64084729 ("ahci: qoriq: Disable NCQ on ls2080a SoC") The erratum has been fixed in ls2080a v2.0 and later soc. In reality, customer will not get any ls2080a v1.0 soc. Neither apply to any products. So reverting this commit won't create any side effect. Blacklisting v2.0 could also be a option, but that needs to check the soc version which is not suitable in the driver. Signed-off-by: NTang Yuantian <yuantian.tang@nxp.com> Signed-off-by: NTejun Heo <tj@kernel.org>
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- 22 9月, 2016 2 次提交
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由 Harman Kalra 提交于
Signed-off-by: NHarman Kalra <harman4linux@gmail.com> Signed-off-by: NTejun Heo <tj@kernel.org>
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由 Harman Kalra 提交于
Replace BUG() with BUG_ON(). Caught by coccinelle. Signed-off-by: NHarman Kalra <harman4linux@gmail.com> Signed-off-by: NTejun Heo <tj@kernel.org>
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- 21 9月, 2016 1 次提交
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由 Harman Kalra 提交于
Replacing dma_pool_alloc and memset with a single call to dma_pool_zalloc Signed-off-by: NHarman Kalra <harman4linux@gmail.com> Signed-off-by: NTejun Heo <tj@kernel.org>
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- 10 9月, 2016 1 次提交
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由 Shaun Tancheff 提交于
Restrict support SCT Write Same to devices which also support ZAC where support is required. Reported-by: NMike Krinkin <krinkin.m.u@gmail.com> Signed-off-by: NShaun Tancheff <shaun.tancheff@seagate.com> Signed-off-by: NTejun Heo <tj@kernel.org>
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- 07 9月, 2016 1 次提交
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由 Christoph Hellwig 提交于
Use the new pci_alloc_irq_vectors API to allocate MSI-X and MSI vectors. The big advantage over the old code is that we can use the same API for MSI and MSI-X, and that we don't need to store the MSI-X vector mapping in driver-private data structures. This first conversion keeps the probe order as-is: MSI-X multi vector, MSI multi vector, MSI single vector, MSI-X single vector and last a single least legacy interrupt line. There is one small change of behavior: we now check the "MSI Revert to Single Message" flag for MSI-X in addition to MSI. Because the API to find the Linux IRQ number for a MSI/MSI-X vector is PCI specific, but libahaci is bus-agnostic I had to a get_irq_vector function pointer to struct ahci_host_priv. The alternative would be to move the multi-vector case of ahci_host_activate to ahci.c and just call ata_host_activate directly from the others users of ahci_host_activate. Signed-off-by: NChristoph Hellwig <hch@lst.de> Signed-off-by: NTejun Heo <tj@kernel.org>
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- 30 8月, 2016 1 次提交
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由 Alan Cox 提交于
Ninja32 needs to set some flags to indicate it does 32bit IO. However it currently assigns this which loses the initializing flag and causes a warning spew. Fix it to use a logical or as is intended. Signed-off-by: NAlan Cox <alan@linux.intel.com> Tested-by: NEllmar Stelnberger <estellnb@elstel.org> Signed-off-by: NTejun Heo <tj@kernel.org>
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- 25 8月, 2016 4 次提交
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由 Shaun Tancheff 提交于
Use non DMA write log when ATA_DFLAG_PIO is set. Signed-off-by: NShaun Tancheff <shaun.tancheff@seagate.com> Reviewed-by: NHannes Reinecke <hare@suse.com> Acked-by: NTejun Heo <tj@kernel.org>
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由 Shaun Tancheff 提交于
Correct handling of devices with sector_size other that 512 bytes. In the case of a 4Kn device sector_size it is possible to describe a much larger DSM Trim than the current fixed default of 512 bytes. This patch assumes the minimum descriptor is sector_size and fills out the descriptor accordingly. The ACS-2 specification is quite clear that the DSM command payload is sized as number of 512 byte transfers so a 4Kn device will operate correctly without this patch. Signed-off-by: NShaun Tancheff <shaun.tancheff@seagate.com> Acked-by: NTejun Heo <tj@kernel.org>
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由 Shaun Tancheff 提交于
SATA drives may support write same via SCT. This is useful for setting the drive contents to a specific pattern (0's). Translate a SCSI WRITE SAME 16 command to be either a DSM TRIM command or an SCT Write Same command. Based on the UNMAP flag: - When set translate to DSM TRIM - When not set translate to SCT Write Same Signed-off-by: NShaun Tancheff <shaun.tancheff@seagate.com> Reviewed-by: NHannes Reinecke <hare@suse.com> Acked-by: NTejun Heo <tj@kernel.org>
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由 Shaun Tancheff 提交于
Safely overwriting the attached page to ATA format from the SCSI formatted variant. Signed-off-by: NShaun Tancheff <shaun.tancheff@seagate.com> Reviewed-by: NHannes Reinecke <hare@suse.com> Acked-by: NTejun Heo <tj@kernel.org>
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- 12 8月, 2016 2 次提交
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由 Christoph Hellwig 提交于
irq already contains the interrupt number for the port, don't add the port index to it. Signed-off-by: NChristoph Hellwig <hch@lst.de> Signed-off-by: NTejun Heo <tj@kernel.org> Fixes: d684a90d ("ahci: per-port msix support") Cc: stable@vger.kernel.org v4.5+
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由 Christoph Hellwig 提交于
Signed-off-by: NChristoph Hellwig <hch@lst.de> Signed-off-by: NTejun Heo <tj@kernel.org>
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- 11 8月, 2016 1 次提交
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由 Patrice Chotard 提交于
Despite ST AHCI version = 1.3, reading HOST_PORTS_IMPL returns 0. So force_port_map to 1 by using ports-implemented DT property. Signed-off-by: NPatrice Chotard <patrice.chotard@st.com> Signed-off-by: NTejun Heo <tj@kernel.org>
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- 10 8月, 2016 4 次提交
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由 Tang Yuantian 提交于
By default the SATA IP on the qoriq SoCs does not generating coherent/snoopable transactions. This patch enable it in the sata axicc register. In addition, the dma-coherent property must be set on the SATA controller nodes. Signed-off-by: NTang Yuantian <yuantian.tang@nxp.com> Signed-off-by: NTejun Heo <tj@kernel.org>
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由 Tang Yuantian 提交于
The default values for Port Phy2Cfg register and Port Phy3Cfg register are better, no need to overwrite them. Signed-off-by: NTang Yuantian <yuantian.tang@nxp.com> Signed-off-by: NTejun Heo <tj@kernel.org>
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由 Tom Yan 提交于
scsi_done() was called repeatedly and apparently because of that, the kernel would call trace when we touch the Control mode page: Call Trace: [<ffffffff812ea0d2>] dump_stack+0x63/0x81 [<ffffffff81079cfb>] __warn+0xcb/0xf0 [<ffffffff81079e2d>] warn_slowpath_null+0x1d/0x20 [<ffffffffa00f51b0>] ata_eh_finish+0xe0/0xf0 [libata] [<ffffffffa00fb830>] sata_pmp_error_handler+0x640/0xa50 [libata] [<ffffffffa00470ed>] ahci_error_handler+0x1d/0x70 [libahci] [<ffffffffa00f55f0>] ata_scsi_port_error_handler+0x430/0x770 [libata] [<ffffffffa00eff8d>] ? ata_scsi_cmd_error_handler+0xdd/0x160 [libata] [<ffffffffa00f59d7>] ata_scsi_error+0xa7/0xf0 [libata] [<ffffffffa00913ba>] scsi_error_handler+0xaa/0x560 [scsi_mod] [<ffffffffa0091310>] ? scsi_eh_get_sense+0x180/0x180 [scsi_mod] [<ffffffff81098eb8>] kthread+0xd8/0xf0 [<ffffffff815d913f>] ret_from_fork+0x1f/0x40 [<ffffffff81098de0>] ? kthread_worker_fn+0x170/0x170 ---[ end trace 8b7501047e928a17 ]--- Removed the unnecessary code and let ata_scsi_translate() do the job. Also, since ata_mselect_control() has no ATA command to send to the device, ata_scsi_mode_select_xlat() should return 1 for it, so that ata_scsi_translate() will finish early to avoid ata_qc_issue(). Signed-off-by: NTom Yan <tom.ty89@gmail.com> Signed-off-by: NTejun Heo <tj@kernel.org>
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由 Tom Yan 提交于
ata_mselect_*() would initialize a char array for storing a copy of the current mode page. However, char could be signed char. In that case, bytes larger than 127 would be converted to negative number. For example, 0xff from def_control_mpage[] would become -1. This prevented ata_mselect_control() from working at all, since when it did the read-only bits check, there would always be a mismatch. Signed-off-by: NTom Yan <tom.ty89@gmail.com> Signed-off-by: NTejun Heo <tj@kernel.org>
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- 20 7月, 2016 2 次提交
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由 Tom Yan 提交于
`changeable` is the "version" of mode page requested by the user. It will be less confusing/misleading if we do not check it "together" with the setting bits of the drive. Not to mention that we currently have ata_mselect_*() implemented in a way that each of them will serve exclusively a particular bit on each page. The old style will hence make the condition look even more unnecessarily arcane if the ata_msense_*() is reflecting more than one bit. Signed-off-by: NTom Yan <tom.ty89@gmail.com> Signed-off-by: NTejun Heo <tj@kernel.org>
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由 Pang Raymond 提交于
Due to PCI subsystem behaviour, unloading AHCI driver will disable MSI and enable INTx. When HBA supports MSIx or Multiple MSI, Driver's irq handler doesn't clear GHC.IS register. It works well when reading or writing data and GHC.IS is always non-zero. But when unloading driver (or any other operation which causes disable MSIx and enable INTx), PCI subsystem uses config write(Rx04.bit10) to enable INTx. Because GHC.IS is non-zero, HBA will falsely assume some port needs interrupt service. Then it asserts INTx. To make things worse, when AHCI controller shares the same interrupt pin with other PCI device, that PCI device's ISR will be called and nobody de-asserts previous INTx. This patch clears GHC.IS in ahci_port_stop() even when using MSIx or MMSI to prevent this case. It ensures GHC.IS is zero before PCI subsystem enables INTx. tj: Minor updates to the comment. Signed-off-by: NRaymond Pang <raymond_rule@hotmail.com> Signed-off-by: NTejun Heo <tj@kernel.org>
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