- 26 5月, 2011 3 次提交
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由 Catalin Marinas 提交于
This patch makes TTBR1 point to swapper_pg_dir so that global, kernel mappings can be used exclusively on v6 and v7 cores where they are needed. Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com> Signed-off-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Commit 228e548e (net: Add sendmmsg socket system call) added the new sendmmsg syscall. Add this to the syscall table for ARM. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Dave Martin 提交于
* To remove the risk of inconvenient register allocation decisions by the compiler, these functions are separated out as pure assembler. * The apcs frame manipulation code is not applicable for Thumb-2 (and also not easily compatible). Since it's not essential to have a full frame on these leaf assembler functions, the frame manipulation is removed, in the interests of simplicity. * Split up ldm/stm instructions to be compatible with Thumb-2, as well as avoiding instruction forms deprecated on >= ARMv7. Signed-off-by: NDave Martin <dave.martin@linaro.org> Reviewed-by: NNicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 23 5月, 2011 3 次提交
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由 Russell King 提交于
Rather than having each platform class provide a mach/smp.h header for smp_cross_call(), arrange for them to register the function with the core ARM SMP code instead. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Grant Likely 提交于
If a dtb is passed to the kernel then the kernel needs to iterate through compiled-in mdescs looking for one that matches and move the dtb data to a safe location before it gets accidentally overwritten by the kernel. This patch creates a new function, setup_machine_fdt() which is analogous to the setup_machine_atags() created in the previous patch. It does all the early setup needed to use a device tree machine description. v5: - Print warning with neither dtb nor atags are passed to the kernel - Fix bug in setting of __machine_arch_type to the selected machine, not just the last machine in the list. Reported-by: NTixy <tixy@yxit.co.uk> - Copy command line directly into boot_command_line instead of cmd_line v4: - Dump some output when a matching machine_desc cannot be found v3: - Added processing of reserved list. - Backed out the v2 change that copied instead of reserved the dtb. dtb is reserved again and the real problem was fixed by using alloc_bootmem_align() for early allocation of RAM for unflattening the tree. - Moved cmd_line and initrd changes to earlier patch to make series bisectable. v2: Changed to save the dtb by copying into an allocated buffer. - Since the dtb will very likely be passed in the first 16k of ram where the interrupt vectors live, memblock_reserve() is insufficient to protect the dtb data. [based on work originally written by Jeremy Kerr <jeremy.kerr@canonical.com>] Tested-by: NTony Lindgren <tony@atomide.com> Acked-by: NNicolas Pitre <nicolas.pitre@linaro.org> Acked-by: NRussell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 Grant Likely 提交于
In preparation for adding device tree support, this patch consolidates all of the atag-specific setup into a single function. v5: - drop double printk("Machine; %s\n", ...); call. - leave copying boot_command_line in setup_arch() since it isn't atags specific. v4: - adapt to the removal of lookup_machine_type() - break out dump of machine_desc table into dump_machine_table() because the device tree probe code will use it. - Add for_each_machine_desc() macro Tested-by: NTony Lindgren <tony@atomide.com> Acked-by: NNicolas Pitre <nicolas.pitre@linaro.org> Acked-by: NRussell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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- 21 5月, 2011 1 次提交
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由 Mark Rutland 提交于
When initialising a PMU, there is a check to protect against races with other CPUs filling all of the available event slots. Since armpmu_add checks that an event can be scheduled, we do not need to do this at initialisation time. Furthermore the current code is broken because it assumes that atomic_inc_not_zero will unconditionally increment active_counts and then tries to decrement it again on failure. This patch removes the broken, redundant code. Signed-off-by: NMark Rutland <mark.rutland@arm.com> Acked-by: NWill Deacon <will.deacon@arm.com> Cc: Jamie Iles <jamie@jamieiles.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 15 5月, 2011 1 次提交
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由 Dave Martin 提交于
This patch migrates the implementation of the ptrace interface for the core integer registers, legacy FPA registers and VFP registers to use the regsets framework. As an added bonus, all this stuff gets included in coredumps at no extra cost. Without this patch, coredumps contained no VFP state. Third-party extension register sets (iwmmx, crunch) are not migrated by this patch, and continue to use the old implementation; these should be migratable without much extra work. Signed-off-by: NDave Martin <dave.martin@linaro.org> Acked-by: NWill Deacon <Will.Deacon@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 14 5月, 2011 1 次提交
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由 Greg Kroah-Hartman 提交于
On some arches (x86, sh, arm, unicore, powerpc) the oops message would print out the last sysfs file accessed. This was very useful in finding a number of sysfs and driver core bugs in the 2.5 and early 2.6 development days, but it has been a number of years since this file has actually helped in debugging anything that couldn't also be trivially determined from the stack traceback. So it's time to delete the line. This is good as we need all the space we can get for oops messages at times on consoles. Acked-by: NPhil Carmody <ext-phil.2.carmody@nokia.com> Acked-by: NIngo Molnar <mingo@elte.hu> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
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- 12 5月, 2011 2 次提交
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由 Arnd Bergmann 提交于
GDB's interrupt.exp test cases currenly fail on ARM. The problem is how do_signal handled restarting interrupted system calls: The entry.S assembler code determines that we come from a system call; and that information is passed as "syscall" parameter to do_signal. That routine then calls get_signal_to_deliver [*] and if a signal is to be delivered, calls into handle_signal. If a system call is to be restarted either after the signal handler returns, or if no handler is to be called in the first place, the PC is updated after the get_signal_to_deliver call, either in handle_signal (if we have a handler) or at the end of do_signal (otherwise). Now the problem is that during [*], the call to get_signal_to_deliver, a ptrace intercept may happen. During this intercept, the debugger may change registers, including the PC. This is done by GDB if it wants to execute an "inferior call", i.e. the execution of some code in the debugged program triggered by GDB. To this purpose, GDB will save all registers, allocate a stack frame, set up PC and arguments as appropriate for the call, and point the link register to a dummy breakpoint instruction. Once the process is restarted, it will execute the call and then trap back to the debugger, at which point GDB will restore all registers and continue original execution. This generally works fine. However, now consider what happens when GDB attempts to do exactly that while the process was interrupted during execution of a to-be- restarted system call: do_signal is called with the syscall flag set; it calls get_signal_to_deliver, at which point the debugger takes over and changes the PC to point to a completely different place. Now get_signal_to_deliver returns without a signal to deliver; but now do_signal decides it should be restarting a system call, and decrements the PC by 2 or 4 -- so it now points to 2 or 4 bytes before the function GDB wants to call -- which leads to a subsequent crash. To fix this problem, two things need to be supported: - do_signal must be able to recognize that get_signal_to_deliver changed the PC to a different location, and skip the restart-syscall sequence - once the debugger has restored all registers at the end of the inferior call sequence, do_signal must recognize that *now* it needs to restart the pending system call, even though it was now entered from a breakpoint instead of an actual svc instruction This set of issues is solved on other platforms, usually by one of two mechanisms: - The status information "do_signal is handling a system call that may need restarting" is itself carried in some register that can be accessed via ptrace. This is e.g. on Intel the "orig_eax" register; on Sparc the kernel defines a magic extra bit in the flags register for this purpose. This allows GDB to manage that state: reset it when doing an inferior call, and restore it after the call is finished. - On s390, do_signal transparently handles this problem without requiring GDB interaction, by performing system call restarting in the following way: first, adjust the PC as necessary for restarting the call. Then, call get_signal_to_deliver; and finally just continue execution at the PC. This way, if GDB does not change the PC, everything is as before. If GDB *does* change the PC, execution will simply continue there -- and once GDB restores the PC it saved at that point, it will automatically point to the *restarted* system call. (There is the minor twist how to handle system calls that do *not* need restarting -- do_signal will undo the PC change in this case, after get_signal_to_deliver has returned, and only if ptrace did not change the PC during that call.) Because there does not appear to be any obvious register to carry the syscall-restart information on ARM, we'd either have to introduce a new artificial ptrace register just for that purpose, or else handle the issue transparently like on s390. The patch below implements the second option; using this patch makes the interrupt.exp test cases pass on ARM, with no regression in the GDB test suite otherwise. Cc: patches@linaro.org Signed-off-by: NUlrich Weigand <ulrich.weigand@linaro.org> Signed-off-by: NArnd Bergmann <arnd.bergmann@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Victor Boivie 提交于
This patch allows the provided CONFIG_CMDLINE to be concatenated with the one provided by the boot loader. This is useful to merge the static values defined in CONFIG_CMDLINE with the boot loader's (possibly) more dynamic values, such as startup reasons and more. Signed-off-by: NVictor Boivie <victor.boivie@sonyericsson.com> Reviewed-by: NBjorn Andersson <bjorn.andersson@sonyericsson.com> Signed-off-by: NOskar Andero <oskar.andero@sonyericsson.com> Acked-by: NNicolas Pitre <nicolas.pitre@linaro.org> Acked-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 11 5月, 2011 2 次提交
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由 Grant Likely 提交于
Add some basic empty infrastructure for DT support on ARM. v5: - Fix off-by-one error in size calculation of initrd - Stop mucking with cmd_line, and load command line from dt into boot_command_line instead which matches the behaviour of ATAGS booting v3: - moved cmd_line export and initrd setup to this patch to make the series bisectable. - switched to alloc_bootmem_align() for allocation when unflattening the device tree. memblock_alloc() was not the right interface. Signed-off-by: NJeremy Kerr <jeremy.kerr@canonical.com> Tested-by: NTony Lindgren <tony@atomide.com> Acked-by: NNicolas Pitre <nicolas.pitre@linaro.org> Acked-by: NRussell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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由 Grant Likely 提交于
The dtb is passed to the kernel via register r2, which is the same method that is used to pass an atags pointer. This patch modifies __vet_atags to not clear r2 when it encounters a dtb image. v2: fixed bugs pointed out by Nicolas Pitre Tested-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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- 29 4月, 2011 27 次提交
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由 Dan Rosenberg 提交于
When CONFIG_OABI_COMPAT is set, the wrapper for semtimedop does not bound the nsops argument. A sufficiently large value will cause an integer overflow in allocation size, followed by copying too much data into the allocated buffer. Fix this by restricting nsops to SEMOPM. Untested. Cc: stable@kernel.org Signed-off-by: NDan Rosenberg <drosenberg@vsecurity.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Jon Medhurst 提交于
- Remove coding standard violations reported by checkpatch.pl - Delete comment about handling of conditional branches which is no longer true. - Delete comment at end of file which lists all ARM instructions. This duplicates data available in the ARM ARM and seems like an unnecessary maintenance burden to keep this up to date and accurate. Signed-off-by: NJon Medhurst <tixy@yxit.co.uk> Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org>
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由 Jon Medhurst 提交于
Being able to probe NOP instructions is useful for hard-coding probeable locations and is used by the kprobes test code. Signed-off-by: NJon Medhurst <tixy@yxit.co.uk> Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org>
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由 Jon Medhurst 提交于
These bit field manipulation instructions occur several thousand times in an ARMv7 kernel. Signed-off-by: NJon Medhurst <tixy@yxit.co.uk> Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org>
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由 Jon Medhurst 提交于
The MOVW and MOVT instructions account for approximately 7% of all instructions in a ARMv7 kernel as GCC uses them instead of a literal pool. Signed-off-by: NJon Medhurst <tixy@yxit.co.uk> Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org>
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由 Jon Medhurst 提交于
The instruction decoding in space_cccc_000x needs to reject probing of instructions with undefined patterns as they may in future become defined and then emulated faultily - as has already happened with the SMC instruction. This fix is achieved by testing for the instruction patterns we want to probe and making the the default fall-through paths reject probes. This also allows us to remove some explicit tests for instructions that we wish to reject, as that is now the default action. Signed-off-by: NJon Medhurst <tixy@yxit.co.uk> Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org>
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由 Jon Medhurst 提交于
The tests to explicitly reject probing CPS, RFE and SRS instructions are redundant as the default case is now to reject undecoded patterns. Signed-off-by: NJon Medhurst <tixy@yxit.co.uk> Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org>
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由 Jon Medhurst 提交于
The PLD instructions wasn't being decoded correctly and the emulation code wasn't adjusting PC correctly. As the PLD instruction is only a performance hint we emulate it as a simple nop, and we can broaden the instruction decoding to take into account newer PLI and PLDW instructions. Signed-off-by: NJon Medhurst <tixy@yxit.co.uk> Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org>
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由 Jon Medhurst 提交于
The emulation of SETEND was broken as it changed the endianess for the running kprobes handling code. Rather than adding a new simulation routine to fix this we'll just reject probing of SETEND as these should be very rare in the kernel. Note, the function emulate_none is now unused but it is left in the source code as future patches will use it. Signed-off-by: NJon Medhurst <tixy@yxit.co.uk> Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org>
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由 Jon Medhurst 提交于
Following the change to remove support for coprocessor instructions we are left with three stub functions which can be consolidated. Signed-off-by: NJon Medhurst <tixy@yxit.co.uk> Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org>
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由 Jon Medhurst 提交于
The kernel doesn't currently support VFP or Neon code, and probing of code with CP15 operations is fraught with bad consequences. Therefore we don't need the ability to probe coprocessor instructions and the code to support this can be removed. The removed code also had at least two bugs: - MRC into R15 should set CPSR not trash PC - LDC and STC which use PC as base register needed the address offset by 8 Signed-off-by: NJon Medhurst <tixy@yxit.co.uk> Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org>
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由 Jon Medhurst 提交于
The USAD8 instruction wasn't being explicitly decoded leading to the incorrect emulation routine being called. It can be correctly decoded in the same way as the signed multiply instructions so we move the decoding there. Signed-off-by: NJon Medhurst <tixy@yxit.co.uk> Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org>
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由 Jon Medhurst 提交于
The signed multiply instructions were being decoded incorrectly. Signed-off-by: NJon Medhurst <tixy@yxit.co.uk> Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org>
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由 Jon Medhurst 提交于
These sign extension instructions are encoded as extend-and-add instructions where the register to add is specified as r15. The decoding routines weren't checking for this and were using the incorrect emulation code, giving incorrect results. Signed-off-by: NJon Medhurst <tixy@yxit.co.uk> Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org>
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由 Jon Medhurst 提交于
The instructions space for media instructions contains some undefined patterns. We need to reject probing of these because they may in future become defined and the kprobes code may then emulate them faultily. Signed-off-by: NJon Medhurst <tixy@yxit.co.uk> Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org>
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由 Jon Medhurst 提交于
The v6T2 RBIT instruction was accidentally being emulated correctly, this patch adds correct decoding for the instruction. Signed-off-by: NJon Medhurst <tixy@yxit.co.uk> Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org>
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由 Jon Medhurst 提交于
These instructions are specified as UNPREDICTABLE. Signed-off-by: NJon Medhurst <tixy@yxit.co.uk> Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org>
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由 Jon Medhurst 提交于
The decoding of these instructions got the register indexed and immediate indexed forms the wrong way around, causing incorrect emulation. Instructions like "LDRD Rx, [Rx]" were corrupting Rx because the base register writeback was being performed unconditionally, overwriting the value just loaded from memory. The fix is to only writeback the base register when that form of the instruction is used. Note, now that we reject probing writeback with PC the emulation code doesn't need the check rn!=15. Signed-off-by: NJon Medhurst <tixy@yxit.co.uk> Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org>
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由 Jon Medhurst 提交于
Using PC as an base register with writeback is UNPREDICTABLE, as is non word-sized loads or stores of PC. (We only really care about preventing loads to PC but it keeps the code simpler if we also exclude stores.) Signed-off-by: NJon Medhurst <tixy@yxit.co.uk> Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org>
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由 Jon Medhurst 提交于
The decoding of these instructions got the register indexed and immediate indexed forms the wrong way around, causing incorrect emulation. Signed-off-by: NJon Medhurst <tixy@yxit.co.uk> Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org>
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由 Jon Medhurst 提交于
The emulation code for STREX and LDREX instructions is faulty, however, rather than attempting to fix this we reject probes of these instructions. We do this because they can never succeed in gaining exclusive access as the exception framework clears the exclusivity monitor when a probes breakpoint is hit. (This is a general problem when probing all instructions executing between a LDREX and its corresponding STREX and can lead to infinite retry loops.) Signed-off-by: NJon Medhurst <tixy@yxit.co.uk> Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org>
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由 Jon Medhurst 提交于
The instructions space for 'Multiply and multiply-accumulate' instructions contains some undefined patterns. We need to reject probing of these because they may in future become defined and the kprobes code may then emulate them faultily. This has already happened with the new MLS instruction which this patch also adds correct decoding for as well as tightening up other decoding tests. (Before this patch the wrong emulation routine was being called for MLS though it still produced correct results.) Signed-off-by: NJon Medhurst <tixy@yxit.co.uk> Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org>
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由 Jon Medhurst 提交于
Signed-off-by: NJon Medhurst <tixy@yxit.co.uk> Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org>
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由 Jon Medhurst 提交于
Signed-off-by: NJon Medhurst <tixy@yxit.co.uk> Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org>
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由 Jon Medhurst 提交于
The MRS instruction should set mode and interrupt bits in the read value so it is simpler to use a new simulation routine (simulate_mrs) rather than some modified emulation. prep_emulate_rd12 is now unused and removed. Signed-off-by: NJon Medhurst <tixy@yxit.co.uk> Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org>
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由 Jon Medhurst 提交于
We need to reject probing of instructions which read SPSR because we can't handle this as the value in SPSR is lost when the exception handler for the probe breakpoint first runs. This patch also fixes the bitmask for MRS instructions decoding to include checking bits 5-7. Signed-off-by: NJon Medhurst <tixy@yxit.co.uk> Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org>
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由 Jon Medhurst 提交于
Emulation of instructions like "ADD rd, rn, #<const>" would result in a corrupted value for rd. Signed-off-by: NJon Medhurst <tixy@yxit.co.uk> Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org>
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