1. 01 12月, 2005 1 次提交
  2. 21 11月, 2005 1 次提交
  3. 15 11月, 2005 2 次提交
    • S
      [PATCH] x86_64: Unmap NULL during early bootup · f6c2e333
      Siddha, Suresh B 提交于
      We should zap the low mappings, as soon as possible, so that we can catch
      kernel bugs more effectively. Previously early boot had NULL mapped
      and didn't trap on NULL references.
      
      This patch introduces boot_level4_pgt, which will always have low identity
      addresses mapped.  Druing boot, all the processors will use this as their
      level4 pgt.  On BP, we will switch to init_level4_pgt as soon as we enter C
      code and zap the low mappings as soon as we are done with the usage of
      identity low mapped addresses.  On AP's we will zap the low mappings as
      soon as we jump to C code.
      Signed-off-by: NSuresh Siddha <suresh.b.siddha@intel.com>
      Signed-off-by: NAshok Raj <ashok.raj@intel.com>
      Signed-off-by: NAndi Kleen <ak@suse.de>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      f6c2e333
    • J
      [PATCH] i386/x86-64: Share interrupt vectors when there is a large number of interrupt sources · 6004e1b7
      James Cleverdon 提交于
      Here's a patch that builds on Natalie Protasevich's IRQ compression
      patch and tries to work for MPS boots as well as ACPI.  It is meant for
      a 4-node IBM x460 NUMA box, which was dying because it had interrupt
      pins with GSI numbers > NR_IRQS and thus overflowed irq_desc.
      
      The problem is that this system has 270 GSIs (which are 1:1 mapped with
      I/O APIC RTEs) and an 8-node box would have 540.  This is much bigger
      than NR_IRQS (224 for both i386 and x86_64).  Also, there aren't enough
      vectors to go around.  There are about 190 usable vectors, not counting
      the reserved ones and the unused vectors at 0x20 to 0x2F.  So, my patch
      attempts to compress the GSI range and share vectors by sharing IRQs.
      
      Cc: "Protasevich, Natalie" <Natalie.Protasevich@unisys.com>
      Signed-off-by: NAndi Kleen <ak@suse.de>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      6004e1b7
  4. 01 10月, 2005 1 次提交
  5. 27 9月, 2005 1 次提交
  6. 15 9月, 2005 1 次提交
  7. 13 9月, 2005 2 次提交
  8. 11 9月, 2005 1 次提交
  9. 05 9月, 2005 1 次提交
  10. 26 8月, 2005 1 次提交
  11. 25 8月, 2005 3 次提交
  12. 05 8月, 2005 3 次提交
  13. 12 7月, 2005 2 次提交
  14. 28 6月, 2005 2 次提交
    • G
      [PATCH] PCI: add proper MCFG table parsing to ACPI core. · 54549391
      Greg Kroah-Hartman 提交于
      This patch is the first step in properly handling the MCFG PCI table.
      It defines the structures properly, and saves off the table so that the
      pci mmconfig code can access it.  It moves the parsing of the table a
      little later in the boot process, but still before the information is
      needed.
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      54549391
    • K
      [PATCH] ACPI based I/O APIC hot-plug: add interfaces · b1bb248a
      Kenji Kaneshige 提交于
      This patch adds the following new interfaces for I/O xAPIC
      hotplug. The implementation of these interfaces depends on each
      architecture.
      
          o int acpi_register_ioapic(acpi_handle handle, u64 phys_addr,
      			       u32 gsi_base);
      
              This new interface is to add a new I/O xAPIC specified by
              phys_addr and gsi_base pair. phys_addr is the physical address
              to which the I/O xAPIC is mapped and gsi_base is global system
              interrupt base of the I/O xAPIC. acpi_register_ioapic returns
              0 on success, or negative value on error.
      
          o int acpi_unregister_ioapic(acpi_handle handle, u32 gsi_base);
      
              This new interface is to remove a I/O xAPIC specified by
              gsi_base. acpi_unregister_ioapic returns 0 on success, or
              negative value on error.
      Signed-off-by: NKenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      b1bb248a
  15. 26 6月, 2005 2 次提交
  16. 07 5月, 2005 1 次提交
  17. 18 4月, 2005 1 次提交
  18. 17 4月, 2005 2 次提交
    • J
      [PATCH] x86_64 genapic update · 90660ec3
      Jason Davis 提交于
      x86_64 genapic mechanism should be aware of machines that use physical APIC
      mode regardless of how many clusters/processors are detected.
      
      ACPI 3.0 FADT makes this determination very simple by providing a feature
      flag "force_apic_physical_destination_mode" to state whether the machine
      unconditionally uses physical APIC mode.
      
      Unisys' next generation x86_64 ES7000 will need to utilize this FADT
      feature flag in order to boot the x86_64 kernel in the correct APIC mode. 
      This patch has been tested on both x86_64 commodity and ES7000 boxes.
      Signed-off-by: NJason Davis <jason.davis@unisys.com>
      Acked-by: NAndi Kleen <ak@suse.de>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      90660ec3
    • L
      Linux-2.6.12-rc2 · 1da177e4
      Linus Torvalds 提交于
      Initial git repository build. I'm not bothering with the full history,
      even though we have it. We can create a separate "historical" git
      archive of that later if we want to, and in the meantime it's about
      3.2GB when imported into git - space that would just make the early
      git days unnecessarily complicated, when we don't have a lot of good
      infrastructure for it.
      
      Let it rip!
      1da177e4